| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel |
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| 4 | * |
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| 5 | * Copyright (C) 2006, 2007 Atmel Corporation |
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| 6 | */ |
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| 7 | #ifndef __LTV350QV_H |
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| 8 | #define __LTV350QV_H |
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| 9 | |
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| 10 | #define LTV_OPC_INDEX 0x74 |
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| 11 | #define LTV_OPC_DATA 0x76 |
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| 12 | |
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| 13 | #define LTV_ID 0x00 /* ID Read */ |
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| 14 | #define LTV_IFCTL 0x01 /* Display Interface Control */ |
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| 15 | #define LTV_DATACTL 0x02 /* Display Data Control */ |
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| 16 | #define LTV_ENTRY_MODE 0x03 /* Entry Mode */ |
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| 17 | #define LTV_GATECTL1 0x04 /* Gate Control 1 */ |
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| 18 | #define LTV_GATECTL2 0x05 /* Gate Control 2 */ |
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| 19 | #define LTV_VBP 0x06 /* Vertical Back Porch */ |
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| 20 | #define LTV_HBP 0x07 /* Horizontal Back Porch */ |
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| 21 | #define LTV_SOTCTL 0x08 /* Source Output Timing Control */ |
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| 22 | #define LTV_PWRCTL1 0x09 /* Power Control 1 */ |
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| 23 | #define LTV_PWRCTL2 0x0a /* Power Control 2 */ |
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| 24 | #define LTV_GAMMA(x) (0x10 + (x)) /* Gamma control */ |
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| 25 | |
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| 26 | /* Bit definitions for LTV_IFCTL */ |
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| 27 | #define LTV_IM (1 << 15) |
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| 28 | #define LTV_NMD (1 << 14) |
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| 29 | #define LTV_SSMD (1 << 13) |
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| 30 | #define LTV_REV (1 << 7) |
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| 31 | #define LTV_NL(x) (((x) & 0x001f) << 0) |
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| 32 | |
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| 33 | /* Bit definitions for LTV_DATACTL */ |
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| 34 | #define LTV_DS_SAME (0 << 12) |
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| 35 | #define LTV_DS_D_TO_S (1 << 12) |
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| 36 | #define LTV_DS_S_TO_D (2 << 12) |
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| 37 | #define LTV_CHS_384 (0 << 9) |
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| 38 | #define LTV_CHS_480 (1 << 9) |
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| 39 | #define LTV_CHS_492 (2 << 9) |
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| 40 | #define LTV_DF_RGB (0 << 6) |
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| 41 | #define LTV_DF_RGBX (1 << 6) |
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| 42 | #define LTV_DF_XRGB (2 << 6) |
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| 43 | #define LTV_RGB_RGB (0 << 2) |
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| 44 | #define LTV_RGB_BGR (1 << 2) |
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| 45 | #define LTV_RGB_GRB (2 << 2) |
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| 46 | #define LTV_RGB_RBG (3 << 2) |
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| 47 | |
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| 48 | /* Bit definitions for LTV_ENTRY_MODE */ |
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| 49 | #define LTV_VSPL_ACTIVE_LOW (0 << 15) |
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| 50 | #define LTV_VSPL_ACTIVE_HIGH (1 << 15) |
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| 51 | #define LTV_HSPL_ACTIVE_LOW (0 << 14) |
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| 52 | #define LTV_HSPL_ACTIVE_HIGH (1 << 14) |
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| 53 | #define LTV_DPL_SAMPLE_RISING (0 << 13) |
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| 54 | #define LTV_DPL_SAMPLE_FALLING (1 << 13) |
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| 55 | #define LTV_EPL_ACTIVE_LOW (0 << 12) |
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| 56 | #define LTV_EPL_ACTIVE_HIGH (1 << 12) |
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| 57 | #define LTV_SS_LEFT_TO_RIGHT (0 << 8) |
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| 58 | #define LTV_SS_RIGHT_TO_LEFT (1 << 8) |
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| 59 | #define LTV_STB (1 << 1) |
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| 60 | |
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| 61 | /* Bit definitions for LTV_GATECTL1 */ |
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| 62 | #define LTV_CLW(x) (((x) & 0x0007) << 12) |
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| 63 | #define LTV_GAON (1 << 5) |
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| 64 | #define LTV_SDR (1 << 3) |
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| 65 | |
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| 66 | /* Bit definitions for LTV_GATECTL2 */ |
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| 67 | #define LTV_NW_INV_FRAME (0 << 14) |
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| 68 | #define LTV_NW_INV_1LINE (1 << 14) |
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| 69 | #define LTV_NW_INV_2LINE (2 << 14) |
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| 70 | #define LTV_DSC (1 << 12) |
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| 71 | #define LTV_GIF (1 << 8) |
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| 72 | #define LTV_FHN (1 << 7) |
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| 73 | #define LTV_FTI(x) (((x) & 0x0003) << 4) |
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| 74 | #define LTV_FWI(x) (((x) & 0x0003) << 0) |
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| 75 | |
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| 76 | /* Bit definitions for LTV_SOTCTL */ |
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| 77 | #define LTV_SDT(x) (((x) & 0x0007) << 10) |
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| 78 | #define LTV_EQ(x) (((x) & 0x0007) << 2) |
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| 79 | |
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| 80 | /* Bit definitions for LTV_PWRCTL1 */ |
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| 81 | #define LTV_VCOM_DISABLE (1 << 14) |
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| 82 | #define LTV_VCOMOUT_ENABLE (1 << 11) |
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| 83 | #define LTV_POWER_ON (1 << 9) |
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| 84 | #define LTV_DRIVE_CURRENT(x) (((x) & 0x0007) << 4) /* 0=off, 5=max */ |
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| 85 | #define LTV_SUPPLY_CURRENT(x) (((x) & 0x0007) << 0) /* 0=off, 5=max */ |
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| 86 | |
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| 87 | /* Bit definitions for LTV_PWRCTL2 */ |
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| 88 | #define LTV_VCOML_ENABLE (1 << 13) |
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| 89 | #define LTV_VCOML_VOLTAGE(x) (((x) & 0x001f) << 8) /* 0=1V, 31=-1V */ |
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| 90 | #define LTV_VCOMH_VOLTAGE(x) (((x) & 0x001f) << 0) /* 0=3V, 31=4.5V */ |
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| 91 | |
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| 92 | #endif /* __LTV350QV_H */ |
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| 93 | |
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