1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * w1_ds28e17.c - w1 family 19 (DS28E17) driver |
4 | * |
5 | * Copyright (c) 2016 Jan Kandziora <jjj@gmx.de> |
6 | */ |
7 | |
8 | #include <linux/crc16.h> |
9 | #include <linux/delay.h> |
10 | #include <linux/device.h> |
11 | #include <linux/i2c.h> |
12 | #include <linux/kernel.h> |
13 | #include <linux/module.h> |
14 | #include <linux/moduleparam.h> |
15 | #include <linux/slab.h> |
16 | #include <linux/types.h> |
17 | #include <linux/uaccess.h> |
18 | |
19 | #define CRC16_INIT 0 |
20 | |
21 | #include <linux/w1.h> |
22 | |
23 | #define W1_FAMILY_DS28E17 0x19 |
24 | |
25 | /* Module setup. */ |
26 | MODULE_LICENSE("GPL v2" ); |
27 | MODULE_AUTHOR("Jan Kandziora <jjj@gmx.de>" ); |
28 | MODULE_DESCRIPTION("w1 family 19 driver for DS28E17, 1-wire to I2C master bridge" ); |
29 | MODULE_ALIAS("w1-family-" __stringify(W1_FAMILY_DS28E17)); |
30 | |
31 | |
32 | /* Default I2C speed to be set when a DS28E17 is detected. */ |
33 | static int i2c_speed = 100; |
34 | module_param_named(speed, i2c_speed, int, 0600); |
35 | MODULE_PARM_DESC(speed, "Default I2C speed to be set when a DS28E17 is detected" ); |
36 | |
37 | /* Default I2C stretch value to be set when a DS28E17 is detected. */ |
38 | static char i2c_stretch = 1; |
39 | module_param_named(stretch, i2c_stretch, byte, 0600); |
40 | MODULE_PARM_DESC(stretch, "Default I2C stretch value to be set when a DS28E17 is detected" ); |
41 | |
42 | /* DS28E17 device command codes. */ |
43 | #define W1_F19_WRITE_DATA_WITH_STOP 0x4B |
44 | #define W1_F19_WRITE_DATA_NO_STOP 0x5A |
45 | #define W1_F19_WRITE_DATA_ONLY 0x69 |
46 | #define W1_F19_WRITE_DATA_ONLY_WITH_STOP 0x78 |
47 | #define W1_F19_READ_DATA_WITH_STOP 0x87 |
48 | #define W1_F19_WRITE_READ_DATA_WITH_STOP 0x2D |
49 | #define W1_F19_WRITE_CONFIGURATION 0xD2 |
50 | #define W1_F19_READ_CONFIGURATION 0xE1 |
51 | #define W1_F19_ENABLE_SLEEP_MODE 0x1E |
52 | #define W1_F19_READ_DEVICE_REVISION 0xC4 |
53 | |
54 | /* DS28E17 status bits */ |
55 | #define W1_F19_STATUS_CRC 0x01 |
56 | #define W1_F19_STATUS_ADDRESS 0x02 |
57 | #define W1_F19_STATUS_START 0x08 |
58 | |
59 | /* |
60 | * Maximum number of I2C bytes to transfer within one CRC16 protected onewire |
61 | * command. |
62 | */ |
63 | #define W1_F19_WRITE_DATA_LIMIT 255 |
64 | |
65 | /* Maximum number of I2C bytes to read with one onewire command. */ |
66 | #define W1_F19_READ_DATA_LIMIT 255 |
67 | |
68 | /* Constants for calculating the busy sleep. */ |
69 | #define W1_F19_BUSY_TIMEBASES { 90, 23, 10 } |
70 | #define W1_F19_BUSY_GRATUITY 1000 |
71 | |
72 | /* Number of checks for the busy flag before timeout. */ |
73 | #define W1_F19_BUSY_CHECKS 1000 |
74 | |
75 | |
76 | /* Slave specific data. */ |
77 | struct w1_f19_data { |
78 | u8 speed; |
79 | u8 stretch; |
80 | struct i2c_adapter adapter; |
81 | }; |
82 | |
83 | |
84 | /* Wait a while until the busy flag clears. */ |
85 | static int w1_f19_i2c_busy_wait(struct w1_slave *sl, size_t count) |
86 | { |
87 | const unsigned long timebases[3] = W1_F19_BUSY_TIMEBASES; |
88 | struct w1_f19_data *data = sl->family_data; |
89 | unsigned int checks; |
90 | |
91 | /* Check the busy flag first in any case.*/ |
92 | if (w1_touch_bit(dev: sl->master, bit: 1) == 0) |
93 | return 0; |
94 | |
95 | /* |
96 | * Do a generously long sleep in the beginning, |
97 | * as we have to wait at least this time for all |
98 | * the I2C bytes at the given speed to be transferred. |
99 | */ |
100 | usleep_range(min: timebases[data->speed] * (data->stretch) * count, |
101 | max: timebases[data->speed] * (data->stretch) * count |
102 | + W1_F19_BUSY_GRATUITY); |
103 | |
104 | /* Now continusly check the busy flag sent by the DS28E17. */ |
105 | checks = W1_F19_BUSY_CHECKS; |
106 | while ((checks--) > 0) { |
107 | /* Return success if the busy flag is cleared. */ |
108 | if (w1_touch_bit(dev: sl->master, bit: 1) == 0) |
109 | return 0; |
110 | |
111 | /* Wait one non-streched byte timeslot. */ |
112 | udelay(timebases[data->speed]); |
113 | } |
114 | |
115 | /* Timeout. */ |
116 | dev_warn(&sl->dev, "busy timeout\n" ); |
117 | return -ETIMEDOUT; |
118 | } |
119 | |
120 | |
121 | /* Utility function: result. */ |
122 | static size_t w1_f19_error(struct w1_slave *sl, u8 w1_buf[]) |
123 | { |
124 | /* Warnings. */ |
125 | if (w1_buf[0] & W1_F19_STATUS_CRC) |
126 | dev_warn(&sl->dev, "crc16 mismatch\n" ); |
127 | if (w1_buf[0] & W1_F19_STATUS_ADDRESS) |
128 | dev_warn(&sl->dev, "i2c device not responding\n" ); |
129 | if ((w1_buf[0] & (W1_F19_STATUS_CRC | W1_F19_STATUS_ADDRESS)) == 0 |
130 | && w1_buf[1] != 0) { |
131 | dev_warn(&sl->dev, "i2c short write, %d bytes not acknowledged\n" , |
132 | w1_buf[1]); |
133 | } |
134 | |
135 | /* Check error conditions. */ |
136 | if (w1_buf[0] & W1_F19_STATUS_ADDRESS) |
137 | return -ENXIO; |
138 | if (w1_buf[0] & W1_F19_STATUS_START) |
139 | return -EAGAIN; |
140 | if (w1_buf[0] != 0 || w1_buf[1] != 0) |
141 | return -EIO; |
142 | |
143 | /* All ok. */ |
144 | return 0; |
145 | } |
146 | |
147 | |
148 | /* Utility function: write data to I2C slave, single chunk. */ |
149 | static int __w1_f19_i2c_write(struct w1_slave *sl, |
150 | const u8 *command, size_t command_count, |
151 | const u8 *buffer, size_t count) |
152 | { |
153 | u16 crc; |
154 | int error; |
155 | u8 w1_buf[2]; |
156 | |
157 | /* Send command and I2C data to DS28E17. */ |
158 | crc = crc16(CRC16_INIT, buffer: command, len: command_count); |
159 | w1_write_block(sl->master, command, command_count); |
160 | |
161 | w1_buf[0] = count; |
162 | crc = crc16(crc, buffer: w1_buf, len: 1); |
163 | w1_write_8(sl->master, w1_buf[0]); |
164 | |
165 | crc = crc16(crc, buffer, len: count); |
166 | w1_write_block(sl->master, buffer, count); |
167 | |
168 | w1_buf[0] = ~(crc & 0xFF); |
169 | w1_buf[1] = ~((crc >> 8) & 0xFF); |
170 | w1_write_block(sl->master, w1_buf, 2); |
171 | |
172 | /* Wait until busy flag clears (or timeout). */ |
173 | if (w1_f19_i2c_busy_wait(sl, count: count + 1) < 0) |
174 | return -ETIMEDOUT; |
175 | |
176 | /* Read status from DS28E17. */ |
177 | w1_read_block(sl->master, w1_buf, 2); |
178 | |
179 | /* Check error conditions. */ |
180 | error = w1_f19_error(sl, w1_buf); |
181 | if (error < 0) |
182 | return error; |
183 | |
184 | /* Return number of bytes written. */ |
185 | return count; |
186 | } |
187 | |
188 | |
189 | /* Write data to I2C slave. */ |
190 | static int w1_f19_i2c_write(struct w1_slave *sl, u16 i2c_address, |
191 | const u8 *buffer, size_t count, bool stop) |
192 | { |
193 | int result; |
194 | int remaining = count; |
195 | const u8 *p; |
196 | u8 command[2]; |
197 | |
198 | /* Check input. */ |
199 | if (count == 0) |
200 | return -EOPNOTSUPP; |
201 | |
202 | /* Check whether we need multiple commands. */ |
203 | if (count <= W1_F19_WRITE_DATA_LIMIT) { |
204 | /* |
205 | * Small data amount. Data can be sent with |
206 | * a single onewire command. |
207 | */ |
208 | |
209 | /* Send all data to DS28E17. */ |
210 | command[0] = (stop ? W1_F19_WRITE_DATA_WITH_STOP |
211 | : W1_F19_WRITE_DATA_NO_STOP); |
212 | command[1] = i2c_address << 1; |
213 | result = __w1_f19_i2c_write(sl, command, command_count: 2, buffer, count); |
214 | } else { |
215 | /* Large data amount. Data has to be sent in multiple chunks. */ |
216 | |
217 | /* Send first chunk to DS28E17. */ |
218 | p = buffer; |
219 | command[0] = W1_F19_WRITE_DATA_NO_STOP; |
220 | command[1] = i2c_address << 1; |
221 | result = __w1_f19_i2c_write(sl, command, command_count: 2, buffer: p, |
222 | W1_F19_WRITE_DATA_LIMIT); |
223 | if (result < 0) |
224 | return result; |
225 | |
226 | /* Resume to same DS28E17. */ |
227 | if (w1_reset_resume_command(sl->master)) |
228 | return -EIO; |
229 | |
230 | /* Next data chunk. */ |
231 | p += W1_F19_WRITE_DATA_LIMIT; |
232 | remaining -= W1_F19_WRITE_DATA_LIMIT; |
233 | |
234 | while (remaining > W1_F19_WRITE_DATA_LIMIT) { |
235 | /* Send intermediate chunk to DS28E17. */ |
236 | command[0] = W1_F19_WRITE_DATA_ONLY; |
237 | result = __w1_f19_i2c_write(sl, command, command_count: 1, buffer: p, |
238 | W1_F19_WRITE_DATA_LIMIT); |
239 | if (result < 0) |
240 | return result; |
241 | |
242 | /* Resume to same DS28E17. */ |
243 | if (w1_reset_resume_command(sl->master)) |
244 | return -EIO; |
245 | |
246 | /* Next data chunk. */ |
247 | p += W1_F19_WRITE_DATA_LIMIT; |
248 | remaining -= W1_F19_WRITE_DATA_LIMIT; |
249 | } |
250 | |
251 | /* Send final chunk to DS28E17. */ |
252 | command[0] = (stop ? W1_F19_WRITE_DATA_ONLY_WITH_STOP |
253 | : W1_F19_WRITE_DATA_ONLY); |
254 | result = __w1_f19_i2c_write(sl, command, command_count: 1, buffer: p, count: remaining); |
255 | } |
256 | |
257 | return result; |
258 | } |
259 | |
260 | |
261 | /* Read data from I2C slave. */ |
262 | static int w1_f19_i2c_read(struct w1_slave *sl, u16 i2c_address, |
263 | u8 *buffer, size_t count) |
264 | { |
265 | u16 crc; |
266 | int error; |
267 | u8 w1_buf[5]; |
268 | |
269 | /* Check input. */ |
270 | if (count == 0) |
271 | return -EOPNOTSUPP; |
272 | |
273 | /* Send command to DS28E17. */ |
274 | w1_buf[0] = W1_F19_READ_DATA_WITH_STOP; |
275 | w1_buf[1] = i2c_address << 1 | 0x01; |
276 | w1_buf[2] = count; |
277 | crc = crc16(CRC16_INIT, buffer: w1_buf, len: 3); |
278 | w1_buf[3] = ~(crc & 0xFF); |
279 | w1_buf[4] = ~((crc >> 8) & 0xFF); |
280 | w1_write_block(sl->master, w1_buf, 5); |
281 | |
282 | /* Wait until busy flag clears (or timeout). */ |
283 | if (w1_f19_i2c_busy_wait(sl, count: count + 1) < 0) |
284 | return -ETIMEDOUT; |
285 | |
286 | /* Read status from DS28E17. */ |
287 | w1_buf[0] = w1_read_8(sl->master); |
288 | w1_buf[1] = 0; |
289 | |
290 | /* Check error conditions. */ |
291 | error = w1_f19_error(sl, w1_buf); |
292 | if (error < 0) |
293 | return error; |
294 | |
295 | /* Read received I2C data from DS28E17. */ |
296 | return w1_read_block(sl->master, buffer, count); |
297 | } |
298 | |
299 | |
300 | /* Write to, then read data from I2C slave. */ |
301 | static int w1_f19_i2c_write_read(struct w1_slave *sl, u16 i2c_address, |
302 | const u8 *wbuffer, size_t wcount, u8 *rbuffer, size_t rcount) |
303 | { |
304 | u16 crc; |
305 | int error; |
306 | u8 w1_buf[3]; |
307 | |
308 | /* Check input. */ |
309 | if (wcount == 0 || rcount == 0) |
310 | return -EOPNOTSUPP; |
311 | |
312 | /* Send command and I2C data to DS28E17. */ |
313 | w1_buf[0] = W1_F19_WRITE_READ_DATA_WITH_STOP; |
314 | w1_buf[1] = i2c_address << 1; |
315 | w1_buf[2] = wcount; |
316 | crc = crc16(CRC16_INIT, buffer: w1_buf, len: 3); |
317 | w1_write_block(sl->master, w1_buf, 3); |
318 | |
319 | crc = crc16(crc, buffer: wbuffer, len: wcount); |
320 | w1_write_block(sl->master, wbuffer, wcount); |
321 | |
322 | w1_buf[0] = rcount; |
323 | crc = crc16(crc, buffer: w1_buf, len: 1); |
324 | w1_buf[1] = ~(crc & 0xFF); |
325 | w1_buf[2] = ~((crc >> 8) & 0xFF); |
326 | w1_write_block(sl->master, w1_buf, 3); |
327 | |
328 | /* Wait until busy flag clears (or timeout). */ |
329 | if (w1_f19_i2c_busy_wait(sl, count: wcount + rcount + 2) < 0) |
330 | return -ETIMEDOUT; |
331 | |
332 | /* Read status from DS28E17. */ |
333 | w1_read_block(sl->master, w1_buf, 2); |
334 | |
335 | /* Check error conditions. */ |
336 | error = w1_f19_error(sl, w1_buf); |
337 | if (error < 0) |
338 | return error; |
339 | |
340 | /* Read received I2C data from DS28E17. */ |
341 | return w1_read_block(sl->master, rbuffer, rcount); |
342 | } |
343 | |
344 | |
345 | /* Do an I2C master transfer. */ |
346 | static int w1_f19_i2c_master_transfer(struct i2c_adapter *adapter, |
347 | struct i2c_msg *msgs, int num) |
348 | { |
349 | struct w1_slave *sl = (struct w1_slave *) adapter->algo_data; |
350 | int i = 0; |
351 | int result = 0; |
352 | |
353 | /* Start onewire transaction. */ |
354 | mutex_lock(&sl->master->bus_mutex); |
355 | |
356 | /* Select DS28E17. */ |
357 | if (w1_reset_select_slave(sl)) { |
358 | i = -EIO; |
359 | goto error; |
360 | } |
361 | |
362 | /* Loop while there are still messages to transfer. */ |
363 | while (i < num) { |
364 | /* |
365 | * Check for special case: Small write followed |
366 | * by read to same I2C device. |
367 | */ |
368 | if (i < (num-1) |
369 | && msgs[i].addr == msgs[i+1].addr |
370 | && !(msgs[i].flags & I2C_M_RD) |
371 | && (msgs[i+1].flags & I2C_M_RD) |
372 | && (msgs[i].len <= W1_F19_WRITE_DATA_LIMIT)) { |
373 | /* |
374 | * The DS28E17 has a combined transfer |
375 | * for small write+read. |
376 | */ |
377 | result = w1_f19_i2c_write_read(sl, i2c_address: msgs[i].addr, |
378 | wbuffer: msgs[i].buf, wcount: msgs[i].len, |
379 | rbuffer: msgs[i+1].buf, rcount: msgs[i+1].len); |
380 | if (result < 0) { |
381 | i = result; |
382 | goto error; |
383 | } |
384 | |
385 | /* |
386 | * Check if we should interpret the read data |
387 | * as a length byte. The DS28E17 unfortunately |
388 | * has no read without stop, so we can just do |
389 | * another simple read in that case. |
390 | */ |
391 | if (msgs[i+1].flags & I2C_M_RECV_LEN) { |
392 | result = w1_f19_i2c_read(sl, i2c_address: msgs[i+1].addr, |
393 | buffer: &(msgs[i+1].buf[1]), count: msgs[i+1].buf[0]); |
394 | if (result < 0) { |
395 | i = result; |
396 | goto error; |
397 | } |
398 | } |
399 | |
400 | /* Eat up read message, too. */ |
401 | i++; |
402 | } else if (msgs[i].flags & I2C_M_RD) { |
403 | /* Read transfer. */ |
404 | result = w1_f19_i2c_read(sl, i2c_address: msgs[i].addr, |
405 | buffer: msgs[i].buf, count: msgs[i].len); |
406 | if (result < 0) { |
407 | i = result; |
408 | goto error; |
409 | } |
410 | |
411 | /* |
412 | * Check if we should interpret the read data |
413 | * as a length byte. The DS28E17 unfortunately |
414 | * has no read without stop, so we can just do |
415 | * another simple read in that case. |
416 | */ |
417 | if (msgs[i].flags & I2C_M_RECV_LEN) { |
418 | result = w1_f19_i2c_read(sl, |
419 | i2c_address: msgs[i].addr, |
420 | buffer: &(msgs[i].buf[1]), |
421 | count: msgs[i].buf[0]); |
422 | if (result < 0) { |
423 | i = result; |
424 | goto error; |
425 | } |
426 | } |
427 | } else { |
428 | /* |
429 | * Write transfer. |
430 | * Stop condition only for last |
431 | * transfer. |
432 | */ |
433 | result = w1_f19_i2c_write(sl, |
434 | i2c_address: msgs[i].addr, |
435 | buffer: msgs[i].buf, |
436 | count: msgs[i].len, |
437 | stop: i == (num-1)); |
438 | if (result < 0) { |
439 | i = result; |
440 | goto error; |
441 | } |
442 | } |
443 | |
444 | /* Next message. */ |
445 | i++; |
446 | |
447 | /* Are there still messages to send/receive? */ |
448 | if (i < num) { |
449 | /* Yes. Resume to same DS28E17. */ |
450 | if (w1_reset_resume_command(sl->master)) { |
451 | i = -EIO; |
452 | goto error; |
453 | } |
454 | } |
455 | } |
456 | |
457 | error: |
458 | /* End onewire transaction. */ |
459 | mutex_unlock(lock: &sl->master->bus_mutex); |
460 | |
461 | /* Return number of messages processed or error. */ |
462 | return i; |
463 | } |
464 | |
465 | |
466 | /* Get I2C adapter functionality. */ |
467 | static u32 w1_f19_i2c_functionality(struct i2c_adapter *adapter) |
468 | { |
469 | /* |
470 | * Plain I2C functions only. |
471 | * SMBus is emulated by the kernel's I2C layer. |
472 | * No "I2C_FUNC_SMBUS_QUICK" |
473 | * No "I2C_FUNC_SMBUS_READ_BLOCK_DATA" |
474 | * No "I2C_FUNC_SMBUS_BLOCK_PROC_CALL" |
475 | */ |
476 | return I2C_FUNC_I2C | |
477 | I2C_FUNC_SMBUS_BYTE | |
478 | I2C_FUNC_SMBUS_BYTE_DATA | |
479 | I2C_FUNC_SMBUS_WORD_DATA | |
480 | I2C_FUNC_SMBUS_PROC_CALL | |
481 | I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | |
482 | I2C_FUNC_SMBUS_I2C_BLOCK | |
483 | I2C_FUNC_SMBUS_PEC; |
484 | } |
485 | |
486 | |
487 | /* I2C adapter quirks. */ |
488 | static const struct i2c_adapter_quirks w1_f19_i2c_adapter_quirks = { |
489 | .max_read_len = W1_F19_READ_DATA_LIMIT, |
490 | }; |
491 | |
492 | /* I2C algorithm. */ |
493 | static const struct i2c_algorithm w1_f19_i2c_algorithm = { |
494 | .master_xfer = w1_f19_i2c_master_transfer, |
495 | .functionality = w1_f19_i2c_functionality, |
496 | }; |
497 | |
498 | |
499 | /* Read I2C speed from DS28E17. */ |
500 | static int w1_f19_get_i2c_speed(struct w1_slave *sl) |
501 | { |
502 | struct w1_f19_data *data = sl->family_data; |
503 | int result = -EIO; |
504 | |
505 | /* Start onewire transaction. */ |
506 | mutex_lock(&sl->master->bus_mutex); |
507 | |
508 | /* Select slave. */ |
509 | if (w1_reset_select_slave(sl)) |
510 | goto error; |
511 | |
512 | /* Read slave configuration byte. */ |
513 | w1_write_8(sl->master, W1_F19_READ_CONFIGURATION); |
514 | result = w1_read_8(sl->master); |
515 | if (result < 0 || result > 2) { |
516 | result = -EIO; |
517 | goto error; |
518 | } |
519 | |
520 | /* Update speed in slave specific data. */ |
521 | data->speed = result; |
522 | |
523 | error: |
524 | /* End onewire transaction. */ |
525 | mutex_unlock(lock: &sl->master->bus_mutex); |
526 | |
527 | return result; |
528 | } |
529 | |
530 | |
531 | /* Set I2C speed on DS28E17. */ |
532 | static int __w1_f19_set_i2c_speed(struct w1_slave *sl, u8 speed) |
533 | { |
534 | struct w1_f19_data *data = sl->family_data; |
535 | const int i2c_speeds[3] = { 100, 400, 900 }; |
536 | u8 w1_buf[2]; |
537 | |
538 | /* Select slave. */ |
539 | if (w1_reset_select_slave(sl)) |
540 | return -EIO; |
541 | |
542 | w1_buf[0] = W1_F19_WRITE_CONFIGURATION; |
543 | w1_buf[1] = speed; |
544 | w1_write_block(sl->master, w1_buf, 2); |
545 | |
546 | /* Update speed in slave specific data. */ |
547 | data->speed = speed; |
548 | |
549 | dev_info(&sl->dev, "i2c speed set to %d kBaud\n" , i2c_speeds[speed]); |
550 | |
551 | return 0; |
552 | } |
553 | |
554 | static int w1_f19_set_i2c_speed(struct w1_slave *sl, u8 speed) |
555 | { |
556 | int result; |
557 | |
558 | /* Start onewire transaction. */ |
559 | mutex_lock(&sl->master->bus_mutex); |
560 | |
561 | /* Set I2C speed on DS28E17. */ |
562 | result = __w1_f19_set_i2c_speed(sl, speed); |
563 | |
564 | /* End onewire transaction. */ |
565 | mutex_unlock(lock: &sl->master->bus_mutex); |
566 | |
567 | return result; |
568 | } |
569 | |
570 | |
571 | /* Sysfs attributes. */ |
572 | |
573 | /* I2C speed attribute for a single chip. */ |
574 | static ssize_t speed_show(struct device *dev, struct device_attribute *attr, |
575 | char *buf) |
576 | { |
577 | struct w1_slave *sl = dev_to_w1_slave(dev); |
578 | int result; |
579 | |
580 | /* Read current speed from slave. Updates data->speed. */ |
581 | result = w1_f19_get_i2c_speed(sl); |
582 | if (result < 0) |
583 | return result; |
584 | |
585 | /* Return current speed value. */ |
586 | return sprintf(buf, fmt: "%d\n" , result); |
587 | } |
588 | |
589 | static ssize_t speed_store(struct device *dev, struct device_attribute *attr, |
590 | const char *buf, size_t count) |
591 | { |
592 | struct w1_slave *sl = dev_to_w1_slave(dev); |
593 | int error; |
594 | |
595 | /* Valid values are: "100", "400", "900" */ |
596 | if (count < 3 || count > 4 || !buf) |
597 | return -EINVAL; |
598 | if (count == 4 && buf[3] != '\n') |
599 | return -EINVAL; |
600 | if (buf[1] != '0' || buf[2] != '0') |
601 | return -EINVAL; |
602 | |
603 | /* Set speed on slave. */ |
604 | switch (buf[0]) { |
605 | case '1': |
606 | error = w1_f19_set_i2c_speed(sl, speed: 0); |
607 | break; |
608 | case '4': |
609 | error = w1_f19_set_i2c_speed(sl, speed: 1); |
610 | break; |
611 | case '9': |
612 | error = w1_f19_set_i2c_speed(sl, speed: 2); |
613 | break; |
614 | default: |
615 | return -EINVAL; |
616 | } |
617 | |
618 | if (error < 0) |
619 | return error; |
620 | |
621 | /* Return bytes written. */ |
622 | return count; |
623 | } |
624 | |
625 | static DEVICE_ATTR_RW(speed); |
626 | |
627 | |
628 | /* Busy stretch attribute for a single chip. */ |
629 | static ssize_t stretch_show(struct device *dev, struct device_attribute *attr, |
630 | char *buf) |
631 | { |
632 | struct w1_slave *sl = dev_to_w1_slave(dev); |
633 | struct w1_f19_data *data = sl->family_data; |
634 | |
635 | /* Return current stretch value. */ |
636 | return sprintf(buf, fmt: "%d\n" , data->stretch); |
637 | } |
638 | |
639 | static ssize_t stretch_store(struct device *dev, struct device_attribute *attr, |
640 | const char *buf, size_t count) |
641 | { |
642 | struct w1_slave *sl = dev_to_w1_slave(dev); |
643 | struct w1_f19_data *data = sl->family_data; |
644 | |
645 | /* Valid values are '1' to '9' */ |
646 | if (count < 1 || count > 2 || !buf) |
647 | return -EINVAL; |
648 | if (count == 2 && buf[1] != '\n') |
649 | return -EINVAL; |
650 | if (buf[0] < '1' || buf[0] > '9') |
651 | return -EINVAL; |
652 | |
653 | /* Set busy stretch value. */ |
654 | data->stretch = buf[0] & 0x0F; |
655 | |
656 | /* Return bytes written. */ |
657 | return count; |
658 | } |
659 | |
660 | static DEVICE_ATTR_RW(stretch); |
661 | |
662 | |
663 | /* All attributes. */ |
664 | static struct attribute *w1_f19_attrs[] = { |
665 | &dev_attr_speed.attr, |
666 | &dev_attr_stretch.attr, |
667 | NULL, |
668 | }; |
669 | |
670 | static const struct attribute_group w1_f19_group = { |
671 | .attrs = w1_f19_attrs, |
672 | }; |
673 | |
674 | static const struct attribute_group *w1_f19_groups[] = { |
675 | &w1_f19_group, |
676 | NULL, |
677 | }; |
678 | |
679 | |
680 | /* Slave add and remove functions. */ |
681 | static int w1_f19_add_slave(struct w1_slave *sl) |
682 | { |
683 | struct w1_f19_data *data = NULL; |
684 | |
685 | /* Allocate memory for slave specific data. */ |
686 | data = devm_kzalloc(dev: &sl->dev, size: sizeof(*data), GFP_KERNEL); |
687 | if (!data) |
688 | return -ENOMEM; |
689 | sl->family_data = data; |
690 | |
691 | /* Setup default I2C speed on slave. */ |
692 | switch (i2c_speed) { |
693 | case 100: |
694 | __w1_f19_set_i2c_speed(sl, speed: 0); |
695 | break; |
696 | case 400: |
697 | __w1_f19_set_i2c_speed(sl, speed: 1); |
698 | break; |
699 | case 900: |
700 | __w1_f19_set_i2c_speed(sl, speed: 2); |
701 | break; |
702 | default: |
703 | /* |
704 | * A i2c_speed module parameter of anything else |
705 | * than 100, 400, 900 means not to touch the |
706 | * speed of the DS28E17. |
707 | * We assume 400kBaud, the power-on value. |
708 | */ |
709 | data->speed = 1; |
710 | } |
711 | |
712 | /* |
713 | * Setup default busy stretch |
714 | * configuration for the DS28E17. |
715 | */ |
716 | data->stretch = i2c_stretch; |
717 | |
718 | /* Setup I2C adapter. */ |
719 | data->adapter.owner = THIS_MODULE; |
720 | data->adapter.algo = &w1_f19_i2c_algorithm; |
721 | data->adapter.algo_data = sl; |
722 | strcpy(p: data->adapter.name, q: "w1-" ); |
723 | strcat(p: data->adapter.name, q: sl->name); |
724 | data->adapter.dev.parent = &sl->dev; |
725 | data->adapter.quirks = &w1_f19_i2c_adapter_quirks; |
726 | |
727 | return i2c_add_adapter(adap: &data->adapter); |
728 | } |
729 | |
730 | static void w1_f19_remove_slave(struct w1_slave *sl) |
731 | { |
732 | struct w1_f19_data *family_data = sl->family_data; |
733 | |
734 | /* Delete I2C adapter. */ |
735 | i2c_del_adapter(adap: &family_data->adapter); |
736 | |
737 | /* Free slave specific data. */ |
738 | devm_kfree(dev: &sl->dev, p: family_data); |
739 | sl->family_data = NULL; |
740 | } |
741 | |
742 | |
743 | /* Declarations within the w1 subsystem. */ |
744 | static const struct w1_family_ops w1_f19_fops = { |
745 | .add_slave = w1_f19_add_slave, |
746 | .remove_slave = w1_f19_remove_slave, |
747 | .groups = w1_f19_groups, |
748 | }; |
749 | |
750 | static struct w1_family w1_family_19 = { |
751 | .fid = W1_FAMILY_DS28E17, |
752 | .fops = &w1_f19_fops, |
753 | }; |
754 | |
755 | module_w1_family(w1_family_19); |
756 | |