1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2/******************************************************************************
3 *
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
5 *
6 * Copyright (C) 2000 - 2019, Intel Corp.
7 *
8 *****************************************************************************/
9
10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
20 ******************************************************************************/
21
22/*
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
26 */
27#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
28#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
29#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
30#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
31#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
32#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
33#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
34#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
35#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
36#define ACPI_SIG_MTMR "MTMR" /* MID Timer table */
37#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
38#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
39#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
40#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
41#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
42#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
43#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
44#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
45#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
46
47/*
48 * All tables must be byte-packed to match the ACPI specification, since
49 * the tables are provided by the system BIOS.
50 */
51#pragma pack(1)
52
53/*
54 * Note: C bitfields are not used for this reason:
55 *
56 * "Bitfields are great and easy to read, but unfortunately the C language
57 * does not specify the layout of bitfields in memory, which means they are
58 * essentially useless for dealing with packed data in on-disk formats or
59 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
60 * this decision was a design error in C. Ritchie could have picked an order
61 * and stuck with it." Norman Ramsey.
62 * See http://stackoverflow.com/a/1053662/41661
63 */
64
65/*******************************************************************************
66 *
67 * IORT - IO Remapping Table
68 *
69 * Conforms to "IO Remapping Table System Software on ARM Platforms",
70 * Document number: ARM DEN 0049D, March 2018
71 *
72 ******************************************************************************/
73
74struct acpi_table_iort {
75 struct acpi_table_header header;
76 u32 node_count;
77 u32 node_offset;
78 u32 reserved;
79};
80
81/*
82 * IORT subtables
83 */
84struct acpi_iort_node {
85 u8 type;
86 u16 length;
87 u8 revision;
88 u32 reserved;
89 u32 mapping_count;
90 u32 mapping_offset;
91 char node_data[1];
92};
93
94/* Values for subtable Type above */
95
96enum acpi_iort_node_type {
97 ACPI_IORT_NODE_ITS_GROUP = 0x00,
98 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
99 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
100 ACPI_IORT_NODE_SMMU = 0x03,
101 ACPI_IORT_NODE_SMMU_V3 = 0x04,
102 ACPI_IORT_NODE_PMCG = 0x05
103};
104
105struct acpi_iort_id_mapping {
106 u32 input_base; /* Lowest value in input range */
107 u32 id_count; /* Number of IDs */
108 u32 output_base; /* Lowest value in output range */
109 u32 output_reference; /* A reference to the output node */
110 u32 flags;
111};
112
113/* Masks for Flags field above for IORT subtable */
114
115#define ACPI_IORT_ID_SINGLE_MAPPING (1)
116
117struct acpi_iort_memory_access {
118 u32 cache_coherency;
119 u8 hints;
120 u16 reserved;
121 u8 memory_flags;
122};
123
124/* Values for cache_coherency field above */
125
126#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
127#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
128
129/* Masks for Hints field above */
130
131#define ACPI_IORT_HT_TRANSIENT (1)
132#define ACPI_IORT_HT_WRITE (1<<1)
133#define ACPI_IORT_HT_READ (1<<2)
134#define ACPI_IORT_HT_OVERRIDE (1<<3)
135
136/* Masks for memory_flags field above */
137
138#define ACPI_IORT_MF_COHERENCY (1)
139#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
140
141/*
142 * IORT node specific subtables
143 */
144struct acpi_iort_its_group {
145 u32 its_count;
146 u32 identifiers[1]; /* GIC ITS identifier array */
147};
148
149struct acpi_iort_named_component {
150 u32 node_flags;
151 u64 memory_properties; /* Memory access properties */
152 u8 memory_address_limit; /* Memory address size limit */
153 char device_name[1]; /* Path of namespace object */
154};
155
156/* Masks for Flags field above */
157
158#define ACPI_IORT_NC_STALL_SUPPORTED (1)
159#define ACPI_IORT_NC_PASID_BITS (31<<1)
160
161struct acpi_iort_root_complex {
162 u64 memory_properties; /* Memory access properties */
163 u32 ats_attribute;
164 u32 pci_segment_number;
165 u8 memory_address_limit; /* Memory address size limit */
166 u8 reserved[3]; /* Reserved, must be zero */
167};
168
169/* Values for ats_attribute field above */
170
171#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
172#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
173
174struct acpi_iort_smmu {
175 u64 base_address; /* SMMU base address */
176 u64 span; /* Length of memory range */
177 u32 model;
178 u32 flags;
179 u32 global_interrupt_offset;
180 u32 context_interrupt_count;
181 u32 context_interrupt_offset;
182 u32 pmu_interrupt_count;
183 u32 pmu_interrupt_offset;
184 u64 interrupts[1]; /* Interrupt array */
185};
186
187/* Values for Model field above */
188
189#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
190#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
191#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
192#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
193#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
194#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
195
196/* Masks for Flags field above */
197
198#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
199#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
200
201/* Global interrupt format */
202
203struct acpi_iort_smmu_gsi {
204 u32 nsg_irpt;
205 u32 nsg_irpt_flags;
206 u32 nsg_cfg_irpt;
207 u32 nsg_cfg_irpt_flags;
208};
209
210struct acpi_iort_smmu_v3 {
211 u64 base_address; /* SMMUv3 base address */
212 u32 flags;
213 u32 reserved;
214 u64 vatos_address;
215 u32 model;
216 u32 event_gsiv;
217 u32 pri_gsiv;
218 u32 gerr_gsiv;
219 u32 sync_gsiv;
220 u32 pxm;
221 u32 id_mapping_index;
222};
223
224/* Values for Model field above */
225
226#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
227#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
228#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
229
230/* Masks for Flags field above */
231
232#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
233#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
234#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
235
236struct acpi_iort_pmcg {
237 u64 page0_base_address;
238 u32 overflow_gsiv;
239 u32 node_reference;
240 u64 page1_base_address;
241};
242
243/*******************************************************************************
244 *
245 * IVRS - I/O Virtualization Reporting Structure
246 * Version 1
247 *
248 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
249 * Revision 1.26, February 2009.
250 *
251 ******************************************************************************/
252
253struct acpi_table_ivrs {
254 struct acpi_table_header header; /* Common ACPI table header */
255 u32 info; /* Common virtualization info */
256 u64 reserved;
257};
258
259/* Values for Info field above */
260
261#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
262#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
263#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
264
265/* IVRS subtable header */
266
267struct acpi_ivrs_header {
268 u8 type; /* Subtable type */
269 u8 flags;
270 u16 length; /* Subtable length */
271 u16 device_id; /* ID of IOMMU */
272};
273
274/* Values for subtable Type above */
275
276enum acpi_ivrs_type {
277 ACPI_IVRS_TYPE_HARDWARE = 0x10,
278 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
279 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
280 ACPI_IVRS_TYPE_MEMORY3 = 0x22
281};
282
283/* Masks for Flags field above for IVHD subtable */
284
285#define ACPI_IVHD_TT_ENABLE (1)
286#define ACPI_IVHD_PASS_PW (1<<1)
287#define ACPI_IVHD_RES_PASS_PW (1<<2)
288#define ACPI_IVHD_ISOC (1<<3)
289#define ACPI_IVHD_IOTLB (1<<4)
290
291/* Masks for Flags field above for IVMD subtable */
292
293#define ACPI_IVMD_UNITY (1)
294#define ACPI_IVMD_READ (1<<1)
295#define ACPI_IVMD_WRITE (1<<2)
296#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
297
298/*
299 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
300 */
301
302/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
303
304struct acpi_ivrs_hardware {
305 struct acpi_ivrs_header header;
306 u16 capability_offset; /* Offset for IOMMU control fields */
307 u64 base_address; /* IOMMU control registers */
308 u16 pci_segment_group;
309 u16 info; /* MSI number and unit ID */
310 u32 reserved;
311};
312
313/* Masks for Info field above */
314
315#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
316#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
317
318/*
319 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
320 * Upper two bits of the Type field are the (encoded) length of the structure.
321 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
322 * are reserved for future use but not defined.
323 */
324struct acpi_ivrs_de_header {
325 u8 type;
326 u16 id;
327 u8 data_setting;
328};
329
330/* Length of device entry is in the top two bits of Type field above */
331
332#define ACPI_IVHD_ENTRY_LENGTH 0xC0
333
334/* Values for device entry Type field above */
335
336enum acpi_ivrs_device_entry_type {
337 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
338
339 ACPI_IVRS_TYPE_PAD4 = 0,
340 ACPI_IVRS_TYPE_ALL = 1,
341 ACPI_IVRS_TYPE_SELECT = 2,
342 ACPI_IVRS_TYPE_START = 3,
343 ACPI_IVRS_TYPE_END = 4,
344
345 /* 8-byte device entries */
346
347 ACPI_IVRS_TYPE_PAD8 = 64,
348 ACPI_IVRS_TYPE_NOT_USED = 65,
349 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
350 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
351 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
352 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
353 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses struct acpi_ivrs_device8c */
354};
355
356/* Values for Data field above */
357
358#define ACPI_IVHD_INIT_PASS (1)
359#define ACPI_IVHD_EINT_PASS (1<<1)
360#define ACPI_IVHD_NMI_PASS (1<<2)
361#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
362#define ACPI_IVHD_LINT0_PASS (1<<6)
363#define ACPI_IVHD_LINT1_PASS (1<<7)
364
365/* Types 0-4: 4-byte device entry */
366
367struct acpi_ivrs_device4 {
368 struct acpi_ivrs_de_header header;
369};
370
371/* Types 66-67: 8-byte device entry */
372
373struct acpi_ivrs_device8a {
374 struct acpi_ivrs_de_header header;
375 u8 reserved1;
376 u16 used_id;
377 u8 reserved2;
378};
379
380/* Types 70-71: 8-byte device entry */
381
382struct acpi_ivrs_device8b {
383 struct acpi_ivrs_de_header header;
384 u32 extended_data;
385};
386
387/* Values for extended_data above */
388
389#define ACPI_IVHD_ATS_DISABLED (1<<31)
390
391/* Type 72: 8-byte device entry */
392
393struct acpi_ivrs_device8c {
394 struct acpi_ivrs_de_header header;
395 u8 handle;
396 u16 used_id;
397 u8 variety;
398};
399
400/* Values for Variety field above */
401
402#define ACPI_IVHD_IOAPIC 1
403#define ACPI_IVHD_HPET 2
404
405/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
406
407struct acpi_ivrs_memory {
408 struct acpi_ivrs_header header;
409 u16 aux_data;
410 u64 reserved;
411 u64 start_address;
412 u64 memory_length;
413};
414
415/*******************************************************************************
416 *
417 * LPIT - Low Power Idle Table
418 *
419 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
420 *
421 ******************************************************************************/
422
423struct acpi_table_lpit {
424 struct acpi_table_header header; /* Common ACPI table header */
425};
426
427/* LPIT subtable header */
428
429struct acpi_lpit_header {
430 u32 type; /* Subtable type */
431 u32 length; /* Subtable length */
432 u16 unique_id;
433 u16 reserved;
434 u32 flags;
435};
436
437/* Values for subtable Type above */
438
439enum acpi_lpit_type {
440 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
441 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
442};
443
444/* Masks for Flags field above */
445
446#define ACPI_LPIT_STATE_DISABLED (1)
447#define ACPI_LPIT_NO_COUNTER (1<<1)
448
449/*
450 * LPIT subtables, correspond to Type in struct acpi_lpit_header
451 */
452
453/* 0x00: Native C-state instruction based LPI structure */
454
455struct acpi_lpit_native {
456 struct acpi_lpit_header header;
457 struct acpi_generic_address entry_trigger;
458 u32 residency;
459 u32 latency;
460 struct acpi_generic_address residency_counter;
461 u64 counter_frequency;
462};
463
464/*******************************************************************************
465 *
466 * MADT - Multiple APIC Description Table
467 * Version 3
468 *
469 ******************************************************************************/
470
471struct acpi_table_madt {
472 struct acpi_table_header header; /* Common ACPI table header */
473 u32 address; /* Physical address of local APIC */
474 u32 flags;
475};
476
477/* Masks for Flags field above */
478
479#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
480
481/* Values for PCATCompat flag */
482
483#define ACPI_MADT_DUAL_PIC 1
484#define ACPI_MADT_MULTIPLE_APIC 0
485
486/* Values for MADT subtable type in struct acpi_subtable_header */
487
488enum acpi_madt_type {
489 ACPI_MADT_TYPE_LOCAL_APIC = 0,
490 ACPI_MADT_TYPE_IO_APIC = 1,
491 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
492 ACPI_MADT_TYPE_NMI_SOURCE = 3,
493 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
494 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
495 ACPI_MADT_TYPE_IO_SAPIC = 6,
496 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
497 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
498 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
499 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
500 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
501 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
502 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
503 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
504 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
505 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */
506};
507
508/*
509 * MADT Subtables, correspond to Type in struct acpi_subtable_header
510 */
511
512/* 0: Processor Local APIC */
513
514struct acpi_madt_local_apic {
515 struct acpi_subtable_header header;
516 u8 processor_id; /* ACPI processor id */
517 u8 id; /* Processor's local APIC id */
518 u32 lapic_flags;
519};
520
521/* 1: IO APIC */
522
523struct acpi_madt_io_apic {
524 struct acpi_subtable_header header;
525 u8 id; /* I/O APIC ID */
526 u8 reserved; /* reserved - must be zero */
527 u32 address; /* APIC physical address */
528 u32 global_irq_base; /* Global system interrupt where INTI lines start */
529};
530
531/* 2: Interrupt Override */
532
533struct acpi_madt_interrupt_override {
534 struct acpi_subtable_header header;
535 u8 bus; /* 0 - ISA */
536 u8 source_irq; /* Interrupt source (IRQ) */
537 u32 global_irq; /* Global system interrupt */
538 u16 inti_flags;
539};
540
541/* 3: NMI Source */
542
543struct acpi_madt_nmi_source {
544 struct acpi_subtable_header header;
545 u16 inti_flags;
546 u32 global_irq; /* Global system interrupt */
547};
548
549/* 4: Local APIC NMI */
550
551struct acpi_madt_local_apic_nmi {
552 struct acpi_subtable_header header;
553 u8 processor_id; /* ACPI processor id */
554 u16 inti_flags;
555 u8 lint; /* LINTn to which NMI is connected */
556};
557
558/* 5: Address Override */
559
560struct acpi_madt_local_apic_override {
561 struct acpi_subtable_header header;
562 u16 reserved; /* Reserved, must be zero */
563 u64 address; /* APIC physical address */
564};
565
566/* 6: I/O Sapic */
567
568struct acpi_madt_io_sapic {
569 struct acpi_subtable_header header;
570 u8 id; /* I/O SAPIC ID */
571 u8 reserved; /* Reserved, must be zero */
572 u32 global_irq_base; /* Global interrupt for SAPIC start */
573 u64 address; /* SAPIC physical address */
574};
575
576/* 7: Local Sapic */
577
578struct acpi_madt_local_sapic {
579 struct acpi_subtable_header header;
580 u8 processor_id; /* ACPI processor id */
581 u8 id; /* SAPIC ID */
582 u8 eid; /* SAPIC EID */
583 u8 reserved[3]; /* Reserved, must be zero */
584 u32 lapic_flags;
585 u32 uid; /* Numeric UID - ACPI 3.0 */
586 char uid_string[1]; /* String UID - ACPI 3.0 */
587};
588
589/* 8: Platform Interrupt Source */
590
591struct acpi_madt_interrupt_source {
592 struct acpi_subtable_header header;
593 u16 inti_flags;
594 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
595 u8 id; /* Processor ID */
596 u8 eid; /* Processor EID */
597 u8 io_sapic_vector; /* Vector value for PMI interrupts */
598 u32 global_irq; /* Global system interrupt */
599 u32 flags; /* Interrupt Source Flags */
600};
601
602/* Masks for Flags field above */
603
604#define ACPI_MADT_CPEI_OVERRIDE (1)
605
606/* 9: Processor Local X2APIC (ACPI 4.0) */
607
608struct acpi_madt_local_x2apic {
609 struct acpi_subtable_header header;
610 u16 reserved; /* reserved - must be zero */
611 u32 local_apic_id; /* Processor x2APIC ID */
612 u32 lapic_flags;
613 u32 uid; /* ACPI processor UID */
614};
615
616/* 10: Local X2APIC NMI (ACPI 4.0) */
617
618struct acpi_madt_local_x2apic_nmi {
619 struct acpi_subtable_header header;
620 u16 inti_flags;
621 u32 uid; /* ACPI processor UID */
622 u8 lint; /* LINTn to which NMI is connected */
623 u8 reserved[3]; /* reserved - must be zero */
624};
625
626/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
627
628struct acpi_madt_generic_interrupt {
629 struct acpi_subtable_header header;
630 u16 reserved; /* reserved - must be zero */
631 u32 cpu_interface_number;
632 u32 uid;
633 u32 flags;
634 u32 parking_version;
635 u32 performance_interrupt;
636 u64 parked_address;
637 u64 base_address;
638 u64 gicv_base_address;
639 u64 gich_base_address;
640 u32 vgic_interrupt;
641 u64 gicr_base_address;
642 u64 arm_mpidr;
643 u8 efficiency_class;
644 u8 reserved2[1];
645 u16 spe_interrupt; /* ACPI 6.3 */
646};
647
648/* Masks for Flags field above */
649
650/* ACPI_MADT_ENABLED (1) Processor is usable if set */
651#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
652#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
653
654/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
655
656struct acpi_madt_generic_distributor {
657 struct acpi_subtable_header header;
658 u16 reserved; /* reserved - must be zero */
659 u32 gic_id;
660 u64 base_address;
661 u32 global_irq_base;
662 u8 version;
663 u8 reserved2[3]; /* reserved - must be zero */
664};
665
666/* Values for Version field above */
667
668enum acpi_madt_gic_version {
669 ACPI_MADT_GIC_VERSION_NONE = 0,
670 ACPI_MADT_GIC_VERSION_V1 = 1,
671 ACPI_MADT_GIC_VERSION_V2 = 2,
672 ACPI_MADT_GIC_VERSION_V3 = 3,
673 ACPI_MADT_GIC_VERSION_V4 = 4,
674 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
675};
676
677/* 13: Generic MSI Frame (ACPI 5.1) */
678
679struct acpi_madt_generic_msi_frame {
680 struct acpi_subtable_header header;
681 u16 reserved; /* reserved - must be zero */
682 u32 msi_frame_id;
683 u64 base_address;
684 u32 flags;
685 u16 spi_count;
686 u16 spi_base;
687};
688
689/* Masks for Flags field above */
690
691#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
692
693/* 14: Generic Redistributor (ACPI 5.1) */
694
695struct acpi_madt_generic_redistributor {
696 struct acpi_subtable_header header;
697 u16 reserved; /* reserved - must be zero */
698 u64 base_address;
699 u32 length;
700};
701
702/* 15: Generic Translator (ACPI 6.0) */
703
704struct acpi_madt_generic_translator {
705 struct acpi_subtable_header header;
706 u16 reserved; /* reserved - must be zero */
707 u32 translation_id;
708 u64 base_address;
709 u32 reserved2;
710};
711
712/*
713 * Common flags fields for MADT subtables
714 */
715
716/* MADT Local APIC flags */
717
718#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
719
720/* MADT MPS INTI flags (inti_flags) */
721
722#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
723#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
724
725/* Values for MPS INTI flags */
726
727#define ACPI_MADT_POLARITY_CONFORMS 0
728#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
729#define ACPI_MADT_POLARITY_RESERVED 2
730#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
731
732#define ACPI_MADT_TRIGGER_CONFORMS (0)
733#define ACPI_MADT_TRIGGER_EDGE (1<<2)
734#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
735#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
736
737/*******************************************************************************
738 *
739 * MCFG - PCI Memory Mapped Configuration table and subtable
740 * Version 1
741 *
742 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
743 *
744 ******************************************************************************/
745
746struct acpi_table_mcfg {
747 struct acpi_table_header header; /* Common ACPI table header */
748 u8 reserved[8];
749};
750
751/* Subtable */
752
753struct acpi_mcfg_allocation {
754 u64 address; /* Base address, processor-relative */
755 u16 pci_segment; /* PCI segment group number */
756 u8 start_bus_number; /* Starting PCI Bus number */
757 u8 end_bus_number; /* Final PCI Bus number */
758 u32 reserved;
759};
760
761/*******************************************************************************
762 *
763 * MCHI - Management Controller Host Interface Table
764 * Version 1
765 *
766 * Conforms to "Management Component Transport Protocol (MCTP) Host
767 * Interface Specification", Revision 1.0.0a, October 13, 2009
768 *
769 ******************************************************************************/
770
771struct acpi_table_mchi {
772 struct acpi_table_header header; /* Common ACPI table header */
773 u8 interface_type;
774 u8 protocol;
775 u64 protocol_data;
776 u8 interrupt_type;
777 u8 gpe;
778 u8 pci_device_flag;
779 u32 global_interrupt;
780 struct acpi_generic_address control_register;
781 u8 pci_segment;
782 u8 pci_bus;
783 u8 pci_device;
784 u8 pci_function;
785};
786
787/*******************************************************************************
788 *
789 * MPST - Memory Power State Table (ACPI 5.0)
790 * Version 1
791 *
792 ******************************************************************************/
793
794#define ACPI_MPST_CHANNEL_INFO \
795 u8 channel_id; \
796 u8 reserved1[3]; \
797 u16 power_node_count; \
798 u16 reserved2;
799
800/* Main table */
801
802struct acpi_table_mpst {
803 struct acpi_table_header header; /* Common ACPI table header */
804 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
805};
806
807/* Memory Platform Communication Channel Info */
808
809struct acpi_mpst_channel {
810 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
811};
812
813/* Memory Power Node Structure */
814
815struct acpi_mpst_power_node {
816 u8 flags;
817 u8 reserved1;
818 u16 node_id;
819 u32 length;
820 u64 range_address;
821 u64 range_length;
822 u32 num_power_states;
823 u32 num_physical_components;
824};
825
826/* Values for Flags field above */
827
828#define ACPI_MPST_ENABLED 1
829#define ACPI_MPST_POWER_MANAGED 2
830#define ACPI_MPST_HOT_PLUG_CAPABLE 4
831
832/* Memory Power State Structure (follows POWER_NODE above) */
833
834struct acpi_mpst_power_state {
835 u8 power_state;
836 u8 info_index;
837};
838
839/* Physical Component ID Structure (follows POWER_STATE above) */
840
841struct acpi_mpst_component {
842 u16 component_id;
843};
844
845/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
846
847struct acpi_mpst_data_hdr {
848 u16 characteristics_count;
849 u16 reserved;
850};
851
852struct acpi_mpst_power_data {
853 u8 structure_id;
854 u8 flags;
855 u16 reserved1;
856 u32 average_power;
857 u32 power_saving;
858 u64 exit_latency;
859 u64 reserved2;
860};
861
862/* Values for Flags field above */
863
864#define ACPI_MPST_PRESERVE 1
865#define ACPI_MPST_AUTOENTRY 2
866#define ACPI_MPST_AUTOEXIT 4
867
868/* Shared Memory Region (not part of an ACPI table) */
869
870struct acpi_mpst_shared {
871 u32 signature;
872 u16 pcc_command;
873 u16 pcc_status;
874 u32 command_register;
875 u32 status_register;
876 u32 power_state_id;
877 u32 power_node_id;
878 u64 energy_consumed;
879 u64 average_power;
880};
881
882/*******************************************************************************
883 *
884 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
885 * Version 1
886 *
887 ******************************************************************************/
888
889struct acpi_table_msct {
890 struct acpi_table_header header; /* Common ACPI table header */
891 u32 proximity_offset; /* Location of proximity info struct(s) */
892 u32 max_proximity_domains; /* Max number of proximity domains */
893 u32 max_clock_domains; /* Max number of clock domains */
894 u64 max_address; /* Max physical address in system */
895};
896
897/* subtable - Maximum Proximity Domain Information. Version 1 */
898
899struct acpi_msct_proximity {
900 u8 revision;
901 u8 length;
902 u32 range_start; /* Start of domain range */
903 u32 range_end; /* End of domain range */
904 u32 processor_capacity;
905 u64 memory_capacity; /* In bytes */
906};
907
908/*******************************************************************************
909 *
910 * MSDM - Microsoft Data Management table
911 *
912 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
913 * November 29, 2011. Copyright 2011 Microsoft
914 *
915 ******************************************************************************/
916
917/* Basic MSDM table is only the common ACPI header */
918
919struct acpi_table_msdm {
920 struct acpi_table_header header; /* Common ACPI table header */
921};
922
923/*******************************************************************************
924 *
925 * MTMR - MID Timer Table
926 * Version 1
927 *
928 * Conforms to "Simple Firmware Interface Specification",
929 * Draft 0.8.2, Oct 19, 2010
930 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
931 *
932 ******************************************************************************/
933
934struct acpi_table_mtmr {
935 struct acpi_table_header header; /* Common ACPI table header */
936};
937
938/* MTMR entry */
939
940struct acpi_mtmr_entry {
941 struct acpi_generic_address physical_address;
942 u32 frequency;
943 u32 irq;
944};
945
946/*******************************************************************************
947 *
948 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
949 * Version 1
950 *
951 ******************************************************************************/
952
953struct acpi_table_nfit {
954 struct acpi_table_header header; /* Common ACPI table header */
955 u32 reserved; /* Reserved, must be zero */
956};
957
958/* Subtable header for NFIT */
959
960struct acpi_nfit_header {
961 u16 type;
962 u16 length;
963};
964
965/* Values for subtable type in struct acpi_nfit_header */
966
967enum acpi_nfit_type {
968 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
969 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
970 ACPI_NFIT_TYPE_INTERLEAVE = 2,
971 ACPI_NFIT_TYPE_SMBIOS = 3,
972 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
973 ACPI_NFIT_TYPE_DATA_REGION = 5,
974 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
975 ACPI_NFIT_TYPE_CAPABILITIES = 7,
976 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
977};
978
979/*
980 * NFIT Subtables
981 */
982
983/* 0: System Physical Address Range Structure */
984
985struct acpi_nfit_system_address {
986 struct acpi_nfit_header header;
987 u16 range_index;
988 u16 flags;
989 u32 reserved; /* Reserved, must be zero */
990 u32 proximity_domain;
991 u8 range_guid[16];
992 u64 address;
993 u64 length;
994 u64 memory_mapping;
995};
996
997/* Flags */
998
999#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1000#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1001
1002/* Range Type GUIDs appear in the include/acuuid.h file */
1003
1004/* 1: Memory Device to System Address Range Map Structure */
1005
1006struct acpi_nfit_memory_map {
1007 struct acpi_nfit_header header;
1008 u32 device_handle;
1009 u16 physical_id;
1010 u16 region_id;
1011 u16 range_index;
1012 u16 region_index;
1013 u64 region_size;
1014 u64 region_offset;
1015 u64 address;
1016 u16 interleave_index;
1017 u16 interleave_ways;
1018 u16 flags;
1019 u16 reserved; /* Reserved, must be zero */
1020};
1021
1022/* Flags */
1023
1024#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1025#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1026#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1027#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1028#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1029#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1030#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1031
1032/* 2: Interleave Structure */
1033
1034struct acpi_nfit_interleave {
1035 struct acpi_nfit_header header;
1036 u16 interleave_index;
1037 u16 reserved; /* Reserved, must be zero */
1038 u32 line_count;
1039 u32 line_size;
1040 u32 line_offset[1]; /* Variable length */
1041};
1042
1043/* 3: SMBIOS Management Information Structure */
1044
1045struct acpi_nfit_smbios {
1046 struct acpi_nfit_header header;
1047 u32 reserved; /* Reserved, must be zero */
1048 u8 data[1]; /* Variable length */
1049};
1050
1051/* 4: NVDIMM Control Region Structure */
1052
1053struct acpi_nfit_control_region {
1054 struct acpi_nfit_header header;
1055 u16 region_index;
1056 u16 vendor_id;
1057 u16 device_id;
1058 u16 revision_id;
1059 u16 subsystem_vendor_id;
1060 u16 subsystem_device_id;
1061 u16 subsystem_revision_id;
1062 u8 valid_fields;
1063 u8 manufacturing_location;
1064 u16 manufacturing_date;
1065 u8 reserved[2]; /* Reserved, must be zero */
1066 u32 serial_number;
1067 u16 code;
1068 u16 windows;
1069 u64 window_size;
1070 u64 command_offset;
1071 u64 command_size;
1072 u64 status_offset;
1073 u64 status_size;
1074 u16 flags;
1075 u8 reserved1[6]; /* Reserved, must be zero */
1076};
1077
1078/* Flags */
1079
1080#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1081
1082/* valid_fields bits */
1083
1084#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1085
1086/* 5: NVDIMM Block Data Window Region Structure */
1087
1088struct acpi_nfit_data_region {
1089 struct acpi_nfit_header header;
1090 u16 region_index;
1091 u16 windows;
1092 u64 offset;
1093 u64 size;
1094 u64 capacity;
1095 u64 start_address;
1096};
1097
1098/* 6: Flush Hint Address Structure */
1099
1100struct acpi_nfit_flush_address {
1101 struct acpi_nfit_header header;
1102 u32 device_handle;
1103 u16 hint_count;
1104 u8 reserved[6]; /* Reserved, must be zero */
1105 u64 hint_address[1]; /* Variable length */
1106};
1107
1108/* 7: Platform Capabilities Structure */
1109
1110struct acpi_nfit_capabilities {
1111 struct acpi_nfit_header header;
1112 u8 highest_capability;
1113 u8 reserved[3]; /* Reserved, must be zero */
1114 u32 capabilities;
1115 u32 reserved2;
1116};
1117
1118/* Capabilities Flags */
1119
1120#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1121#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1122#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1123
1124/*
1125 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1126 */
1127struct nfit_device_handle {
1128 u32 handle;
1129};
1130
1131/* Device handle construction and extraction macros */
1132
1133#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1134#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1135#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1136#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1137#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1138
1139#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1140#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1141#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1142#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1143#define ACPI_NFIT_NODE_ID_OFFSET 16
1144
1145/* Macro to construct a NFIT/NVDIMM device handle */
1146
1147#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1148 ((dimm) | \
1149 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1150 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1151 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1152 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1153
1154/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1155
1156#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1157 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1158
1159#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1160 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1161
1162#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1163 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1164
1165#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1166 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1167
1168#define ACPI_NFIT_GET_NODE_ID(handle) \
1169 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1170
1171/*******************************************************************************
1172 *
1173 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1174 * Version 2 (ACPI 6.2)
1175 *
1176 ******************************************************************************/
1177
1178struct acpi_table_pcct {
1179 struct acpi_table_header header; /* Common ACPI table header */
1180 u32 flags;
1181 u64 reserved;
1182};
1183
1184/* Values for Flags field above */
1185
1186#define ACPI_PCCT_DOORBELL 1
1187
1188/* Values for subtable type in struct acpi_subtable_header */
1189
1190enum acpi_pcct_type {
1191 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1192 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1193 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1194 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1195 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1196 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */
1197};
1198
1199/*
1200 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
1201 */
1202
1203/* 0: Generic Communications Subspace */
1204
1205struct acpi_pcct_subspace {
1206 struct acpi_subtable_header header;
1207 u8 reserved[6];
1208 u64 base_address;
1209 u64 length;
1210 struct acpi_generic_address doorbell_register;
1211 u64 preserve_mask;
1212 u64 write_mask;
1213 u32 latency;
1214 u32 max_access_rate;
1215 u16 min_turnaround_time;
1216};
1217
1218/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1219
1220struct acpi_pcct_hw_reduced {
1221 struct acpi_subtable_header header;
1222 u32 platform_interrupt;
1223 u8 flags;
1224 u8 reserved;
1225 u64 base_address;
1226 u64 length;
1227 struct acpi_generic_address doorbell_register;
1228 u64 preserve_mask;
1229 u64 write_mask;
1230 u32 latency;
1231 u32 max_access_rate;
1232 u16 min_turnaround_time;
1233};
1234
1235/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1236
1237struct acpi_pcct_hw_reduced_type2 {
1238 struct acpi_subtable_header header;
1239 u32 platform_interrupt;
1240 u8 flags;
1241 u8 reserved;
1242 u64 base_address;
1243 u64 length;
1244 struct acpi_generic_address doorbell_register;
1245 u64 preserve_mask;
1246 u64 write_mask;
1247 u32 latency;
1248 u32 max_access_rate;
1249 u16 min_turnaround_time;
1250 struct acpi_generic_address platform_ack_register;
1251 u64 ack_preserve_mask;
1252 u64 ack_write_mask;
1253};
1254
1255/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1256
1257struct acpi_pcct_ext_pcc_master {
1258 struct acpi_subtable_header header;
1259 u32 platform_interrupt;
1260 u8 flags;
1261 u8 reserved1;
1262 u64 base_address;
1263 u32 length;
1264 struct acpi_generic_address doorbell_register;
1265 u64 preserve_mask;
1266 u64 write_mask;
1267 u32 latency;
1268 u32 max_access_rate;
1269 u32 min_turnaround_time;
1270 struct acpi_generic_address platform_ack_register;
1271 u64 ack_preserve_mask;
1272 u64 ack_set_mask;
1273 u64 reserved2;
1274 struct acpi_generic_address cmd_complete_register;
1275 u64 cmd_complete_mask;
1276 struct acpi_generic_address cmd_update_register;
1277 u64 cmd_update_preserve_mask;
1278 u64 cmd_update_set_mask;
1279 struct acpi_generic_address error_status_register;
1280 u64 error_status_mask;
1281};
1282
1283/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1284
1285struct acpi_pcct_ext_pcc_slave {
1286 struct acpi_subtable_header header;
1287 u32 platform_interrupt;
1288 u8 flags;
1289 u8 reserved1;
1290 u64 base_address;
1291 u32 length;
1292 struct acpi_generic_address doorbell_register;
1293 u64 preserve_mask;
1294 u64 write_mask;
1295 u32 latency;
1296 u32 max_access_rate;
1297 u32 min_turnaround_time;
1298 struct acpi_generic_address platform_ack_register;
1299 u64 ack_preserve_mask;
1300 u64 ack_set_mask;
1301 u64 reserved2;
1302 struct acpi_generic_address cmd_complete_register;
1303 u64 cmd_complete_mask;
1304 struct acpi_generic_address cmd_update_register;
1305 u64 cmd_update_preserve_mask;
1306 u64 cmd_update_set_mask;
1307 struct acpi_generic_address error_status_register;
1308 u64 error_status_mask;
1309};
1310
1311/* Values for doorbell flags above */
1312
1313#define ACPI_PCCT_INTERRUPT_POLARITY (1)
1314#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1315
1316/*
1317 * PCC memory structures (not part of the ACPI table)
1318 */
1319
1320/* Shared Memory Region */
1321
1322struct acpi_pcct_shared_memory {
1323 u32 signature;
1324 u16 command;
1325 u16 status;
1326};
1327
1328/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1329
1330struct acpi_pcct_ext_pcc_shared_memory {
1331 u32 signature;
1332 u32 flags;
1333 u32 length;
1334 u32 command;
1335};
1336
1337/*******************************************************************************
1338 *
1339 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1340 * Version 0
1341 *
1342 ******************************************************************************/
1343
1344struct acpi_table_pdtt {
1345 struct acpi_table_header header; /* Common ACPI table header */
1346 u8 trigger_count;
1347 u8 reserved[3];
1348 u32 array_offset;
1349};
1350
1351/*
1352 * PDTT Communication Channel Identifier Structure.
1353 * The number of these structures is defined by trigger_count above,
1354 * starting at array_offset.
1355 */
1356struct acpi_pdtt_channel {
1357 u8 subchannel_id;
1358 u8 flags;
1359};
1360
1361/* Flags for above */
1362
1363#define ACPI_PDTT_RUNTIME_TRIGGER (1)
1364#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1365#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
1366
1367/*******************************************************************************
1368 *
1369 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1370 * Version 1
1371 *
1372 ******************************************************************************/
1373
1374struct acpi_table_pmtt {
1375 struct acpi_table_header header; /* Common ACPI table header */
1376 u32 reserved;
1377};
1378
1379/* Common header for PMTT subtables that follow main table */
1380
1381struct acpi_pmtt_header {
1382 u8 type;
1383 u8 reserved1;
1384 u16 length;
1385 u16 flags;
1386 u16 reserved2;
1387};
1388
1389/* Values for Type field above */
1390
1391#define ACPI_PMTT_TYPE_SOCKET 0
1392#define ACPI_PMTT_TYPE_CONTROLLER 1
1393#define ACPI_PMTT_TYPE_DIMM 2
1394#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
1395
1396/* Values for Flags field above */
1397
1398#define ACPI_PMTT_TOP_LEVEL 0x0001
1399#define ACPI_PMTT_PHYSICAL 0x0002
1400#define ACPI_PMTT_MEMORY_TYPE 0x000C
1401
1402/*
1403 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
1404 */
1405
1406/* 0: Socket Structure */
1407
1408struct acpi_pmtt_socket {
1409 struct acpi_pmtt_header header;
1410 u16 socket_id;
1411 u16 reserved;
1412};
1413
1414/* 1: Memory Controller subtable */
1415
1416struct acpi_pmtt_controller {
1417 struct acpi_pmtt_header header;
1418 u32 read_latency;
1419 u32 write_latency;
1420 u32 read_bandwidth;
1421 u32 write_bandwidth;
1422 u16 access_width;
1423 u16 alignment;
1424 u16 reserved;
1425 u16 domain_count;
1426};
1427
1428/* 1a: Proximity Domain substructure */
1429
1430struct acpi_pmtt_domain {
1431 u32 proximity_domain;
1432};
1433
1434/* 2: Physical Component Identifier (DIMM) */
1435
1436struct acpi_pmtt_physical_component {
1437 struct acpi_pmtt_header header;
1438 u16 component_id;
1439 u16 reserved;
1440 u32 memory_size;
1441 u32 bios_handle;
1442};
1443
1444/*******************************************************************************
1445 *
1446 * PPTT - Processor Properties Topology Table (ACPI 6.2)
1447 * Version 1
1448 *
1449 ******************************************************************************/
1450
1451struct acpi_table_pptt {
1452 struct acpi_table_header header; /* Common ACPI table header */
1453};
1454
1455/* Values for Type field above */
1456
1457enum acpi_pptt_type {
1458 ACPI_PPTT_TYPE_PROCESSOR = 0,
1459 ACPI_PPTT_TYPE_CACHE = 1,
1460 ACPI_PPTT_TYPE_ID = 2,
1461 ACPI_PPTT_TYPE_RESERVED = 3
1462};
1463
1464/* 0: Processor Hierarchy Node Structure */
1465
1466struct acpi_pptt_processor {
1467 struct acpi_subtable_header header;
1468 u16 reserved;
1469 u32 flags;
1470 u32 parent;
1471 u32 acpi_processor_id;
1472 u32 number_of_priv_resources;
1473};
1474
1475/* Flags */
1476
1477#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
1478#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
1479#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
1480#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
1481#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
1482
1483/* 1: Cache Type Structure */
1484
1485struct acpi_pptt_cache {
1486 struct acpi_subtable_header header;
1487 u16 reserved;
1488 u32 flags;
1489 u32 next_level_of_cache;
1490 u32 size;
1491 u32 number_of_sets;
1492 u8 associativity;
1493 u8 attributes;
1494 u16 line_size;
1495};
1496
1497/* Flags */
1498
1499#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
1500#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
1501#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
1502#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
1503#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
1504#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
1505#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
1506
1507/* Masks for Attributes */
1508
1509#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
1510#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
1511#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
1512
1513/* Attributes describing cache */
1514#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
1515#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
1516#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
1517#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
1518
1519#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
1520#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
1521#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
1522#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
1523
1524#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
1525#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
1526
1527/* 2: ID Structure */
1528
1529struct acpi_pptt_id {
1530 struct acpi_subtable_header header;
1531 u16 reserved;
1532 u32 vendor_id;
1533 u64 level1_id;
1534 u64 level2_id;
1535 u16 major_rev;
1536 u16 minor_rev;
1537 u16 spin_rev;
1538};
1539
1540/*******************************************************************************
1541 *
1542 * RASF - RAS Feature Table (ACPI 5.0)
1543 * Version 1
1544 *
1545 ******************************************************************************/
1546
1547struct acpi_table_rasf {
1548 struct acpi_table_header header; /* Common ACPI table header */
1549 u8 channel_id[12];
1550};
1551
1552/* RASF Platform Communication Channel Shared Memory Region */
1553
1554struct acpi_rasf_shared_memory {
1555 u32 signature;
1556 u16 command;
1557 u16 status;
1558 u16 version;
1559 u8 capabilities[16];
1560 u8 set_capabilities[16];
1561 u16 num_parameter_blocks;
1562 u32 set_capabilities_status;
1563};
1564
1565/* RASF Parameter Block Structure Header */
1566
1567struct acpi_rasf_parameter_block {
1568 u16 type;
1569 u16 version;
1570 u16 length;
1571};
1572
1573/* RASF Parameter Block Structure for PATROL_SCRUB */
1574
1575struct acpi_rasf_patrol_scrub_parameter {
1576 struct acpi_rasf_parameter_block header;
1577 u16 patrol_scrub_command;
1578 u64 requested_address_range[2];
1579 u64 actual_address_range[2];
1580 u16 flags;
1581 u8 requested_speed;
1582};
1583
1584/* Masks for Flags and Speed fields above */
1585
1586#define ACPI_RASF_SCRUBBER_RUNNING 1
1587#define ACPI_RASF_SPEED (7<<1)
1588#define ACPI_RASF_SPEED_SLOW (0<<1)
1589#define ACPI_RASF_SPEED_MEDIUM (4<<1)
1590#define ACPI_RASF_SPEED_FAST (7<<1)
1591
1592/* Channel Commands */
1593
1594enum acpi_rasf_commands {
1595 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
1596};
1597
1598/* Platform RAS Capabilities */
1599
1600enum acpi_rasf_capabiliities {
1601 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
1602 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
1603};
1604
1605/* Patrol Scrub Commands */
1606
1607enum acpi_rasf_patrol_scrub_commands {
1608 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
1609 ACPI_RASF_START_PATROL_SCRUBBER = 2,
1610 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
1611};
1612
1613/* Channel Command flags */
1614
1615#define ACPI_RASF_GENERATE_SCI (1<<15)
1616
1617/* Status values */
1618
1619enum acpi_rasf_status {
1620 ACPI_RASF_SUCCESS = 0,
1621 ACPI_RASF_NOT_VALID = 1,
1622 ACPI_RASF_NOT_SUPPORTED = 2,
1623 ACPI_RASF_BUSY = 3,
1624 ACPI_RASF_FAILED = 4,
1625 ACPI_RASF_ABORTED = 5,
1626 ACPI_RASF_INVALID_DATA = 6
1627};
1628
1629/* Status flags */
1630
1631#define ACPI_RASF_COMMAND_COMPLETE (1)
1632#define ACPI_RASF_SCI_DOORBELL (1<<1)
1633#define ACPI_RASF_ERROR (1<<2)
1634#define ACPI_RASF_STATUS (0x1F<<3)
1635
1636/*******************************************************************************
1637 *
1638 * SBST - Smart Battery Specification Table
1639 * Version 1
1640 *
1641 ******************************************************************************/
1642
1643struct acpi_table_sbst {
1644 struct acpi_table_header header; /* Common ACPI table header */
1645 u32 warning_level;
1646 u32 low_level;
1647 u32 critical_level;
1648};
1649
1650/*******************************************************************************
1651 *
1652 * SDEI - Software Delegated Exception Interface Descriptor Table
1653 *
1654 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
1655 * May 8th, 2017. Copyright 2017 ARM Ltd.
1656 *
1657 ******************************************************************************/
1658
1659struct acpi_table_sdei {
1660 struct acpi_table_header header; /* Common ACPI table header */
1661};
1662
1663/*******************************************************************************
1664 *
1665 * SDEV - Secure Devices Table (ACPI 6.2)
1666 * Version 1
1667 *
1668 ******************************************************************************/
1669
1670struct acpi_table_sdev {
1671 struct acpi_table_header header; /* Common ACPI table header */
1672};
1673
1674struct acpi_sdev_header {
1675 u8 type;
1676 u8 flags;
1677 u16 length;
1678};
1679
1680/* Values for subtable type above */
1681
1682enum acpi_sdev_type {
1683 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
1684 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
1685 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1686};
1687
1688/* Values for flags above */
1689
1690#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
1691
1692/*
1693 * SDEV subtables
1694 */
1695
1696/* 0: Namespace Device Based Secure Device Structure */
1697
1698struct acpi_sdev_namespace {
1699 struct acpi_sdev_header header;
1700 u16 device_id_offset;
1701 u16 device_id_length;
1702 u16 vendor_data_offset;
1703 u16 vendor_data_length;
1704};
1705
1706/* 1: PCIe Endpoint Device Based Device Structure */
1707
1708struct acpi_sdev_pcie {
1709 struct acpi_sdev_header header;
1710 u16 segment;
1711 u16 start_bus;
1712 u16 path_offset;
1713 u16 path_length;
1714 u16 vendor_data_offset;
1715 u16 vendor_data_length;
1716};
1717
1718/* 1a: PCIe Endpoint path entry */
1719
1720struct acpi_sdev_pcie_path {
1721 u8 device;
1722 u8 function;
1723};
1724
1725/* Reset to default packing */
1726
1727#pragma pack()
1728
1729#endif /* __ACTBL2_H__ */
1730