1 | /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ |
2 | /* |
3 | * Copyright (c) 2019 Amlogic, Inc. All rights reserved. |
4 | * Author: Jian Hu <jian.hu@amlogic.com> |
5 | * |
6 | * Copyright (c) 2023, SberDevices. All Rights Reserved. |
7 | * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru> |
8 | */ |
9 | |
10 | #ifndef __A1_PERIPHERALS_CLKC_H |
11 | #define __A1_PERIPHERALS_CLKC_H |
12 | |
13 | #define CLKID_XTAL_IN 0 |
14 | #define CLKID_FIXPLL_IN 1 |
15 | #define CLKID_USB_PHY_IN 2 |
16 | #define CLKID_USB_CTRL_IN 3 |
17 | #define CLKID_HIFIPLL_IN 4 |
18 | #define CLKID_SYSPLL_IN 5 |
19 | #define CLKID_DDS_IN 6 |
20 | #define CLKID_SYS 7 |
21 | #define CLKID_CLKTREE 8 |
22 | #define CLKID_RESET_CTRL 9 |
23 | #define CLKID_ANALOG_CTRL 10 |
24 | #define CLKID_PWR_CTRL 11 |
25 | #define CLKID_PAD_CTRL 12 |
26 | #define CLKID_SYS_CTRL 13 |
27 | #define CLKID_TEMP_SENSOR 14 |
28 | #define CLKID_AM2AXI_DIV 15 |
29 | #define CLKID_SPICC_B 16 |
30 | #define CLKID_SPICC_A 17 |
31 | #define CLKID_MSR 18 |
32 | #define CLKID_AUDIO 19 |
33 | #define CLKID_JTAG_CTRL 20 |
34 | #define CLKID_SARADC_EN 21 |
35 | #define CLKID_PWM_EF 22 |
36 | #define CLKID_PWM_CD 23 |
37 | #define CLKID_PWM_AB 24 |
38 | #define CLKID_CEC 25 |
39 | #define CLKID_I2C_S 26 |
40 | #define CLKID_IR_CTRL 27 |
41 | #define CLKID_I2C_M_D 28 |
42 | #define CLKID_I2C_M_C 29 |
43 | #define CLKID_I2C_M_B 30 |
44 | #define CLKID_I2C_M_A 31 |
45 | #define CLKID_ACODEC 32 |
46 | #define CLKID_OTP 33 |
47 | #define CLKID_SD_EMMC_A 34 |
48 | #define CLKID_USB_PHY 35 |
49 | #define CLKID_USB_CTRL 36 |
50 | #define CLKID_SYS_DSPB 37 |
51 | #define CLKID_SYS_DSPA 38 |
52 | #define CLKID_DMA 39 |
53 | #define CLKID_IRQ_CTRL 40 |
54 | #define CLKID_NIC 41 |
55 | #define CLKID_GIC 42 |
56 | #define CLKID_UART_C 43 |
57 | #define CLKID_UART_B 44 |
58 | #define CLKID_UART_A 45 |
59 | #define CLKID_SYS_PSRAM 46 |
60 | #define CLKID_RSA 47 |
61 | #define CLKID_CORESIGHT 48 |
62 | #define CLKID_AM2AXI_VAD 49 |
63 | #define CLKID_AUDIO_VAD 50 |
64 | #define CLKID_AXI_DMC 51 |
65 | #define CLKID_AXI_PSRAM 52 |
66 | #define CLKID_RAMB 53 |
67 | #define CLKID_RAMA 54 |
68 | #define CLKID_AXI_SPIFC 55 |
69 | #define CLKID_AXI_NIC 56 |
70 | #define CLKID_AXI_DMA 57 |
71 | #define CLKID_CPU_CTRL 58 |
72 | #define CLKID_ROM 59 |
73 | #define CLKID_PROC_I2C 60 |
74 | #define CLKID_DSPA_SEL 61 |
75 | #define CLKID_DSPB_SEL 62 |
76 | #define CLKID_DSPA_EN 63 |
77 | #define CLKID_DSPA_EN_NIC 64 |
78 | #define CLKID_DSPB_EN 65 |
79 | #define CLKID_DSPB_EN_NIC 66 |
80 | #define CLKID_RTC 67 |
81 | #define CLKID_CECA_32K 68 |
82 | #define CLKID_CECB_32K 69 |
83 | #define CLKID_24M 70 |
84 | #define CLKID_12M 71 |
85 | #define CLKID_FCLK_DIV2_DIVN 72 |
86 | #define CLKID_GEN 73 |
87 | #define CLKID_SARADC_SEL 74 |
88 | #define CLKID_SARADC 75 |
89 | #define CLKID_PWM_A 76 |
90 | #define CLKID_PWM_B 77 |
91 | #define CLKID_PWM_C 78 |
92 | #define CLKID_PWM_D 79 |
93 | #define CLKID_PWM_E 80 |
94 | #define CLKID_PWM_F 81 |
95 | #define CLKID_SPICC 82 |
96 | #define CLKID_TS 83 |
97 | #define CLKID_SPIFC 84 |
98 | #define CLKID_USB_BUS 85 |
99 | #define CLKID_SD_EMMC 86 |
100 | #define CLKID_PSRAM 87 |
101 | #define CLKID_DMC 88 |
102 | #define CLKID_SYS_A_SEL 89 |
103 | #define CLKID_SYS_A_DIV 90 |
104 | #define CLKID_SYS_A 91 |
105 | #define CLKID_SYS_B_SEL 92 |
106 | #define CLKID_SYS_B_DIV 93 |
107 | #define CLKID_SYS_B 94 |
108 | #define CLKID_DSPA_A_SEL 95 |
109 | #define CLKID_DSPA_A_DIV 96 |
110 | #define CLKID_DSPA_A 97 |
111 | #define CLKID_DSPA_B_SEL 98 |
112 | #define CLKID_DSPA_B_DIV 99 |
113 | #define CLKID_DSPA_B 100 |
114 | #define CLKID_DSPB_A_SEL 101 |
115 | #define CLKID_DSPB_A_DIV 102 |
116 | #define CLKID_DSPB_A 103 |
117 | #define CLKID_DSPB_B_SEL 104 |
118 | #define CLKID_DSPB_B_DIV 105 |
119 | #define CLKID_DSPB_B 106 |
120 | #define CLKID_RTC_32K_IN 107 |
121 | #define CLKID_RTC_32K_DIV 108 |
122 | #define CLKID_RTC_32K_XTAL 109 |
123 | #define CLKID_RTC_32K_SEL 110 |
124 | #define CLKID_CECB_32K_IN 111 |
125 | #define CLKID_CECB_32K_DIV 112 |
126 | #define CLKID_CECB_32K_SEL_PRE 113 |
127 | #define CLKID_CECB_32K_SEL 114 |
128 | #define CLKID_CECA_32K_IN 115 |
129 | #define CLKID_CECA_32K_DIV 116 |
130 | #define CLKID_CECA_32K_SEL_PRE 117 |
131 | #define CLKID_CECA_32K_SEL 118 |
132 | #define CLKID_DIV2_PRE 119 |
133 | #define CLKID_24M_DIV2 120 |
134 | #define CLKID_GEN_SEL 121 |
135 | #define CLKID_GEN_DIV 122 |
136 | #define CLKID_SARADC_DIV 123 |
137 | #define CLKID_PWM_A_SEL 124 |
138 | #define CLKID_PWM_A_DIV 125 |
139 | #define CLKID_PWM_B_SEL 126 |
140 | #define CLKID_PWM_B_DIV 127 |
141 | #define CLKID_PWM_C_SEL 128 |
142 | #define CLKID_PWM_C_DIV 129 |
143 | #define CLKID_PWM_D_SEL 130 |
144 | #define CLKID_PWM_D_DIV 131 |
145 | #define CLKID_PWM_E_SEL 132 |
146 | #define CLKID_PWM_E_DIV 133 |
147 | #define CLKID_PWM_F_SEL 134 |
148 | #define CLKID_PWM_F_DIV 135 |
149 | #define CLKID_SPICC_SEL 136 |
150 | #define CLKID_SPICC_DIV 137 |
151 | #define CLKID_SPICC_SEL2 138 |
152 | #define CLKID_TS_DIV 139 |
153 | #define CLKID_SPIFC_SEL 140 |
154 | #define CLKID_SPIFC_DIV 141 |
155 | #define CLKID_SPIFC_SEL2 142 |
156 | #define CLKID_USB_BUS_SEL 143 |
157 | #define CLKID_USB_BUS_DIV 144 |
158 | #define CLKID_SD_EMMC_SEL 145 |
159 | #define CLKID_SD_EMMC_DIV 146 |
160 | #define CLKID_SD_EMMC_SEL2 147 |
161 | #define CLKID_PSRAM_SEL 148 |
162 | #define CLKID_PSRAM_DIV 149 |
163 | #define CLKID_PSRAM_SEL2 150 |
164 | #define CLKID_DMC_SEL 151 |
165 | #define CLKID_DMC_DIV 152 |
166 | #define CLKID_DMC_SEL2 153 |
167 | |
168 | #endif /* __A1_PERIPHERALS_CLKC_H */ |
169 | |