1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | |
3 | #ifndef __DT_BINDINGS_CLOCK_BCM6318_H |
4 | #define __DT_BINDINGS_CLOCK_BCM6318_H |
5 | |
6 | #define BCM6318_CLK_ADSL_ASB 0 |
7 | #define BCM6318_CLK_USB_ASB 1 |
8 | #define BCM6318_CLK_MIPS_ASB 2 |
9 | #define BCM6318_CLK_PCIE_ASB 3 |
10 | #define BCM6318_CLK_PHYMIPS_ASB 4 |
11 | #define BCM6318_CLK_ROBOSW_ASB 5 |
12 | #define BCM6318_CLK_SAR_ASB 6 |
13 | #define BCM6318_CLK_SDR_ASB 7 |
14 | #define BCM6318_CLK_SWREG_ASB 8 |
15 | #define BCM6318_CLK_PERIPH_ASB 9 |
16 | #define BCM6318_CLK_CPUBUS160 10 |
17 | #define BCM6318_CLK_ADSL 11 |
18 | #define BCM6318_CLK_SAR125 12 |
19 | #define BCM6318_CLK_MIPS 13 |
20 | #define BCM6318_CLK_PCIE 14 |
21 | #define BCM6318_CLK_ROBOSW250 16 |
22 | #define BCM6318_CLK_ROBOSW025 17 |
23 | #define BCM6318_CLK_SDR 19 |
24 | #define BCM6318_CLK_USBD 20 |
25 | #define BCM6318_CLK_HSSPI 25 |
26 | #define BCM6318_CLK_PCIE25 27 |
27 | #define BCM6318_CLK_PHYMIPS 28 |
28 | #define BCM6318_CLK_AFE 29 |
29 | #define BCM6318_CLK_QPROC 30 |
30 | |
31 | #define BCM6318_UCLK_ADSL 0 |
32 | #define BCM6318_UCLK_ARB 1 |
33 | #define BCM6318_UCLK_MIPS 2 |
34 | #define BCM6318_UCLK_PCIE 3 |
35 | #define BCM6318_UCLK_PERIPH 4 |
36 | #define BCM6318_UCLK_PHYMIPS 5 |
37 | #define BCM6318_UCLK_ROBOSW 6 |
38 | #define BCM6318_UCLK_SAR 7 |
39 | #define BCM6318_UCLK_SDR 8 |
40 | #define BCM6318_UCLK_USB 9 |
41 | |
42 | #endif /* __DT_BINDINGS_CLOCK_BCM6318_H */ |
43 | |