1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * Copyright 2017 Texas Instruments, Inc. |
4 | */ |
5 | #ifndef __DT_BINDINGS_CLK_DM814_H |
6 | #define __DT_BINDINGS_CLK_DM814_H |
7 | |
8 | #define DM814_CLKCTRL_OFFSET 0x0 |
9 | #define DM814_CLKCTRL_INDEX(offset) ((offset) - DM814_CLKCTRL_OFFSET) |
10 | |
11 | /* default clocks */ |
12 | #define DM814_USB_OTG_HS_CLKCTRL DM814_CLKCTRL_INDEX(0x58) |
13 | |
14 | /* alwon clocks */ |
15 | #define DM814_UART1_CLKCTRL DM814_CLKCTRL_INDEX(0x150) |
16 | #define DM814_UART2_CLKCTRL DM814_CLKCTRL_INDEX(0x154) |
17 | #define DM814_UART3_CLKCTRL DM814_CLKCTRL_INDEX(0x158) |
18 | #define DM814_GPIO1_CLKCTRL DM814_CLKCTRL_INDEX(0x15c) |
19 | #define DM814_GPIO2_CLKCTRL DM814_CLKCTRL_INDEX(0x160) |
20 | #define DM814_I2C1_CLKCTRL DM814_CLKCTRL_INDEX(0x164) |
21 | #define DM814_I2C2_CLKCTRL DM814_CLKCTRL_INDEX(0x168) |
22 | #define DM814_WD_TIMER_CLKCTRL DM814_CLKCTRL_INDEX(0x18c) |
23 | #define DM814_MCSPI1_CLKCTRL DM814_CLKCTRL_INDEX(0x190) |
24 | #define DM814_GPMC_CLKCTRL DM814_CLKCTRL_INDEX(0x1d0) |
25 | #define DM814_CPGMAC0_CLKCTRL DM814_CLKCTRL_INDEX(0x1d4) |
26 | #define DM814_MPU_CLKCTRL DM814_CLKCTRL_INDEX(0x1dc) |
27 | #define DM814_RTC_CLKCTRL DM814_CLKCTRL_INDEX(0x1f0) |
28 | #define DM814_TPCC_CLKCTRL DM814_CLKCTRL_INDEX(0x1f4) |
29 | #define DM814_TPTC0_CLKCTRL DM814_CLKCTRL_INDEX(0x1f8) |
30 | #define DM814_TPTC1_CLKCTRL DM814_CLKCTRL_INDEX(0x1fc) |
31 | #define DM814_TPTC2_CLKCTRL DM814_CLKCTRL_INDEX(0x200) |
32 | #define DM814_TPTC3_CLKCTRL DM814_CLKCTRL_INDEX(0x204) |
33 | #define DM814_MMC1_CLKCTRL DM814_CLKCTRL_INDEX(0x21c) |
34 | #define DM814_MMC2_CLKCTRL DM814_CLKCTRL_INDEX(0x220) |
35 | #define DM814_MMC3_CLKCTRL DM814_CLKCTRL_INDEX(0x224) |
36 | |
37 | /* alwon_ethernet clocks */ |
38 | #define DM814_ETHERNET_CLKCTRL_OFFSET 0x1d4 |
39 | #define DM814_ETHERNET_CLKCTRL_INDEX(offset) ((offset) - DM814_ETHERNET_CLKCTRL_OFFSET) |
40 | #define DM814_ETHERNET_CPGMAC0_CLKCTRL DM814_ETHERNET_CLKCTRL_INDEX(0x1d4) |
41 | |
42 | #endif |
43 | |