| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Device Tree defines for Lochnagar clocking |
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| 4 | * |
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| 5 | * Copyright (c) 2017-2018 Cirrus Logic, Inc. and |
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| 6 | * Cirrus Logic International Semiconductor Ltd. |
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| 7 | * |
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| 8 | * Author: Charles Keepax <ckeepax@opensource.cirrus.com> |
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| 9 | */ |
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| 10 | |
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| 11 | #ifndef DT_BINDINGS_CLK_LOCHNAGAR_H |
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| 12 | #define DT_BINDINGS_CLK_LOCHNAGAR_H |
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| 13 | |
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| 14 | #define LOCHNAGAR_CDC_MCLK1 0 |
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| 15 | #define LOCHNAGAR_CDC_MCLK2 1 |
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| 16 | #define LOCHNAGAR_DSP_CLKIN 2 |
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| 17 | #define LOCHNAGAR_GF_CLKOUT1 3 |
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| 18 | #define LOCHNAGAR_GF_CLKOUT2 4 |
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| 19 | #define LOCHNAGAR_PSIA1_MCLK 5 |
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| 20 | #define LOCHNAGAR_PSIA2_MCLK 6 |
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| 21 | #define LOCHNAGAR_SPDIF_MCLK 7 |
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| 22 | #define LOCHNAGAR_ADAT_MCLK 8 |
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| 23 | #define LOCHNAGAR_SOUNDCARD_MCLK 9 |
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| 24 | #define LOCHNAGAR_SPDIF_CLKOUT 10 |
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| 25 | |
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| 26 | #endif |
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| 27 | |
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