1 | /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ |
2 | /* |
3 | * Copyright (c) 2021 Microchip Inc. |
4 | * |
5 | * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> |
6 | */ |
7 | |
8 | #ifndef _DT_BINDINGS_CLK_LAN966X_H |
9 | #define _DT_BINDINGS_CLK_LAN966X_H |
10 | |
11 | #define GCK_ID_QSPI0 0 |
12 | #define GCK_ID_QSPI1 1 |
13 | #define GCK_ID_QSPI2 2 |
14 | #define GCK_ID_SDMMC0 3 |
15 | #define GCK_ID_PI 4 |
16 | #define GCK_ID_MCAN0 5 |
17 | #define GCK_ID_MCAN1 6 |
18 | #define GCK_ID_FLEXCOM0 7 |
19 | #define GCK_ID_FLEXCOM1 8 |
20 | #define GCK_ID_FLEXCOM2 9 |
21 | #define GCK_ID_FLEXCOM3 10 |
22 | #define GCK_ID_FLEXCOM4 11 |
23 | #define GCK_ID_TIMER 12 |
24 | #define GCK_ID_USB_REFCLK 13 |
25 | |
26 | /* Gate clocks */ |
27 | #define GCK_GATE_UHPHS 14 |
28 | #define GCK_GATE_UDPHS 15 |
29 | #define GCK_GATE_MCRAMC 16 |
30 | #define GCK_GATE_HMATRIX 17 |
31 | |
32 | #define N_CLOCKS 18 |
33 | |
34 | #endif |
35 | |