| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
|---|---|
| 2 | /* |
| 3 | * Copyright (c) 2019 Microchip Inc. |
| 4 | * |
| 5 | * Author: Lars Povlsen <lars.povlsen@microchip.com> |
| 6 | */ |
| 7 | |
| 8 | #ifndef _DT_BINDINGS_CLK_SPARX5_H |
| 9 | #define _DT_BINDINGS_CLK_SPARX5_H |
| 10 | |
| 11 | #define CLK_ID_CORE 0 |
| 12 | #define CLK_ID_DDR 1 |
| 13 | #define CLK_ID_CPU2 2 |
| 14 | #define CLK_ID_ARM2 3 |
| 15 | #define CLK_ID_AUX1 4 |
| 16 | #define CLK_ID_AUX2 5 |
| 17 | #define CLK_ID_AUX3 6 |
| 18 | #define CLK_ID_AUX4 7 |
| 19 | #define CLK_ID_SYNCE 8 |
| 20 | |
| 21 | #define N_CLOCKS 9 |
| 22 | |
| 23 | #endif |
| 24 |