1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * Inspired by original work from pxa2xx-regs.h by Nicolas Pitre |
4 | * Copyright (C) 2014 Robert Jarzmik |
5 | */ |
6 | |
7 | #ifndef __DT_BINDINGS_CLOCK_PXA2XX_H__ |
8 | #define __DT_BINDINGS_CLOCK_PXA2XX_H__ |
9 | |
10 | #define CLK_NONE 0 |
11 | #define CLK_1WIRE 1 |
12 | #define CLK_AC97 2 |
13 | #define CLK_AC97CONF 3 |
14 | #define CLK_ASSP 4 |
15 | #define CLK_BOOT 5 |
16 | #define CLK_BTUART 6 |
17 | #define CLK_CAMERA 7 |
18 | #define CLK_CIR 8 |
19 | #define CLK_CORE 9 |
20 | #define CLK_DMC 10 |
21 | #define CLK_FFUART 11 |
22 | #define CLK_FICP 12 |
23 | #define CLK_GPIO 13 |
24 | #define CLK_HSIO2 14 |
25 | #define CLK_HWUART 15 |
26 | #define CLK_I2C 16 |
27 | #define CLK_I2S 17 |
28 | #define CLK_IM 18 |
29 | #define CLK_INC 19 |
30 | #define CLK_ISC 20 |
31 | #define CLK_KEYPAD 21 |
32 | #define CLK_LCD 22 |
33 | #define CLK_MEMC 23 |
34 | #define CLK_MEMSTK 24 |
35 | #define CLK_MINI_IM 25 |
36 | #define CLK_MINI_LCD 26 |
37 | #define CLK_MMC 27 |
38 | #define CLK_MMC1 28 |
39 | #define CLK_MMC2 29 |
40 | #define CLK_MMC3 30 |
41 | #define CLK_MSL 31 |
42 | #define CLK_MSL0 32 |
43 | #define CLK_MVED 33 |
44 | #define CLK_NAND 34 |
45 | #define CLK_NSSP 35 |
46 | #define CLK_OSTIMER 36 |
47 | #define CLK_PWM0 37 |
48 | #define CLK_PWM1 38 |
49 | #define CLK_PWM2 39 |
50 | #define CLK_PWM3 40 |
51 | #define CLK_PWRI2C 41 |
52 | #define CLK_PXA300_GCU 42 |
53 | #define CLK_PXA320_GCU 43 |
54 | #define CLK_SMC 44 |
55 | #define CLK_SSP 45 |
56 | #define CLK_SSP1 46 |
57 | #define CLK_SSP2 47 |
58 | #define CLK_SSP3 48 |
59 | #define CLK_SSP4 49 |
60 | #define CLK_STUART 50 |
61 | #define CLK_TOUCH 51 |
62 | #define CLK_TPM 52 |
63 | #define CLK_UDC 53 |
64 | #define CLK_USB 54 |
65 | #define CLK_USB2 55 |
66 | #define CLK_USBH 56 |
67 | #define CLK_USBHOST 57 |
68 | #define CLK_USIM 58 |
69 | #define CLK_USIM1 59 |
70 | #define CLK_USMI0 60 |
71 | #define CLK_OSC32k768 61 |
72 | #define CLK_MAX 62 |
73 | |
74 | #endif |
75 | |