1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2/*
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
4 */
5
6#ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_SM8450_H
7#define _DT_BINDINGS_CLK_QCOM_CAM_CC_SM8450_H
8
9/* CAM_CC clocks */
10#define CAM_CC_BPS_AHB_CLK 0
11#define CAM_CC_BPS_CLK 1
12#define CAM_CC_BPS_CLK_SRC 2
13#define CAM_CC_BPS_FAST_AHB_CLK 3
14#define CAM_CC_CAMNOC_AXI_CLK 4
15#define CAM_CC_CAMNOC_AXI_CLK_SRC 5
16#define CAM_CC_CAMNOC_DCD_XO_CLK 6
17#define CAM_CC_CCI_0_CLK 7
18#define CAM_CC_CCI_0_CLK_SRC 8
19#define CAM_CC_CCI_1_CLK 9
20#define CAM_CC_CCI_1_CLK_SRC 10
21#define CAM_CC_CORE_AHB_CLK 11
22#define CAM_CC_CPAS_AHB_CLK 12
23#define CAM_CC_CPAS_BPS_CLK 13
24#define CAM_CC_CPAS_FAST_AHB_CLK 14
25#define CAM_CC_CPAS_IFE_0_CLK 15
26#define CAM_CC_CPAS_IFE_1_CLK 16
27#define CAM_CC_CPAS_IFE_2_CLK 17
28#define CAM_CC_CPAS_IFE_LITE_CLK 18
29#define CAM_CC_CPAS_IPE_NPS_CLK 19
30#define CAM_CC_CPAS_SBI_CLK 20
31#define CAM_CC_CPAS_SFE_0_CLK 21
32#define CAM_CC_CPAS_SFE_1_CLK 22
33#define CAM_CC_CPHY_RX_CLK_SRC 23
34#define CAM_CC_CSI0PHYTIMER_CLK 24
35#define CAM_CC_CSI0PHYTIMER_CLK_SRC 25
36#define CAM_CC_CSI1PHYTIMER_CLK 26
37#define CAM_CC_CSI1PHYTIMER_CLK_SRC 27
38#define CAM_CC_CSI2PHYTIMER_CLK 28
39#define CAM_CC_CSI2PHYTIMER_CLK_SRC 29
40#define CAM_CC_CSI3PHYTIMER_CLK 30
41#define CAM_CC_CSI3PHYTIMER_CLK_SRC 31
42#define CAM_CC_CSI4PHYTIMER_CLK 32
43#define CAM_CC_CSI4PHYTIMER_CLK_SRC 33
44#define CAM_CC_CSI5PHYTIMER_CLK 34
45#define CAM_CC_CSI5PHYTIMER_CLK_SRC 35
46#define CAM_CC_CSID_CLK 36
47#define CAM_CC_CSID_CLK_SRC 37
48#define CAM_CC_CSID_CSIPHY_RX_CLK 38
49#define CAM_CC_CSIPHY0_CLK 39
50#define CAM_CC_CSIPHY1_CLK 40
51#define CAM_CC_CSIPHY2_CLK 41
52#define CAM_CC_CSIPHY3_CLK 42
53#define CAM_CC_CSIPHY4_CLK 43
54#define CAM_CC_CSIPHY5_CLK 44
55#define CAM_CC_FAST_AHB_CLK_SRC 45
56#define CAM_CC_GDSC_CLK 46
57#define CAM_CC_ICP_AHB_CLK 47
58#define CAM_CC_ICP_CLK 48
59#define CAM_CC_ICP_CLK_SRC 49
60#define CAM_CC_IFE_0_CLK 50
61#define CAM_CC_IFE_0_CLK_SRC 51
62#define CAM_CC_IFE_0_DSP_CLK 52
63#define CAM_CC_IFE_0_FAST_AHB_CLK 53
64#define CAM_CC_IFE_1_CLK 54
65#define CAM_CC_IFE_1_CLK_SRC 55
66#define CAM_CC_IFE_1_DSP_CLK 56
67#define CAM_CC_IFE_1_FAST_AHB_CLK 57
68#define CAM_CC_IFE_2_CLK 58
69#define CAM_CC_IFE_2_CLK_SRC 59
70#define CAM_CC_IFE_2_DSP_CLK 60
71#define CAM_CC_IFE_2_FAST_AHB_CLK 61
72#define CAM_CC_IFE_LITE_AHB_CLK 62
73#define CAM_CC_IFE_LITE_CLK 63
74#define CAM_CC_IFE_LITE_CLK_SRC 64
75#define CAM_CC_IFE_LITE_CPHY_RX_CLK 65
76#define CAM_CC_IFE_LITE_CSID_CLK 66
77#define CAM_CC_IFE_LITE_CSID_CLK_SRC 67
78#define CAM_CC_IPE_NPS_AHB_CLK 68
79#define CAM_CC_IPE_NPS_CLK 69
80#define CAM_CC_IPE_NPS_CLK_SRC 70
81#define CAM_CC_IPE_NPS_FAST_AHB_CLK 71
82#define CAM_CC_IPE_PPS_CLK 72
83#define CAM_CC_IPE_PPS_FAST_AHB_CLK 73
84#define CAM_CC_JPEG_CLK 74
85#define CAM_CC_JPEG_CLK_SRC 75
86#define CAM_CC_MCLK0_CLK 76
87#define CAM_CC_MCLK0_CLK_SRC 77
88#define CAM_CC_MCLK1_CLK 78
89#define CAM_CC_MCLK1_CLK_SRC 79
90#define CAM_CC_MCLK2_CLK 80
91#define CAM_CC_MCLK2_CLK_SRC 81
92#define CAM_CC_MCLK3_CLK 82
93#define CAM_CC_MCLK3_CLK_SRC 83
94#define CAM_CC_MCLK4_CLK 84
95#define CAM_CC_MCLK4_CLK_SRC 85
96#define CAM_CC_MCLK5_CLK 86
97#define CAM_CC_MCLK5_CLK_SRC 87
98#define CAM_CC_MCLK6_CLK 88
99#define CAM_CC_MCLK6_CLK_SRC 89
100#define CAM_CC_MCLK7_CLK 90
101#define CAM_CC_MCLK7_CLK_SRC 91
102#define CAM_CC_PLL0 92
103#define CAM_CC_PLL0_OUT_EVEN 93
104#define CAM_CC_PLL0_OUT_ODD 94
105#define CAM_CC_PLL1 95
106#define CAM_CC_PLL1_OUT_EVEN 96
107#define CAM_CC_PLL2 97
108#define CAM_CC_PLL3 98
109#define CAM_CC_PLL3_OUT_EVEN 99
110#define CAM_CC_PLL4 100
111#define CAM_CC_PLL4_OUT_EVEN 101
112#define CAM_CC_PLL5 102
113#define CAM_CC_PLL5_OUT_EVEN 103
114#define CAM_CC_PLL6 104
115#define CAM_CC_PLL6_OUT_EVEN 105
116#define CAM_CC_PLL7 106
117#define CAM_CC_PLL7_OUT_EVEN 107
118#define CAM_CC_PLL8 108
119#define CAM_CC_PLL8_OUT_EVEN 109
120#define CAM_CC_QDSS_DEBUG_CLK 110
121#define CAM_CC_QDSS_DEBUG_CLK_SRC 111
122#define CAM_CC_QDSS_DEBUG_XO_CLK 112
123#define CAM_CC_SBI_AHB_CLK 113
124#define CAM_CC_SBI_CLK 114
125#define CAM_CC_SFE_0_CLK 115
126#define CAM_CC_SFE_0_CLK_SRC 116
127#define CAM_CC_SFE_0_FAST_AHB_CLK 117
128#define CAM_CC_SFE_1_CLK 118
129#define CAM_CC_SFE_1_CLK_SRC 119
130#define CAM_CC_SFE_1_FAST_AHB_CLK 120
131#define CAM_CC_SLEEP_CLK 121
132#define CAM_CC_SLEEP_CLK_SRC 122
133#define CAM_CC_SLOW_AHB_CLK_SRC 123
134#define CAM_CC_XO_CLK_SRC 124
135
136/* CAM_CC resets */
137#define CAM_CC_BPS_BCR 0
138#define CAM_CC_ICP_BCR 1
139#define CAM_CC_IFE_0_BCR 2
140#define CAM_CC_IFE_1_BCR 3
141#define CAM_CC_IFE_2_BCR 4
142#define CAM_CC_IPE_0_BCR 5
143#define CAM_CC_QDSS_DEBUG_BCR 6
144#define CAM_CC_SBI_BCR 7
145#define CAM_CC_SFE_0_BCR 8
146#define CAM_CC_SFE_1_BCR 9
147
148/* CAM_CC GDSCRs */
149#define BPS_GDSC 0
150#define IPE_0_GDSC 1
151#define SBI_GDSC 2
152#define IFE_0_GDSC 3
153#define IFE_1_GDSC 4
154#define IFE_2_GDSC 5
155#define SFE_0_GDSC 6
156#define SFE_1_GDSC 7
157#define TITAN_TOP_GDSC 8
158
159#endif
160

source code of linux/include/dt-bindings/clock/qcom,sm8450-camcc.h