| 1 | /* SPDX-License-Identifier: GPL-2.0 |
|---|
| 2 | * |
|---|
| 3 | * Copyright (C) 2018 Renesas Electronics Corp. |
|---|
| 4 | * |
|---|
| 5 | */ |
|---|
| 6 | |
|---|
| 7 | #ifndef __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__ |
|---|
| 8 | #define __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__ |
|---|
| 9 | |
|---|
| 10 | #include <dt-bindings/clock/renesas-cpg-mssr.h> |
|---|
| 11 | |
|---|
| 12 | /* R7S9210 CPG Core Clocks */ |
|---|
| 13 | #define R7S9210_CLK_I 0 |
|---|
| 14 | #define R7S9210_CLK_G 1 |
|---|
| 15 | #define R7S9210_CLK_B 2 |
|---|
| 16 | #define R7S9210_CLK_P1 3 |
|---|
| 17 | #define R7S9210_CLK_P1C 4 |
|---|
| 18 | #define R7S9210_CLK_P0 5 |
|---|
| 19 | |
|---|
| 20 | #endif /* __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__ */ |
|---|
| 21 | |
|---|
