| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Copyright (C) 2018 Renesas Electronics Corp. |
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| 4 | */ |
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| 5 | #ifndef __DT_BINDINGS_CLOCK_R8A774C0_CPG_MSSR_H__ |
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| 6 | #define __DT_BINDINGS_CLOCK_R8A774C0_CPG_MSSR_H__ |
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| 7 | |
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| 8 | #include <dt-bindings/clock/renesas-cpg-mssr.h> |
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| 9 | |
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| 10 | /* r8a774c0 CPG Core Clocks */ |
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| 11 | #define R8A774C0_CLK_Z2 0 |
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| 12 | #define R8A774C0_CLK_ZG 1 |
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| 13 | #define R8A774C0_CLK_ZTR 2 |
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| 14 | #define R8A774C0_CLK_ZT 3 |
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| 15 | #define R8A774C0_CLK_ZX 4 |
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| 16 | #define R8A774C0_CLK_S0D1 5 |
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| 17 | #define R8A774C0_CLK_S0D3 6 |
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| 18 | #define R8A774C0_CLK_S0D6 7 |
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| 19 | #define R8A774C0_CLK_S0D12 8 |
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| 20 | #define R8A774C0_CLK_S0D24 9 |
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| 21 | #define R8A774C0_CLK_S1D1 10 |
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| 22 | #define R8A774C0_CLK_S1D2 11 |
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| 23 | #define R8A774C0_CLK_S1D4 12 |
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| 24 | #define R8A774C0_CLK_S2D1 13 |
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| 25 | #define R8A774C0_CLK_S2D2 14 |
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| 26 | #define R8A774C0_CLK_S2D4 15 |
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| 27 | #define R8A774C0_CLK_S3D1 16 |
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| 28 | #define R8A774C0_CLK_S3D2 17 |
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| 29 | #define R8A774C0_CLK_S3D4 18 |
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| 30 | #define R8A774C0_CLK_S0D6C 19 |
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| 31 | #define R8A774C0_CLK_S3D1C 20 |
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| 32 | #define R8A774C0_CLK_S3D2C 21 |
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| 33 | #define R8A774C0_CLK_S3D4C 22 |
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| 34 | #define R8A774C0_CLK_LB 23 |
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| 35 | #define R8A774C0_CLK_CL 24 |
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| 36 | #define R8A774C0_CLK_ZB3 25 |
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| 37 | #define R8A774C0_CLK_ZB3D2 26 |
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| 38 | #define R8A774C0_CLK_CR 27 |
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| 39 | #define R8A774C0_CLK_CRD2 28 |
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| 40 | #define R8A774C0_CLK_SD0H 29 |
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| 41 | #define R8A774C0_CLK_SD0 30 |
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| 42 | #define R8A774C0_CLK_SD1H 31 |
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| 43 | #define R8A774C0_CLK_SD1 32 |
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| 44 | #define R8A774C0_CLK_SD3H 33 |
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| 45 | #define R8A774C0_CLK_SD3 34 |
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| 46 | #define R8A774C0_CLK_RPC 35 |
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| 47 | #define R8A774C0_CLK_RPCD2 36 |
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| 48 | #define R8A774C0_CLK_ZA2 37 |
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| 49 | #define R8A774C0_CLK_ZA8 38 |
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| 50 | #define R8A774C0_CLK_Z2D 39 |
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| 51 | #define R8A774C0_CLK_MSO 40 |
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| 52 | #define R8A774C0_CLK_R 41 |
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| 53 | #define R8A774C0_CLK_OSC 42 |
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| 54 | #define R8A774C0_CLK_LV0 43 |
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| 55 | #define R8A774C0_CLK_LV1 44 |
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| 56 | #define R8A774C0_CLK_CSI0 45 |
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| 57 | #define R8A774C0_CLK_CP 46 |
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| 58 | #define R8A774C0_CLK_CPEX 47 |
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| 59 | #define R8A774C0_CLK_CANFD 48 |
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| 60 | |
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| 61 | #endif /* __DT_BINDINGS_CLOCK_R8A774C0_CPG_MSSR_H__ */ |
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| 62 | |
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