1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * Copyright (c) 2016 Rockchip Electronics Co. Ltd. |
4 | * Author: Shawn Lin <shawn.lin@rock-chips.com> |
5 | */ |
6 | |
7 | #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H |
8 | #define _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H |
9 | |
10 | /* pll id */ |
11 | #define PLL_APLL 0 |
12 | #define PLL_DPLL 1 |
13 | #define PLL_GPLL 2 |
14 | #define ARMCLK 3 |
15 | |
16 | /* sclk gates (special clocks) */ |
17 | #define SCLK_SPI0 65 |
18 | #define SCLK_NANDC 67 |
19 | #define SCLK_SDMMC 68 |
20 | #define SCLK_SDIO 69 |
21 | #define SCLK_EMMC 71 |
22 | #define SCLK_UART0 72 |
23 | #define SCLK_UART1 73 |
24 | #define SCLK_UART2 74 |
25 | #define SCLK_I2S0 75 |
26 | #define SCLK_I2S1 76 |
27 | #define SCLK_I2S2 77 |
28 | #define SCLK_TIMER0 78 |
29 | #define SCLK_TIMER1 79 |
30 | #define SCLK_SFC 80 |
31 | #define SCLK_SDMMC_DRV 81 |
32 | #define SCLK_SDIO_DRV 82 |
33 | #define SCLK_EMMC_DRV 83 |
34 | #define SCLK_SDMMC_SAMPLE 84 |
35 | #define SCLK_SDIO_SAMPLE 85 |
36 | #define SCLK_EMMC_SAMPLE 86 |
37 | #define SCLK_VENC_CORE 87 |
38 | #define SCLK_HEVC_CORE 88 |
39 | #define SCLK_HEVC_CABAC 89 |
40 | #define SCLK_PWM0_PMU 90 |
41 | #define SCLK_I2C0_PMU 91 |
42 | #define SCLK_WIFI 92 |
43 | #define SCLK_CIFOUT 93 |
44 | #define SCLK_MIPI_CSI_OUT 94 |
45 | #define SCLK_CIF0 95 |
46 | #define SCLK_CIF1 96 |
47 | #define SCLK_CIF2 97 |
48 | #define SCLK_CIF3 98 |
49 | #define SCLK_DSP 99 |
50 | #define SCLK_DSP_IOP 100 |
51 | #define SCLK_DSP_EPP 101 |
52 | #define SCLK_DSP_EDP 102 |
53 | #define SCLK_DSP_EDAP 103 |
54 | #define SCLK_CVBS_HOST 104 |
55 | #define SCLK_HDMI_SFR 105 |
56 | #define SCLK_HDMI_CEC 106 |
57 | #define SCLK_CRYPTO 107 |
58 | #define SCLK_SPI 108 |
59 | #define SCLK_SARADC 109 |
60 | #define SCLK_TSADC 110 |
61 | #define SCLK_MAC_PRE 111 |
62 | #define SCLK_MAC 112 |
63 | #define SCLK_MAC_RX 113 |
64 | #define SCLK_MAC_REF 114 |
65 | #define SCLK_MAC_REFOUT 115 |
66 | #define SCLK_DSP_PFM 116 |
67 | #define SCLK_RGA 117 |
68 | #define SCLK_I2C1 118 |
69 | #define SCLK_I2C2 119 |
70 | #define SCLK_I2C3 120 |
71 | #define SCLK_PWM 121 |
72 | #define SCLK_ISP 122 |
73 | #define SCLK_USBPHY 123 |
74 | #define SCLK_I2S0_SRC 124 |
75 | #define SCLK_I2S1_SRC 125 |
76 | #define SCLK_I2S2_SRC 126 |
77 | #define SCLK_UART0_SRC 127 |
78 | #define SCLK_UART1_SRC 128 |
79 | #define SCLK_UART2_SRC 129 |
80 | |
81 | #define DCLK_VOP_SRC 185 |
82 | #define DCLK_HDMIPHY 186 |
83 | #define DCLK_VOP 187 |
84 | |
85 | /* aclk gates */ |
86 | #define ACLK_DMAC 192 |
87 | #define ACLK_PRE 193 |
88 | #define ACLK_CORE 194 |
89 | #define ACLK_ENMCORE 195 |
90 | #define ACLK_RKVENC 196 |
91 | #define ACLK_RKVDEC 197 |
92 | #define ACLK_VPU 198 |
93 | #define ACLK_CIF0 199 |
94 | #define ACLK_VIO0 200 |
95 | #define ACLK_VIO1 201 |
96 | #define ACLK_VOP 202 |
97 | #define ACLK_IEP 203 |
98 | #define ACLK_RGA 204 |
99 | #define ACLK_ISP 205 |
100 | #define ACLK_CIF1 206 |
101 | #define ACLK_CIF2 207 |
102 | #define ACLK_CIF3 208 |
103 | #define ACLK_PERI 209 |
104 | #define ACLK_GMAC 210 |
105 | |
106 | /* pclk gates */ |
107 | #define PCLK_GPIO1 256 |
108 | #define PCLK_GPIO2 257 |
109 | #define PCLK_GPIO3 258 |
110 | #define PCLK_GRF 259 |
111 | #define PCLK_I2C1 260 |
112 | #define PCLK_I2C2 261 |
113 | #define PCLK_I2C3 262 |
114 | #define PCLK_SPI 263 |
115 | #define PCLK_SFC 264 |
116 | #define PCLK_UART0 265 |
117 | #define PCLK_UART1 266 |
118 | #define PCLK_UART2 267 |
119 | #define PCLK_TSADC 268 |
120 | #define PCLK_PWM 269 |
121 | #define PCLK_TIMER 270 |
122 | #define PCLK_PERI 271 |
123 | #define PCLK_GPIO0_PMU 272 |
124 | #define PCLK_I2C0_PMU 273 |
125 | #define PCLK_PWM0_PMU 274 |
126 | #define PCLK_ISP 275 |
127 | #define PCLK_VIO 276 |
128 | #define PCLK_MIPI_DSI 277 |
129 | #define PCLK_HDMI_CTRL 278 |
130 | #define PCLK_SARADC 279 |
131 | #define PCLK_DSP_CFG 280 |
132 | #define PCLK_BUS 281 |
133 | #define PCLK_EFUSE0 282 |
134 | #define PCLK_EFUSE1 283 |
135 | #define PCLK_WDT 284 |
136 | #define PCLK_GMAC 285 |
137 | |
138 | /* hclk gates */ |
139 | #define HCLK_I2S0_8CH 320 |
140 | #define HCLK_I2S1_2CH 321 |
141 | #define HCLK_I2S2_2CH 322 |
142 | #define HCLK_NANDC 323 |
143 | #define HCLK_SDMMC 324 |
144 | #define HCLK_SDIO 325 |
145 | #define HCLK_EMMC 326 |
146 | #define HCLK_PERI 327 |
147 | #define HCLK_SFC 328 |
148 | #define HCLK_RKVENC 329 |
149 | #define HCLK_RKVDEC 330 |
150 | #define HCLK_CIF0 331 |
151 | #define HCLK_VIO 332 |
152 | #define HCLK_VOP 333 |
153 | #define HCLK_IEP 334 |
154 | #define HCLK_RGA 335 |
155 | #define HCLK_ISP 336 |
156 | #define HCLK_CRYPTO_MST 337 |
157 | #define HCLK_CRYPTO_SLV 338 |
158 | #define HCLK_HOST0 339 |
159 | #define HCLK_OTG 340 |
160 | #define HCLK_CIF1 341 |
161 | #define HCLK_CIF2 342 |
162 | #define HCLK_CIF3 343 |
163 | #define HCLK_BUS 344 |
164 | #define HCLK_VPU 345 |
165 | |
166 | #define CLK_NR_CLKS (HCLK_VPU + 1) |
167 | |
168 | /* reset id */ |
169 | #define SRST_CORE_PO_AD 0 |
170 | #define SRST_CORE_AD 1 |
171 | #define SRST_L2_AD 2 |
172 | #define SRST_CPU_NIU_AD 3 |
173 | #define SRST_CORE_PO 4 |
174 | #define SRST_CORE 5 |
175 | #define SRST_L2 6 |
176 | #define SRST_CORE_DBG 8 |
177 | #define PRST_DBG 9 |
178 | #define RST_DAP 10 |
179 | #define PRST_DBG_NIU 11 |
180 | #define ARST_STRC_SYS_AD 15 |
181 | |
182 | #define SRST_DDRPHY_CLKDIV 16 |
183 | #define SRST_DDRPHY 17 |
184 | #define PRST_DDRPHY 18 |
185 | #define PRST_HDMIPHY 19 |
186 | #define PRST_VDACPHY 20 |
187 | #define PRST_VADCPHY 21 |
188 | #define PRST_MIPI_CSI_PHY 22 |
189 | #define PRST_MIPI_DSI_PHY 23 |
190 | #define PRST_ACODEC 24 |
191 | #define ARST_BUS_NIU 25 |
192 | #define PRST_TOP_NIU 26 |
193 | #define ARST_INTMEM 27 |
194 | #define HRST_ROM 28 |
195 | #define ARST_DMAC 29 |
196 | #define SRST_MSCH_NIU 30 |
197 | #define PRST_MSCH_NIU 31 |
198 | |
199 | #define PRST_DDRUPCTL 32 |
200 | #define NRST_DDRUPCTL 33 |
201 | #define PRST_DDRMON 34 |
202 | #define HRST_I2S0_8CH 35 |
203 | #define MRST_I2S0_8CH 36 |
204 | #define HRST_I2S1_2CH 37 |
205 | #define MRST_IS21_2CH 38 |
206 | #define HRST_I2S2_2CH 39 |
207 | #define MRST_I2S2_2CH 40 |
208 | #define HRST_CRYPTO 41 |
209 | #define SRST_CRYPTO 42 |
210 | #define PRST_SPI 43 |
211 | #define SRST_SPI 44 |
212 | #define PRST_UART0 45 |
213 | #define PRST_UART1 46 |
214 | #define PRST_UART2 47 |
215 | |
216 | #define SRST_UART0 48 |
217 | #define SRST_UART1 49 |
218 | #define SRST_UART2 50 |
219 | #define PRST_I2C1 51 |
220 | #define PRST_I2C2 52 |
221 | #define PRST_I2C3 53 |
222 | #define SRST_I2C1 54 |
223 | #define SRST_I2C2 55 |
224 | #define SRST_I2C3 56 |
225 | #define PRST_PWM1 58 |
226 | #define SRST_PWM1 60 |
227 | #define PRST_WDT 61 |
228 | #define PRST_GPIO1 62 |
229 | #define PRST_GPIO2 63 |
230 | |
231 | #define PRST_GPIO3 64 |
232 | #define PRST_GRF 65 |
233 | #define PRST_EFUSE 66 |
234 | #define PRST_EFUSE512 67 |
235 | #define PRST_TIMER0 68 |
236 | #define SRST_TIMER0 69 |
237 | #define SRST_TIMER1 70 |
238 | #define PRST_TSADC 71 |
239 | #define SRST_TSADC 72 |
240 | #define PRST_SARADC 73 |
241 | #define SRST_SARADC 74 |
242 | #define HRST_SYSBUS 75 |
243 | #define PRST_USBGRF 76 |
244 | |
245 | #define ARST_PERIPH_NIU 80 |
246 | #define HRST_PERIPH_NIU 81 |
247 | #define PRST_PERIPH_NIU 82 |
248 | #define HRST_PERIPH 83 |
249 | #define HRST_SDMMC 84 |
250 | #define HRST_SDIO 85 |
251 | #define HRST_EMMC 86 |
252 | #define HRST_NANDC 87 |
253 | #define NRST_NANDC 88 |
254 | #define HRST_SFC 89 |
255 | #define SRST_SFC 90 |
256 | #define ARST_GMAC 91 |
257 | #define HRST_OTG 92 |
258 | #define SRST_OTG 93 |
259 | #define SRST_OTG_ADP 94 |
260 | #define HRST_HOST0 95 |
261 | |
262 | #define HRST_HOST0_AUX 96 |
263 | #define HRST_HOST0_ARB 97 |
264 | #define SRST_HOST0_EHCIPHY 98 |
265 | #define SRST_HOST0_UTMI 99 |
266 | #define SRST_USBPOR 100 |
267 | #define SRST_UTMI0 101 |
268 | #define SRST_UTMI1 102 |
269 | |
270 | #define ARST_VIO0_NIU 102 |
271 | #define ARST_VIO1_NIU 103 |
272 | #define HRST_VIO_NIU 104 |
273 | #define PRST_VIO_NIU 105 |
274 | #define ARST_VOP 106 |
275 | #define HRST_VOP 107 |
276 | #define DRST_VOP 108 |
277 | #define ARST_IEP 109 |
278 | #define HRST_IEP 110 |
279 | #define ARST_RGA 111 |
280 | #define HRST_RGA 112 |
281 | #define SRST_RGA 113 |
282 | #define PRST_CVBS 114 |
283 | #define PRST_HDMI 115 |
284 | #define SRST_HDMI 116 |
285 | #define PRST_MIPI_DSI 117 |
286 | |
287 | #define ARST_ISP_NIU 118 |
288 | #define HRST_ISP_NIU 119 |
289 | #define HRST_ISP 120 |
290 | #define SRST_ISP 121 |
291 | #define ARST_VIP0 122 |
292 | #define HRST_VIP0 123 |
293 | #define PRST_VIP0 124 |
294 | #define ARST_VIP1 125 |
295 | #define HRST_VIP1 126 |
296 | #define PRST_VIP1 127 |
297 | #define ARST_VIP2 128 |
298 | #define HRST_VIP2 129 |
299 | #define PRST_VIP2 120 |
300 | #define ARST_VIP3 121 |
301 | #define HRST_VIP3 122 |
302 | #define PRST_VIP4 123 |
303 | |
304 | #define PRST_CIF1TO4 124 |
305 | #define SRST_CVBS_CLK 125 |
306 | #define HRST_CVBS 126 |
307 | |
308 | #define ARST_VPU_NIU 140 |
309 | #define HRST_VPU_NIU 141 |
310 | #define ARST_VPU 142 |
311 | #define HRST_VPU 143 |
312 | #define ARST_RKVDEC_NIU 144 |
313 | #define HRST_RKVDEC_NIU 145 |
314 | #define ARST_RKVDEC 146 |
315 | #define HRST_RKVDEC 147 |
316 | #define SRST_RKVDEC_CABAC 148 |
317 | #define SRST_RKVDEC_CORE 149 |
318 | #define ARST_RKVENC_NIU 150 |
319 | #define HRST_RKVENC_NIU 151 |
320 | #define ARST_RKVENC 152 |
321 | #define HRST_RKVENC 153 |
322 | #define SRST_RKVENC_CORE 154 |
323 | |
324 | #define SRST_DSP_CORE 156 |
325 | #define SRST_DSP_SYS 157 |
326 | #define SRST_DSP_GLOBAL 158 |
327 | #define SRST_DSP_OECM 159 |
328 | #define PRST_DSP_IOP_NIU 160 |
329 | #define ARST_DSP_EPP_NIU 161 |
330 | #define ARST_DSP_EDP_NIU 162 |
331 | #define PRST_DSP_DBG_NIU 163 |
332 | #define PRST_DSP_CFG_NIU 164 |
333 | #define PRST_DSP_GRF 165 |
334 | #define PRST_DSP_MAILBOX 166 |
335 | #define PRST_DSP_INTC 167 |
336 | #define PRST_DSP_PFM_MON 169 |
337 | #define SRST_DSP_PFM_MON 170 |
338 | #define ARST_DSP_EDAP_NIU 171 |
339 | |
340 | #define SRST_PMU 172 |
341 | #define SRST_PMU_I2C0 173 |
342 | #define PRST_PMU_I2C0 174 |
343 | #define PRST_PMU_GPIO0 175 |
344 | #define PRST_PMU_INTMEM 176 |
345 | #define PRST_PMU_PWM0 177 |
346 | #define SRST_PMU_PWM0 178 |
347 | #define PRST_PMU_GRF 179 |
348 | #define SRST_PMU_NIU 180 |
349 | #define SRST_PMU_PVTM 181 |
350 | #define ARST_DSP_EDP_PERF 184 |
351 | #define ARST_DSP_EPP_PERF 185 |
352 | |
353 | #endif /* _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H */ |
354 | |