1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * GPIO definitions for Amlogic Meson8 SoCs |
4 | * |
5 | * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> |
6 | */ |
7 | |
8 | #ifndef _DT_BINDINGS_MESON8_GPIO_H |
9 | #define _DT_BINDINGS_MESON8_GPIO_H |
10 | |
11 | /* First GPIO chip */ |
12 | #define GPIOX_0 0 |
13 | #define GPIOX_1 1 |
14 | #define GPIOX_2 2 |
15 | #define GPIOX_3 3 |
16 | #define GPIOX_4 4 |
17 | #define GPIOX_5 5 |
18 | #define GPIOX_6 6 |
19 | #define GPIOX_7 7 |
20 | #define GPIOX_8 8 |
21 | #define GPIOX_9 9 |
22 | #define GPIOX_10 10 |
23 | #define GPIOX_11 11 |
24 | #define GPIOX_12 12 |
25 | #define GPIOX_13 13 |
26 | #define GPIOX_14 14 |
27 | #define GPIOX_15 15 |
28 | #define GPIOX_16 16 |
29 | #define GPIOX_17 17 |
30 | #define GPIOX_18 18 |
31 | #define GPIOX_19 19 |
32 | #define GPIOX_20 20 |
33 | #define GPIOX_21 21 |
34 | #define GPIOY_0 22 |
35 | #define GPIOY_1 23 |
36 | #define GPIOY_2 24 |
37 | #define GPIOY_3 25 |
38 | #define GPIOY_4 26 |
39 | #define GPIOY_5 27 |
40 | #define GPIOY_6 28 |
41 | #define GPIOY_7 29 |
42 | #define GPIOY_8 30 |
43 | #define GPIOY_9 31 |
44 | #define GPIOY_10 32 |
45 | #define GPIOY_11 33 |
46 | #define GPIOY_12 34 |
47 | #define GPIOY_13 35 |
48 | #define GPIOY_14 36 |
49 | #define GPIOY_15 37 |
50 | #define GPIOY_16 38 |
51 | #define GPIODV_0 39 |
52 | #define GPIODV_1 40 |
53 | #define GPIODV_2 41 |
54 | #define GPIODV_3 42 |
55 | #define GPIODV_4 43 |
56 | #define GPIODV_5 44 |
57 | #define GPIODV_6 45 |
58 | #define GPIODV_7 46 |
59 | #define GPIODV_8 47 |
60 | #define GPIODV_9 48 |
61 | #define GPIODV_10 49 |
62 | #define GPIODV_11 50 |
63 | #define GPIODV_12 51 |
64 | #define GPIODV_13 52 |
65 | #define GPIODV_14 53 |
66 | #define GPIODV_15 54 |
67 | #define GPIODV_16 55 |
68 | #define GPIODV_17 56 |
69 | #define GPIODV_18 57 |
70 | #define GPIODV_19 58 |
71 | #define GPIODV_20 59 |
72 | #define GPIODV_21 60 |
73 | #define GPIODV_22 61 |
74 | #define GPIODV_23 62 |
75 | #define GPIODV_24 63 |
76 | #define GPIODV_25 64 |
77 | #define GPIODV_26 65 |
78 | #define GPIODV_27 66 |
79 | #define GPIODV_28 67 |
80 | #define GPIODV_29 68 |
81 | #define GPIOH_0 69 |
82 | #define GPIOH_1 70 |
83 | #define GPIOH_2 71 |
84 | #define GPIOH_3 72 |
85 | #define GPIOH_4 73 |
86 | #define GPIOH_5 74 |
87 | #define GPIOH_6 75 |
88 | #define GPIOH_7 76 |
89 | #define GPIOH_8 77 |
90 | #define GPIOH_9 78 |
91 | #define GPIOZ_0 79 |
92 | #define GPIOZ_1 80 |
93 | #define GPIOZ_2 81 |
94 | #define GPIOZ_3 82 |
95 | #define GPIOZ_4 83 |
96 | #define GPIOZ_5 84 |
97 | #define GPIOZ_6 85 |
98 | #define GPIOZ_7 86 |
99 | #define GPIOZ_8 87 |
100 | #define GPIOZ_9 88 |
101 | #define GPIOZ_10 89 |
102 | #define GPIOZ_11 90 |
103 | #define GPIOZ_12 91 |
104 | #define GPIOZ_13 92 |
105 | #define GPIOZ_14 93 |
106 | #define CARD_0 94 |
107 | #define CARD_1 95 |
108 | #define CARD_2 96 |
109 | #define CARD_3 97 |
110 | #define CARD_4 98 |
111 | #define CARD_5 99 |
112 | #define CARD_6 100 |
113 | #define BOOT_0 101 |
114 | #define BOOT_1 102 |
115 | #define BOOT_2 103 |
116 | #define BOOT_3 104 |
117 | #define BOOT_4 105 |
118 | #define BOOT_5 106 |
119 | #define BOOT_6 107 |
120 | #define BOOT_7 108 |
121 | #define BOOT_8 109 |
122 | #define BOOT_9 110 |
123 | #define BOOT_10 111 |
124 | #define BOOT_11 112 |
125 | #define BOOT_12 113 |
126 | #define BOOT_13 114 |
127 | #define BOOT_14 115 |
128 | #define BOOT_15 116 |
129 | #define BOOT_16 117 |
130 | #define BOOT_17 118 |
131 | #define BOOT_18 119 |
132 | |
133 | /* Second GPIO chip */ |
134 | #define GPIOAO_0 0 |
135 | #define GPIOAO_1 1 |
136 | #define GPIOAO_2 2 |
137 | #define GPIOAO_3 3 |
138 | #define GPIOAO_4 4 |
139 | #define GPIOAO_5 5 |
140 | #define GPIOAO_6 6 |
141 | #define GPIOAO_7 7 |
142 | #define GPIOAO_8 8 |
143 | #define GPIOAO_9 9 |
144 | #define GPIOAO_10 10 |
145 | #define GPIOAO_11 11 |
146 | #define GPIOAO_12 12 |
147 | #define GPIOAO_13 13 |
148 | #define GPIO_BSD_EN 14 |
149 | #define GPIO_TEST_N 15 |
150 | |
151 | #endif /* _DT_BINDINGS_MESON8_GPIO_H */ |
152 | |