| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Qualcomm interconnect IDs |
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| 4 | * |
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| 5 | * Copyright (c) 2019, Linaro Ltd. |
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| 6 | * Author: Georgi Djakov <georgi.djakov@linaro.org> |
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| 7 | */ |
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| 8 | |
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| 9 | #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H |
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| 10 | #define __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H |
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| 11 | |
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| 12 | #define MASTER_AMPSS_M0 0 |
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| 13 | #define MASTER_OXILI 1 |
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| 14 | #define MASTER_MDP_PORT0 2 |
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| 15 | #define MASTER_SNOC_BIMC_1 3 |
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| 16 | #define MASTER_TCU_0 4 |
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| 17 | #define SLAVE_EBI_CH0 5 |
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| 18 | #define SLAVE_BIMC_SNOC 6 |
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| 19 | |
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| 20 | #define MASTER_SPDM 0 |
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| 21 | #define MASTER_BLSP_1 1 |
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| 22 | #define MASTER_BLSP_2 2 |
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| 23 | #define MASTER_XI_USB_HS1 3 |
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| 24 | #define MASTER_CRYPT0 4 |
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| 25 | #define MASTER_SDCC_1 5 |
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| 26 | #define MASTER_SDCC_2 6 |
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| 27 | #define MASTER_SNOC_PCNOC 7 |
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| 28 | #define MASTER_QPIC 8 |
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| 29 | #define PCNOC_INT_0 9 |
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| 30 | #define PCNOC_INT_2 10 |
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| 31 | #define PCNOC_INT_3 11 |
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| 32 | #define PCNOC_S_0 12 |
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| 33 | #define PCNOC_S_1 13 |
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| 34 | #define PCNOC_S_2 14 |
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| 35 | #define PCNOC_S_3 15 |
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| 36 | #define PCNOC_S_4 16 |
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| 37 | #define PCNOC_S_6 17 |
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| 38 | #define PCNOC_S_7 18 |
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| 39 | #define PCNOC_S_8 19 |
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| 40 | #define PCNOC_S_9 20 |
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| 41 | #define PCNOC_S_10 21 |
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| 42 | #define PCNOC_S_11 22 |
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| 43 | #define SLAVE_SPDM 23 |
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| 44 | #define SLAVE_PDM 24 |
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| 45 | #define SLAVE_PRNG 25 |
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| 46 | #define SLAVE_TCSR 26 |
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| 47 | #define SLAVE_SNOC_CFG 27 |
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| 48 | #define SLAVE_MESSAGE_RAM 28 |
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| 49 | #define SLAVE_DISP_SS_CFG 29 |
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| 50 | #define SLAVE_GPU_CFG 30 |
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| 51 | #define SLAVE_BLSP_1 31 |
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| 52 | #define SLAVE_BLSP_2 32 |
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| 53 | #define SLAVE_TLMM_NORTH 33 |
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| 54 | #define SLAVE_PCIE 34 |
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| 55 | #define SLAVE_ETHERNET 35 |
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| 56 | #define SLAVE_TLMM_EAST 36 |
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| 57 | #define SLAVE_TCU 37 |
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| 58 | #define SLAVE_PMIC_ARB 38 |
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| 59 | #define SLAVE_SDCC_1 39 |
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| 60 | #define SLAVE_SDCC_2 40 |
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| 61 | #define SLAVE_TLMM_SOUTH 41 |
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| 62 | #define SLAVE_USB_HS 42 |
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| 63 | #define SLAVE_USB3 43 |
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| 64 | #define SLAVE_CRYPTO_0_CFG 44 |
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| 65 | #define SLAVE_PCNOC_SNOC 45 |
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| 66 | |
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| 67 | #define MASTER_QDSS_BAM 0 |
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| 68 | #define MASTER_BIMC_SNOC 1 |
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| 69 | #define MASTER_PCNOC_SNOC 2 |
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| 70 | #define MASTER_QDSS_ETR 3 |
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| 71 | #define MASTER_EMAC 4 |
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| 72 | #define MASTER_PCIE 5 |
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| 73 | #define MASTER_USB3 6 |
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| 74 | #define QDSS_INT 7 |
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| 75 | #define SNOC_INT_0 8 |
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| 76 | #define SNOC_INT_1 9 |
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| 77 | #define SNOC_INT_2 10 |
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| 78 | #define SLAVE_KPSS_AHB 11 |
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| 79 | #define SLAVE_WCSS 12 |
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| 80 | #define SLAVE_SNOC_BIMC_1 13 |
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| 81 | #define SLAVE_IMEM 14 |
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| 82 | #define SLAVE_SNOC_PCNOC 15 |
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| 83 | #define SLAVE_QDSS_STM 16 |
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| 84 | #define SLAVE_CATS_0 17 |
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| 85 | #define SLAVE_CATS_1 18 |
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| 86 | #define SLAVE_LPASS 19 |
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| 87 | |
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| 88 | #endif |
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| 89 | |
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