| 1 | // SPDX-License-Identifier: GPL-2.0 |
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| 2 | /* |
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| 3 | * Xilinx Video IP Core |
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| 4 | * |
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| 5 | * Copyright (C) 2013-2015 Ideas on Board |
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| 6 | * Copyright (C) 2013-2015 Xilinx, Inc. |
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| 7 | * |
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| 8 | * Contacts: Hyun Kwon <hyun.kwon@xilinx.com> |
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| 9 | * Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
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| 10 | */ |
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| 11 | |
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| 12 | #ifndef __DT_BINDINGS_MEDIA_XILINX_VIP_H__ |
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| 13 | #define __DT_BINDINGS_MEDIA_XILINX_VIP_H__ |
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| 14 | |
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| 15 | /* |
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| 16 | * Video format codes as defined in "AXI4-Stream Video IP and System Design |
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| 17 | * Guide". |
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| 18 | */ |
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| 19 | #define XVIP_VF_YUV_422 0 |
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| 20 | #define XVIP_VF_YUV_444 1 |
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| 21 | #define XVIP_VF_RBG 2 |
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| 22 | #define XVIP_VF_YUV_420 3 |
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| 23 | #define XVIP_VF_YUVA_422 4 |
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| 24 | #define XVIP_VF_YUVA_444 5 |
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| 25 | #define XVIP_VF_RGBA 6 |
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| 26 | #define XVIP_VF_YUVA_420 7 |
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| 27 | #define XVIP_VF_YUVD_422 8 |
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| 28 | #define XVIP_VF_YUVD_444 9 |
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| 29 | #define XVIP_VF_RGBD 10 |
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| 30 | #define XVIP_VF_YUVD_420 11 |
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| 31 | #define XVIP_VF_MONO_SENSOR 12 |
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| 32 | #define XVIP_VF_CUSTOM2 13 |
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| 33 | #define XVIP_VF_CUSTOM3 14 |
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| 34 | #define XVIP_VF_CUSTOM4 15 |
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| 35 | |
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| 36 | #endif /* __DT_BINDINGS_MEDIA_XILINX_VIP_H__ */ |
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| 37 | |
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