| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Copyright (c) 2014 MediaTek Inc. |
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| 4 | * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com> |
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| 5 | */ |
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| 6 | |
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| 7 | #ifndef _DT_BINDINGS_PINCTRL_MT65XX_H |
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| 8 | #define _DT_BINDINGS_PINCTRL_MT65XX_H |
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| 9 | |
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| 10 | #define MTK_PIN_NO(x) ((x) << 8) |
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| 11 | #define MTK_GET_PIN_NO(x) ((x) >> 8) |
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| 12 | #define MTK_GET_PIN_FUNC(x) ((x) & 0xf) |
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| 13 | |
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| 14 | #define MTK_PUPD_SET_R1R0_00 100 |
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| 15 | #define MTK_PUPD_SET_R1R0_01 101 |
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| 16 | #define MTK_PUPD_SET_R1R0_10 102 |
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| 17 | #define MTK_PUPD_SET_R1R0_11 103 |
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| 18 | |
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| 19 | #define MTK_PULL_SET_RSEL_000 200 |
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| 20 | #define MTK_PULL_SET_RSEL_001 201 |
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| 21 | #define MTK_PULL_SET_RSEL_010 202 |
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| 22 | #define MTK_PULL_SET_RSEL_011 203 |
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| 23 | #define MTK_PULL_SET_RSEL_100 204 |
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| 24 | #define MTK_PULL_SET_RSEL_101 205 |
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| 25 | #define MTK_PULL_SET_RSEL_110 206 |
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| 26 | #define MTK_PULL_SET_RSEL_111 207 |
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| 27 | |
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| 28 | #define MTK_DRIVE_2mA 2 |
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| 29 | #define MTK_DRIVE_4mA 4 |
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| 30 | #define MTK_DRIVE_6mA 6 |
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| 31 | #define MTK_DRIVE_8mA 8 |
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| 32 | #define MTK_DRIVE_10mA 10 |
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| 33 | #define MTK_DRIVE_12mA 12 |
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| 34 | #define MTK_DRIVE_14mA 14 |
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| 35 | #define MTK_DRIVE_16mA 16 |
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| 36 | #define MTK_DRIVE_20mA 20 |
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| 37 | #define MTK_DRIVE_24mA 24 |
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| 38 | #define MTK_DRIVE_28mA 28 |
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| 39 | #define MTK_DRIVE_32mA 32 |
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| 40 | |
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| 41 | #endif /* _DT_BINDINGS_PINCTRL_MT65XX_H */ |
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| 42 | |
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