1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * Copyright (c) 2013, The Linux Foundation. All rights reserved. |
4 | */ |
5 | |
6 | #ifndef _DT_BINDINGS_RESET_MSM_MMCC_8960_H |
7 | #define _DT_BINDINGS_RESET_MSM_MMCC_8960_H |
8 | |
9 | #define VPE_AXI_RESET 0 |
10 | #define IJPEG_AXI_RESET 1 |
11 | #define MPD_AXI_RESET 2 |
12 | #define VFE_AXI_RESET 3 |
13 | #define SP_AXI_RESET 4 |
14 | #define VCODEC_AXI_RESET 5 |
15 | #define ROT_AXI_RESET 6 |
16 | #define VCODEC_AXI_A_RESET 7 |
17 | #define VCODEC_AXI_B_RESET 8 |
18 | #define FAB_S3_AXI_RESET 9 |
19 | #define FAB_S2_AXI_RESET 10 |
20 | #define FAB_S1_AXI_RESET 11 |
21 | #define FAB_S0_AXI_RESET 12 |
22 | #define SMMU_GFX3D_ABH_RESET 13 |
23 | #define SMMU_VPE_AHB_RESET 14 |
24 | #define SMMU_VFE_AHB_RESET 15 |
25 | #define SMMU_ROT_AHB_RESET 16 |
26 | #define SMMU_VCODEC_B_AHB_RESET 17 |
27 | #define SMMU_VCODEC_A_AHB_RESET 18 |
28 | #define SMMU_MDP1_AHB_RESET 19 |
29 | #define SMMU_MDP0_AHB_RESET 20 |
30 | #define SMMU_JPEGD_AHB_RESET 21 |
31 | #define SMMU_IJPEG_AHB_RESET 22 |
32 | #define SMMU_GFX2D0_AHB_RESET 23 |
33 | #define SMMU_GFX2D1_AHB_RESET 24 |
34 | #define APU_AHB_RESET 25 |
35 | #define CSI_AHB_RESET 26 |
36 | #define TV_ENC_AHB_RESET 27 |
37 | #define VPE_AHB_RESET 28 |
38 | #define FABRIC_AHB_RESET 29 |
39 | #define GFX2D0_AHB_RESET 30 |
40 | #define GFX2D1_AHB_RESET 31 |
41 | #define GFX3D_AHB_RESET 32 |
42 | #define HDMI_AHB_RESET 33 |
43 | #define MSSS_IMEM_AHB_RESET 34 |
44 | #define IJPEG_AHB_RESET 35 |
45 | #define DSI_M_AHB_RESET 36 |
46 | #define DSI_S_AHB_RESET 37 |
47 | #define JPEGD_AHB_RESET 38 |
48 | #define MDP_AHB_RESET 39 |
49 | #define ROT_AHB_RESET 40 |
50 | #define VCODEC_AHB_RESET 41 |
51 | #define VFE_AHB_RESET 42 |
52 | #define DSI2_M_AHB_RESET 43 |
53 | #define DSI2_S_AHB_RESET 44 |
54 | #define CSIPHY2_RESET 45 |
55 | #define CSI_PIX1_RESET 46 |
56 | #define CSIPHY0_RESET 47 |
57 | #define CSIPHY1_RESET 48 |
58 | #define DSI2_RESET 49 |
59 | #define VFE_CSI_RESET 50 |
60 | #define MDP_RESET 51 |
61 | #define AMP_RESET 52 |
62 | #define JPEGD_RESET 53 |
63 | #define CSI1_RESET 54 |
64 | #define VPE_RESET 55 |
65 | #define MMSS_FABRIC_RESET 56 |
66 | #define VFE_RESET 57 |
67 | #define GFX2D0_RESET 58 |
68 | #define GFX2D1_RESET 59 |
69 | #define GFX3D_RESET 60 |
70 | #define HDMI_RESET 61 |
71 | #define MMSS_IMEM_RESET 62 |
72 | #define IJPEG_RESET 63 |
73 | #define CSI0_RESET 64 |
74 | #define DSI_RESET 65 |
75 | #define VCODEC_RESET 66 |
76 | #define MDP_TV_RESET 67 |
77 | #define MDP_VSYNC_RESET 68 |
78 | #define ROT_RESET 69 |
79 | #define TV_HDMI_RESET 70 |
80 | #define TV_ENC_RESET 71 |
81 | #define CSI2_RESET 72 |
82 | #define CSI_RDI1_RESET 73 |
83 | #define CSI_RDI2_RESET 74 |
84 | #define GFX3D_AXI_RESET 75 |
85 | #define VCAP_AXI_RESET 76 |
86 | #define SMMU_VCAP_AHB_RESET 77 |
87 | #define VCAP_AHB_RESET 78 |
88 | #define CSI_RDI_RESET 79 |
89 | #define CSI_PIX_RESET 80 |
90 | #define VCAP_NPL_RESET 81 |
91 | #define VCAP_RESET 82 |
92 | |
93 | #endif |
94 | |