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1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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2 | #ifndef _DT_BINDINGS_SAMSUNG_I2S_H |
3 | #define _DT_BINDINGS_SAMSUNG_I2S_H |
4 | |
5 | #define CLK_I2S_CDCLK 0 /* the CDCLK (CODECLKO) gate clock */ |
6 | |
7 | #define CLK_I2S_RCLK_SRC 1 /* the RCLKSRC mux clock (corresponding to |
8 | * RCLKSRC bit in IISMOD register) |
9 | */ |
10 | |
11 | #define CLK_I2S_RCLK_PSR 2 /* the RCLK prescaler divider clock |
12 | * (corresponding to the IISPSR register) |
13 | */ |
14 | |
15 | #endif /* _DT_BINDINGS_SAMSUNG_I2S_H */ |
16 |
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