| 1 | /* |
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| 2 | * ARM PrimeXsys System Controller SP810 header file |
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| 3 | * |
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| 4 | * Copyright (C) 2009 ST Microelectronics |
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| 5 | * Viresh Kumar <vireshk@kernel.org> |
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| 6 | * |
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| 7 | * This file is licensed under the terms of the GNU General Public |
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| 8 | * License version 2. This program is licensed "as is" without any |
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| 9 | * warranty of any kind, whether express or implied. |
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| 10 | */ |
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| 11 | |
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| 12 | #ifndef __AMBA_SP810_H |
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| 13 | #define __AMBA_SP810_H |
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| 14 | |
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| 15 | #include <linux/io.h> |
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| 16 | |
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| 17 | /* sysctl registers offset */ |
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| 18 | #define SCCTRL 0x000 |
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| 19 | #define SCSYSSTAT 0x004 |
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| 20 | #define SCIMCTRL 0x008 |
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| 21 | #define SCIMSTAT 0x00C |
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| 22 | #define SCXTALCTRL 0x010 |
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| 23 | #define SCPLLCTRL 0x014 |
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| 24 | #define SCPLLFCTRL 0x018 |
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| 25 | #define SCPERCTRL0 0x01C |
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| 26 | #define SCPERCTRL1 0x020 |
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| 27 | #define SCPEREN 0x024 |
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| 28 | #define SCPERDIS 0x028 |
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| 29 | #define SCPERCLKEN 0x02C |
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| 30 | #define SCPERSTAT 0x030 |
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| 31 | #define SCSYSID0 0xEE0 |
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| 32 | #define SCSYSID1 0xEE4 |
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| 33 | #define SCSYSID2 0xEE8 |
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| 34 | #define SCSYSID3 0xEEC |
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| 35 | #define SCITCR 0xF00 |
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| 36 | #define SCITIR0 0xF04 |
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| 37 | #define SCITIR1 0xF08 |
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| 38 | #define SCITOR 0xF0C |
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| 39 | #define SCCNTCTRL 0xF10 |
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| 40 | #define SCCNTDATA 0xF14 |
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| 41 | #define SCCNTSTEP 0xF18 |
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| 42 | #define SCPERIPHID0 0xFE0 |
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| 43 | #define SCPERIPHID1 0xFE4 |
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| 44 | #define SCPERIPHID2 0xFE8 |
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| 45 | #define SCPERIPHID3 0xFEC |
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| 46 | #define SCPCELLID0 0xFF0 |
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| 47 | #define SCPCELLID1 0xFF4 |
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| 48 | #define SCPCELLID2 0xFF8 |
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| 49 | #define SCPCELLID3 0xFFC |
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| 50 | |
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| 51 | #define SCCTRL_TIMERENnSEL_SHIFT(n) (15 + ((n) * 2)) |
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| 52 | |
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| 53 | static inline void sysctl_soft_reset(void __iomem *base) |
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| 54 | { |
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| 55 | /* switch to slow mode */ |
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| 56 | writel(val: 0x2, addr: base + SCCTRL); |
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| 57 | |
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| 58 | /* writing any value to SCSYSSTAT reg will reset system */ |
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| 59 | writel(val: 0, addr: base + SCSYSSTAT); |
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| 60 | } |
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| 61 | |
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| 62 | #endif /* __AMBA_SP810_H */ |
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| 63 | |
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