1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com
4 */
5
6#ifndef K3_UDMA_GLUE_H_
7#define K3_UDMA_GLUE_H_
8
9#include <linux/types.h>
10#include <linux/soc/ti/k3-ringacc.h>
11#include <linux/dma/ti-cppi5.h>
12
13struct k3_udma_glue_tx_channel_cfg {
14 struct k3_ring_cfg tx_cfg;
15 struct k3_ring_cfg txcq_cfg;
16
17 bool tx_pause_on_err;
18 bool tx_filt_einfo;
19 bool tx_filt_pswords;
20 bool tx_supr_tdpkt;
21 u32 swdata_size;
22};
23
24struct k3_udma_glue_tx_channel;
25
26struct k3_udma_glue_tx_channel *k3_udma_glue_request_tx_chn(struct device *dev,
27 const char *name, struct k3_udma_glue_tx_channel_cfg *cfg);
28
29struct k3_udma_glue_tx_channel *
30k3_udma_glue_request_tx_chn_for_thread_id(struct device *dev,
31 struct k3_udma_glue_tx_channel_cfg *cfg,
32 struct device_node *udmax_np, u32 thread_id);
33
34void k3_udma_glue_release_tx_chn(struct k3_udma_glue_tx_channel *tx_chn);
35int k3_udma_glue_push_tx_chn(struct k3_udma_glue_tx_channel *tx_chn,
36 struct cppi5_host_desc_t *desc_tx,
37 dma_addr_t desc_dma);
38int k3_udma_glue_pop_tx_chn(struct k3_udma_glue_tx_channel *tx_chn,
39 dma_addr_t *desc_dma);
40int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn);
41void k3_udma_glue_disable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn);
42void k3_udma_glue_tdown_tx_chn(struct k3_udma_glue_tx_channel *tx_chn,
43 bool sync);
44void k3_udma_glue_reset_tx_chn(struct k3_udma_glue_tx_channel *tx_chn,
45 void *data, void (*cleanup)(void *data, dma_addr_t desc_dma));
46u32 k3_udma_glue_tx_get_hdesc_size(struct k3_udma_glue_tx_channel *tx_chn);
47u32 k3_udma_glue_tx_get_txcq_id(struct k3_udma_glue_tx_channel *tx_chn);
48int k3_udma_glue_tx_get_irq(struct k3_udma_glue_tx_channel *tx_chn);
49struct device *
50 k3_udma_glue_tx_get_dma_device(struct k3_udma_glue_tx_channel *tx_chn);
51void k3_udma_glue_tx_dma_to_cppi5_addr(struct k3_udma_glue_tx_channel *tx_chn,
52 dma_addr_t *addr);
53void k3_udma_glue_tx_cppi5_to_dma_addr(struct k3_udma_glue_tx_channel *tx_chn,
54 dma_addr_t *addr);
55
56enum {
57 K3_UDMA_GLUE_SRC_TAG_LO_KEEP = 0,
58 K3_UDMA_GLUE_SRC_TAG_LO_USE_FLOW_REG = 1,
59 K3_UDMA_GLUE_SRC_TAG_LO_USE_REMOTE_FLOW_ID = 2,
60 K3_UDMA_GLUE_SRC_TAG_LO_USE_REMOTE_SRC_TAG = 4,
61};
62
63/**
64 * k3_udma_glue_rx_flow_cfg - UDMA RX flow cfg
65 *
66 * @rx_cfg: RX ring configuration
67 * @rxfdq_cfg: RX free Host PD ring configuration
68 * @ring_rxq_id: RX ring id (or -1 for any)
69 * @ring_rxfdq0_id: RX free Host PD ring (FDQ) if (or -1 for any)
70 * @rx_error_handling: Rx Error Handling Mode (0 - drop, 1 - re-try)
71 * @src_tag_lo_sel: Rx Source Tag Low Byte Selector in Host PD
72 */
73struct k3_udma_glue_rx_flow_cfg {
74 struct k3_ring_cfg rx_cfg;
75 struct k3_ring_cfg rxfdq_cfg;
76 int ring_rxq_id;
77 int ring_rxfdq0_id;
78 bool rx_error_handling;
79 int src_tag_lo_sel;
80};
81
82/**
83 * k3_udma_glue_rx_channel_cfg - UDMA RX channel cfg
84 *
85 * @psdata_size: SW Data is present in Host PD of @swdata_size bytes
86 * @flow_id_base: first flow_id used by channel.
87 * if @flow_id_base = -1 - range of GP rflows will be
88 * allocated dynamically.
89 * @flow_id_num: number of RX flows used by channel
90 * @flow_id_use_rxchan_id: use RX channel id as flow id,
91 * used only if @flow_id_num = 1
92 * @remote indication that RX channel is remote - some remote CPU
93 * core owns and control the RX channel. Linux Host only
94 * allowed to attach and configure RX Flow within RX
95 * channel. if set - not RX channel operation will be
96 * performed by K3 NAVSS DMA glue interface.
97 * @def_flow_cfg default RX flow configuration,
98 * used only if @flow_id_num = 1
99 */
100struct k3_udma_glue_rx_channel_cfg {
101 u32 swdata_size;
102 int flow_id_base;
103 int flow_id_num;
104 bool flow_id_use_rxchan_id;
105 bool remote;
106
107 struct k3_udma_glue_rx_flow_cfg *def_flow_cfg;
108};
109
110struct k3_udma_glue_rx_channel;
111
112struct k3_udma_glue_rx_channel *k3_udma_glue_request_rx_chn(
113 struct device *dev,
114 const char *name,
115 struct k3_udma_glue_rx_channel_cfg *cfg);
116
117struct k3_udma_glue_rx_channel *
118k3_udma_glue_request_remote_rx_chn_for_thread_id(struct device *dev,
119 struct k3_udma_glue_rx_channel_cfg *cfg,
120 struct device_node *udmax_np, u32 thread_id);
121
122void k3_udma_glue_release_rx_chn(struct k3_udma_glue_rx_channel *rx_chn);
123int k3_udma_glue_enable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn);
124void k3_udma_glue_disable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn);
125void k3_udma_glue_tdown_rx_chn(struct k3_udma_glue_rx_channel *rx_chn,
126 bool sync);
127int k3_udma_glue_push_rx_chn(struct k3_udma_glue_rx_channel *rx_chn,
128 u32 flow_num, struct cppi5_host_desc_t *desc_tx,
129 dma_addr_t desc_dma);
130int k3_udma_glue_pop_rx_chn(struct k3_udma_glue_rx_channel *rx_chn,
131 u32 flow_num, dma_addr_t *desc_dma);
132int k3_udma_glue_rx_flow_init(struct k3_udma_glue_rx_channel *rx_chn,
133 u32 flow_idx, struct k3_udma_glue_rx_flow_cfg *flow_cfg);
134u32 k3_udma_glue_rx_flow_get_fdq_id(struct k3_udma_glue_rx_channel *rx_chn,
135 u32 flow_idx);
136u32 k3_udma_glue_rx_get_flow_id_base(struct k3_udma_glue_rx_channel *rx_chn);
137int k3_udma_glue_rx_get_irq(struct k3_udma_glue_rx_channel *rx_chn,
138 u32 flow_num);
139void k3_udma_glue_rx_put_irq(struct k3_udma_glue_rx_channel *rx_chn,
140 u32 flow_num);
141void k3_udma_glue_reset_rx_chn(struct k3_udma_glue_rx_channel *rx_chn,
142 u32 flow_num, void *data,
143 void (*cleanup)(void *data, dma_addr_t desc_dma),
144 bool skip_fdq);
145int k3_udma_glue_rx_flow_enable(struct k3_udma_glue_rx_channel *rx_chn,
146 u32 flow_idx);
147int k3_udma_glue_rx_flow_disable(struct k3_udma_glue_rx_channel *rx_chn,
148 u32 flow_idx);
149struct device *
150 k3_udma_glue_rx_get_dma_device(struct k3_udma_glue_rx_channel *rx_chn);
151void k3_udma_glue_rx_dma_to_cppi5_addr(struct k3_udma_glue_rx_channel *rx_chn,
152 dma_addr_t *addr);
153void k3_udma_glue_rx_cppi5_to_dma_addr(struct k3_udma_glue_rx_channel *rx_chn,
154 dma_addr_t *addr);
155
156#endif /* K3_UDMA_GLUE_H_ */
157

source code of linux/include/linux/dma/k3-udma-glue.h