| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Copyright (C) 2017-2018, Intel Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef __STRATIX10_SMC_H |
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| 7 | #define __STRATIX10_SMC_H |
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| 8 | |
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| 9 | #include <linux/arm-smccc.h> |
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| 10 | #include <linux/bitops.h> |
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| 11 | |
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| 12 | /** |
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| 13 | * This file defines the Secure Monitor Call (SMC) message protocol used for |
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| 14 | * service layer driver in normal world (EL1) to communicate with secure |
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| 15 | * monitor software in Secure Monitor Exception Level 3 (EL3). |
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| 16 | * |
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| 17 | * This file is shared with secure firmware (FW) which is out of kernel tree. |
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| 18 | * |
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| 19 | * An ARM SMC instruction takes a function identifier and up to 6 64-bit |
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| 20 | * register values as arguments, and can return up to 4 64-bit register |
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| 21 | * value. The operation of the secure monitor is determined by the parameter |
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| 22 | * values passed in through registers. |
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| 23 | * |
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| 24 | * EL1 and EL3 communicates pointer as physical address rather than the |
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| 25 | * virtual address. |
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| 26 | * |
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| 27 | * Functions specified by ARM SMC Calling convention: |
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| 28 | * |
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| 29 | * FAST call executes atomic operations, returns when the requested operation |
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| 30 | * has completed. |
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| 31 | * STD call starts a operation which can be preempted by a non-secure |
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| 32 | * interrupt. The call can return before the requested operation has |
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| 33 | * completed. |
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| 34 | * |
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| 35 | * a0..a7 is used as register names in the descriptions below, on arm32 |
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| 36 | * that translates to r0..r7 and on arm64 to w0..w7. |
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| 37 | */ |
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| 38 | |
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| 39 | /** |
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| 40 | * @func_num: function ID |
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| 41 | */ |
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| 42 | #define INTEL_SIP_SMC_STD_CALL_VAL(func_num) \ |
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| 43 | ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL, ARM_SMCCC_SMC_64, \ |
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| 44 | ARM_SMCCC_OWNER_SIP, (func_num)) |
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| 45 | |
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| 46 | #define INTEL_SIP_SMC_FAST_CALL_VAL(func_num) \ |
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| 47 | ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_64, \ |
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| 48 | ARM_SMCCC_OWNER_SIP, (func_num)) |
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| 49 | |
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| 50 | /** |
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| 51 | * Return values in INTEL_SIP_SMC_* call |
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| 52 | * |
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| 53 | * INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION: |
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| 54 | * Secure monitor software doesn't recognize the request. |
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| 55 | * |
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| 56 | * INTEL_SIP_SMC_STATUS_OK: |
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| 57 | * Secure monitor software accepts the service client's request. |
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| 58 | * |
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| 59 | * INTEL_SIP_SMC_STATUS_BUSY: |
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| 60 | * Secure monitor software is still processing service client's request. |
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| 61 | * |
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| 62 | * INTEL_SIP_SMC_STATUS_REJECTED: |
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| 63 | * Secure monitor software reject the service client's request. |
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| 64 | * |
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| 65 | * INTEL_SIP_SMC_STATUS_ERROR: |
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| 66 | * There is error during the process of service request. |
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| 67 | * |
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| 68 | * INTEL_SIP_SMC_RSU_ERROR: |
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| 69 | * There is error during the process of remote status update request. |
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| 70 | */ |
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| 71 | #define INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION 0xFFFFFFFF |
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| 72 | #define INTEL_SIP_SMC_STATUS_OK 0x0 |
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| 73 | #define INTEL_SIP_SMC_STATUS_BUSY 0x1 |
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| 74 | #define INTEL_SIP_SMC_STATUS_REJECTED 0x2 |
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| 75 | #define INTEL_SIP_SMC_STATUS_ERROR 0x4 |
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| 76 | #define INTEL_SIP_SMC_RSU_ERROR 0x7 |
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| 77 | |
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| 78 | /** |
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| 79 | * Request INTEL_SIP_SMC_FPGA_CONFIG_START |
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| 80 | * |
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| 81 | * Sync call used by service driver at EL1 to request the FPGA in EL3 to |
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| 82 | * be prepare to receive a new configuration. |
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| 83 | * |
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| 84 | * Call register usage: |
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| 85 | * a0: INTEL_SIP_SMC_FPGA_CONFIG_START. |
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| 86 | * a1: flag for full or partial configuration. 0 for full and 1 for partial |
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| 87 | * configuration. |
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| 88 | * a2-7: not used. |
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| 89 | * |
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| 90 | * Return status: |
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| 91 | * a0: INTEL_SIP_SMC_STATUS_OK, or INTEL_SIP_SMC_STATUS_ERROR. |
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| 92 | * a1-3: not used. |
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| 93 | */ |
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| 94 | #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START 1 |
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| 95 | #define INTEL_SIP_SMC_FPGA_CONFIG_START \ |
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| 96 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START) |
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| 97 | |
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| 98 | /** |
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| 99 | * Request INTEL_SIP_SMC_FPGA_CONFIG_WRITE |
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| 100 | * |
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| 101 | * Async call used by service driver at EL1 to provide FPGA configuration data |
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| 102 | * to secure world. |
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| 103 | * |
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| 104 | * Call register usage: |
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| 105 | * a0: INTEL_SIP_SMC_FPGA_CONFIG_WRITE. |
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| 106 | * a1: 64bit physical address of the configuration data memory block |
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| 107 | * a2: Size of configuration data block. |
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| 108 | * a3-7: not used. |
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| 109 | * |
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| 110 | * Return status: |
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| 111 | * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or |
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| 112 | * INTEL_SIP_SMC_STATUS_ERROR. |
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| 113 | * a1: 64bit physical address of 1st completed memory block if any completed |
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| 114 | * block, otherwise zero value. |
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| 115 | * a2: 64bit physical address of 2nd completed memory block if any completed |
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| 116 | * block, otherwise zero value. |
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| 117 | * a3: 64bit physical address of 3rd completed memory block if any completed |
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| 118 | * block, otherwise zero value. |
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| 119 | */ |
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| 120 | #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE 2 |
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| 121 | #define INTEL_SIP_SMC_FPGA_CONFIG_WRITE \ |
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| 122 | INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE) |
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| 123 | |
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| 124 | /** |
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| 125 | * Request INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE |
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| 126 | * |
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| 127 | * Sync call used by service driver at EL1 to track the completed write |
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| 128 | * transactions. This request is called after INTEL_SIP_SMC_FPGA_CONFIG_WRITE |
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| 129 | * call returns INTEL_SIP_SMC_STATUS_BUSY. |
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| 130 | * |
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| 131 | * Call register usage: |
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| 132 | * a0: INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE. |
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| 133 | * a1-7: not used. |
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| 134 | * |
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| 135 | * Return status: |
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| 136 | * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FPGA_BUSY or |
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| 137 | * INTEL_SIP_SMC_STATUS_ERROR. |
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| 138 | * a1: 64bit physical address of 1st completed memory block. |
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| 139 | * a2: 64bit physical address of 2nd completed memory block if |
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| 140 | * any completed block, otherwise zero value. |
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| 141 | * a3: 64bit physical address of 3rd completed memory block if |
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| 142 | * any completed block, otherwise zero value. |
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| 143 | */ |
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| 144 | #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE 3 |
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| 145 | #define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE \ |
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| 146 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE) |
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| 147 | |
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| 148 | /** |
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| 149 | * Request INTEL_SIP_SMC_FPGA_CONFIG_ISDONE |
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| 150 | * |
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| 151 | * Sync call used by service driver at EL1 to inform secure world that all |
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| 152 | * data are sent, to check whether or not the secure world had completed |
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| 153 | * the FPGA configuration process. |
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| 154 | * |
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| 155 | * Call register usage: |
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| 156 | * a0: INTEL_SIP_SMC_FPGA_CONFIG_ISDONE. |
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| 157 | * a1-7: not used. |
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| 158 | * |
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| 159 | * Return status: |
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| 160 | * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or |
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| 161 | * INTEL_SIP_SMC_STATUS_ERROR. |
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| 162 | * a1-3: not used. |
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| 163 | */ |
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| 164 | #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE 4 |
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| 165 | #define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE \ |
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| 166 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE) |
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| 167 | |
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| 168 | /** |
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| 169 | * Request INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM |
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| 170 | * |
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| 171 | * Sync call used by service driver at EL1 to query the physical address of |
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| 172 | * memory block reserved by secure monitor software. |
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| 173 | * |
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| 174 | * Call register usage: |
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| 175 | * a0:INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM. |
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| 176 | * a1-7: not used. |
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| 177 | * |
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| 178 | * Return status: |
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| 179 | * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR. |
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| 180 | * a1: start of physical address of reserved memory block. |
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| 181 | * a2: size of reserved memory block. |
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| 182 | * a3: not used. |
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| 183 | */ |
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| 184 | #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM 5 |
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| 185 | #define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM \ |
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| 186 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM) |
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| 187 | |
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| 188 | /** |
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| 189 | * Request INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK |
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| 190 | * |
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| 191 | * For SMC loop-back mode only, used for internal integration, debugging |
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| 192 | * or troubleshooting. |
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| 193 | * |
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| 194 | * Call register usage: |
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| 195 | * a0: INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK. |
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| 196 | * a1-7: not used. |
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| 197 | * |
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| 198 | * Return status: |
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| 199 | * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR. |
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| 200 | * a1-3: not used. |
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| 201 | */ |
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| 202 | #define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK 6 |
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| 203 | #define INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK \ |
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| 204 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK) |
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| 205 | |
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| 206 | /** |
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| 207 | * Request INTEL_SIP_SMC_REG_READ |
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| 208 | * |
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| 209 | * Read a protected register at EL3 |
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| 210 | * |
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| 211 | * Call register usage: |
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| 212 | * a0: INTEL_SIP_SMC_REG_READ. |
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| 213 | * a1: register address. |
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| 214 | * a2-7: not used. |
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| 215 | * |
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| 216 | * Return status: |
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| 217 | * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR. |
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| 218 | * a1: value in the register |
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| 219 | * a2-3: not used. |
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| 220 | */ |
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| 221 | #define INTEL_SIP_SMC_FUNCID_REG_READ 7 |
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| 222 | #define INTEL_SIP_SMC_REG_READ \ |
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| 223 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_READ) |
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| 224 | |
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| 225 | /** |
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| 226 | * Request INTEL_SIP_SMC_REG_WRITE |
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| 227 | * |
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| 228 | * Write a protected register at EL3 |
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| 229 | * |
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| 230 | * Call register usage: |
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| 231 | * a0: INTEL_SIP_SMC_REG_WRITE. |
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| 232 | * a1: register address |
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| 233 | * a2: value to program into register. |
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| 234 | * a3-7: not used. |
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| 235 | * |
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| 236 | * Return status: |
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| 237 | * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR. |
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| 238 | * a1-3: not used. |
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| 239 | */ |
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| 240 | #define INTEL_SIP_SMC_FUNCID_REG_WRITE 8 |
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| 241 | #define INTEL_SIP_SMC_REG_WRITE \ |
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| 242 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_WRITE) |
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| 243 | |
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| 244 | /** |
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| 245 | * Request INTEL_SIP_SMC_FUNCID_REG_UPDATE |
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| 246 | * |
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| 247 | * Update one or more bits in a protected register at EL3 using a |
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| 248 | * read-modify-write operation. |
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| 249 | * |
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| 250 | * Call register usage: |
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| 251 | * a0: INTEL_SIP_SMC_REG_UPDATE. |
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| 252 | * a1: register address |
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| 253 | * a2: write Mask. |
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| 254 | * a3: value to write. |
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| 255 | * a4-7: not used. |
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| 256 | * |
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| 257 | * Return status: |
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| 258 | * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR. |
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| 259 | * a1-3: Not used. |
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| 260 | */ |
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| 261 | #define INTEL_SIP_SMC_FUNCID_REG_UPDATE 9 |
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| 262 | #define INTEL_SIP_SMC_REG_UPDATE \ |
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| 263 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_UPDATE) |
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| 264 | |
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| 265 | /** |
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| 266 | * Request INTEL_SIP_SMC_RSU_STATUS |
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| 267 | * |
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| 268 | * Request remote status update boot log, call is synchronous. |
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| 269 | * |
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| 270 | * Call register usage: |
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| 271 | * a0 INTEL_SIP_SMC_RSU_STATUS |
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| 272 | * a1-7 not used |
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| 273 | * |
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| 274 | * Return status |
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| 275 | * a0: Current Image |
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| 276 | * a1: Last Failing Image |
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| 277 | * a2: Version | State |
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| 278 | * a3: Error details | Error location |
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| 279 | * |
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| 280 | * Or |
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| 281 | * |
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| 282 | * a0: INTEL_SIP_SMC_RSU_ERROR |
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| 283 | */ |
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| 284 | #define INTEL_SIP_SMC_FUNCID_RSU_STATUS 11 |
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| 285 | #define INTEL_SIP_SMC_RSU_STATUS \ |
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| 286 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_STATUS) |
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| 287 | |
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| 288 | /** |
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| 289 | * Request INTEL_SIP_SMC_RSU_UPDATE |
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| 290 | * |
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| 291 | * Request to set the offset of the bitstream to boot after reboot, call |
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| 292 | * is synchronous. |
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| 293 | * |
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| 294 | * Call register usage: |
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| 295 | * a0 INTEL_SIP_SMC_RSU_UPDATE |
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| 296 | * a1 64bit physical address of the configuration data memory in flash |
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| 297 | * a2-7 not used |
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| 298 | * |
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| 299 | * Return status |
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| 300 | * a0 INTEL_SIP_SMC_STATUS_OK |
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| 301 | */ |
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| 302 | #define INTEL_SIP_SMC_FUNCID_RSU_UPDATE 12 |
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| 303 | #define INTEL_SIP_SMC_RSU_UPDATE \ |
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| 304 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE) |
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| 305 | |
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| 306 | /** |
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| 307 | * Request INTEL_SIP_SMC_ECC_DBE |
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| 308 | * |
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| 309 | * Sync call used by service driver at EL1 to alert EL3 that a Double |
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| 310 | * Bit ECC error has occurred. |
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| 311 | * |
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| 312 | * Call register usage: |
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| 313 | * a0 INTEL_SIP_SMC_ECC_DBE |
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| 314 | * a1 SysManager Double Bit Error value |
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| 315 | * a2-7 not used |
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| 316 | * |
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| 317 | * Return status |
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| 318 | * a0 INTEL_SIP_SMC_STATUS_OK |
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| 319 | */ |
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| 320 | #define INTEL_SIP_SMC_FUNCID_ECC_DBE 13 |
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| 321 | #define INTEL_SIP_SMC_ECC_DBE \ |
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| 322 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE) |
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| 323 | |
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| 324 | /** |
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| 325 | * Request INTEL_SIP_SMC_RSU_NOTIFY |
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| 326 | * |
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| 327 | * Sync call used by service driver at EL1 to report hard processor |
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| 328 | * system execution stage to firmware |
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| 329 | * |
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| 330 | * Call register usage: |
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| 331 | * a0 INTEL_SIP_SMC_RSU_NOTIFY |
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| 332 | * a1 32bit value representing hard processor system execution stage |
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| 333 | * a2-7 not used |
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| 334 | * |
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| 335 | * Return status |
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| 336 | * a0 INTEL_SIP_SMC_STATUS_OK |
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| 337 | */ |
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| 338 | #define INTEL_SIP_SMC_FUNCID_RSU_NOTIFY 14 |
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| 339 | #define INTEL_SIP_SMC_RSU_NOTIFY \ |
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| 340 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_NOTIFY) |
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| 341 | |
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| 342 | /** |
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| 343 | * Request INTEL_SIP_SMC_RSU_RETRY_COUNTER |
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| 344 | * |
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| 345 | * Sync call used by service driver at EL1 to query RSU retry counter |
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| 346 | * |
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| 347 | * Call register usage: |
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| 348 | * a0 INTEL_SIP_SMC_RSU_RETRY_COUNTER |
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| 349 | * a1-7 not used |
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| 350 | * |
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| 351 | * Return status |
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| 352 | * a0 INTEL_SIP_SMC_STATUS_OK |
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| 353 | * a1 the retry counter |
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| 354 | * |
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| 355 | * Or |
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| 356 | * |
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| 357 | * a0 INTEL_SIP_SMC_RSU_ERROR |
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| 358 | */ |
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| 359 | #define INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER 15 |
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| 360 | #define INTEL_SIP_SMC_RSU_RETRY_COUNTER \ |
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| 361 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER) |
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| 362 | |
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| 363 | /** |
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| 364 | * Request INTEL_SIP_SMC_RSU_DCMF_VERSION |
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| 365 | * |
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| 366 | * Sync call used by service driver at EL1 to query DCMF (Decision |
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| 367 | * Configuration Management Firmware) version from FW |
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| 368 | * |
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| 369 | * Call register usage: |
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| 370 | * a0 INTEL_SIP_SMC_RSU_DCMF_VERSION |
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| 371 | * a1-7 not used |
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| 372 | * |
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| 373 | * Return status |
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| 374 | * a0 INTEL_SIP_SMC_STATUS_OK |
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| 375 | * a1 dcmf1 | dcmf0 |
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| 376 | * a2 dcmf3 | dcmf2 |
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| 377 | * |
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| 378 | * Or |
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| 379 | * |
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| 380 | * a0 INTEL_SIP_SMC_RSU_ERROR |
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| 381 | */ |
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| 382 | #define INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION 16 |
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| 383 | #define INTEL_SIP_SMC_RSU_DCMF_VERSION \ |
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| 384 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION) |
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| 385 | |
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| 386 | /** |
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| 387 | * Request INTEL_SIP_SMC_RSU_MAX_RETRY |
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| 388 | * |
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| 389 | * Sync call used by service driver at EL1 to query max retry value from FW |
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| 390 | * |
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| 391 | * Call register usage: |
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| 392 | * a0 INTEL_SIP_SMC_RSU_MAX_RETRY |
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| 393 | * a1-7 not used |
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| 394 | * |
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| 395 | * Return status |
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| 396 | * a0 INTEL_SIP_SMC_STATUS_OK |
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| 397 | * a1 max retry value |
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| 398 | * |
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| 399 | * Or |
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| 400 | * a0 INTEL_SIP_SMC_RSU_ERROR |
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| 401 | */ |
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| 402 | #define INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY 18 |
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| 403 | #define INTEL_SIP_SMC_RSU_MAX_RETRY \ |
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| 404 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY) |
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| 405 | |
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| 406 | /** |
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| 407 | * Request INTEL_SIP_SMC_RSU_DCMF_STATUS |
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| 408 | * |
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| 409 | * Sync call used by service driver at EL1 to query DCMF status from FW |
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| 410 | * |
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| 411 | * Call register usage: |
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| 412 | * a0 INTEL_SIP_SMC_RSU_DCMF_STATUS |
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| 413 | * a1-7 not used |
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| 414 | * |
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| 415 | * Return status |
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| 416 | * a0 INTEL_SIP_SMC_STATUS_OK |
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| 417 | * a1 dcmf3 | dcmf2 | dcmf1 | dcmf0 |
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| 418 | * |
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| 419 | * Or |
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| 420 | * |
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| 421 | * a0 INTEL_SIP_SMC_RSU_ERROR |
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| 422 | */ |
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| 423 | #define INTEL_SIP_SMC_FUNCID_RSU_DCMF_STATUS 20 |
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| 424 | #define INTEL_SIP_SMC_RSU_DCMF_STATUS \ |
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| 425 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_STATUS) |
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| 426 | |
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| 427 | /** |
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| 428 | * Request INTEL_SIP_SMC_SERVICE_COMPLETED |
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| 429 | * Sync call to check if the secure world have completed service request |
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| 430 | * or not. |
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| 431 | * |
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| 432 | * Call register usage: |
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| 433 | * a0: INTEL_SIP_SMC_SERVICE_COMPLETED |
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| 434 | * a1: this register is optional. If used, it is the physical address for |
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| 435 | * secure firmware to put output data |
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| 436 | * a2: this register is optional. If used, it is the size of output data |
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| 437 | * a3-a7: not used |
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| 438 | * |
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| 439 | * Return status: |
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| 440 | * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_ERROR, |
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| 441 | * INTEL_SIP_SMC_REJECTED or INTEL_SIP_SMC_STATUS_BUSY |
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| 442 | * a1: mailbox error if a0 is INTEL_SIP_SMC_STATUS_ERROR |
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| 443 | * a2: physical address containing the process info |
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| 444 | * for FCS certificate -- the data contains the certificate status |
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| 445 | * for FCS cryption -- the data contains the actual data size FW processes |
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| 446 | * a3: output data size |
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| 447 | */ |
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| 448 | #define INTEL_SIP_SMC_FUNCID_SERVICE_COMPLETED 30 |
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| 449 | #define INTEL_SIP_SMC_SERVICE_COMPLETED \ |
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| 450 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_SERVICE_COMPLETED) |
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| 451 | |
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| 452 | /** |
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| 453 | * Request INTEL_SIP_SMC_FIRMWARE_VERSION |
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| 454 | * |
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| 455 | * Sync call used to query the version of running firmware |
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| 456 | * |
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| 457 | * Call register usage: |
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| 458 | * a0 INTEL_SIP_SMC_FIRMWARE_VERSION |
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| 459 | * a1-a7 not used |
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| 460 | * |
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| 461 | * Return status: |
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| 462 | * a0 INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR |
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| 463 | * a1 running firmware version |
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| 464 | */ |
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| 465 | #define INTEL_SIP_SMC_FUNCID_FIRMWARE_VERSION 31 |
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| 466 | #define INTEL_SIP_SMC_FIRMWARE_VERSION \ |
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| 467 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FIRMWARE_VERSION) |
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| 468 | |
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| 469 | /** |
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| 470 | * SMC call protocol for Mailbox, starting FUNCID from 60 |
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| 471 | * |
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| 472 | * Call register usage: |
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| 473 | * a0 INTEL_SIP_SMC_MBOX_SEND_CMD |
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| 474 | * a1 mailbox command code |
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| 475 | * a2 physical address that contain mailbox command data (not include header) |
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| 476 | * a3 mailbox command data size in word |
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| 477 | * a4 set to 0 for CASUAL, set to 1 for URGENT |
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| 478 | * a5 physical address for secure firmware to put response data |
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| 479 | * (not include header) |
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| 480 | * a6 maximum size in word of physical address to store response data |
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| 481 | * a7 not used |
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| 482 | * |
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| 483 | * Return status |
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| 484 | * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_REJECTED or |
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| 485 | * INTEL_SIP_SMC_STATUS_ERROR |
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| 486 | * a1 mailbox error code |
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| 487 | * a2 response data length in word |
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| 488 | * a3 not used |
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| 489 | */ |
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| 490 | #define INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD 60 |
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| 491 | #define INTEL_SIP_SMC_MBOX_SEND_CMD \ |
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| 492 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD) |
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| 493 | |
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| 494 | /** |
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| 495 | * Request INTEL_SIP_SMC_SVC_VERSION |
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| 496 | * |
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| 497 | * Sync call used to query the SIP SMC API Version |
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| 498 | * |
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| 499 | * Call register usage: |
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| 500 | * a0 INTEL_SIP_SMC_SVC_VERSION |
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| 501 | * a1-a7 not used |
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| 502 | * |
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| 503 | * Return status: |
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| 504 | * a0 INTEL_SIP_SMC_STATUS_OK |
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| 505 | * a1 Major |
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| 506 | * a2 Minor |
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| 507 | */ |
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| 508 | #define INTEL_SIP_SMC_SVC_FUNCID_VERSION 512 |
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| 509 | #define INTEL_SIP_SMC_SVC_VERSION \ |
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| 510 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_SVC_FUNCID_VERSION) |
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| 511 | |
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| 512 | /** |
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| 513 | * SMC call protocol for FPGA Crypto Service (FCS) |
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| 514 | * FUNCID starts from 90 |
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| 515 | */ |
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| 516 | |
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| 517 | /** |
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| 518 | * Request INTEL_SIP_SMC_FCS_RANDOM_NUMBER |
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| 519 | * |
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| 520 | * Sync call used to query the random number generated by the firmware |
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| 521 | * |
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| 522 | * Call register usage: |
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| 523 | * a0 INTEL_SIP_SMC_FCS_RANDOM_NUMBER |
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| 524 | * a1 the physical address for firmware to write generated random data |
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| 525 | * a2-a7 not used |
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| 526 | * |
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| 527 | * Return status: |
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| 528 | * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FCS_ERROR or |
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| 529 | * INTEL_SIP_SMC_FCS_REJECTED |
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| 530 | * a1 mailbox error |
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| 531 | * a2 the physical address of generated random number |
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| 532 | * a3 size |
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| 533 | */ |
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| 534 | #define INTEL_SIP_SMC_FUNCID_FCS_RANDOM_NUMBER 90 |
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| 535 | #define INTEL_SIP_SMC_FCS_RANDOM_NUMBER \ |
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| 536 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_RANDOM_NUMBER) |
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| 537 | |
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| 538 | /** |
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| 539 | * Request INTEL_SIP_SMC_FCS_CRYPTION |
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| 540 | * Async call for data encryption and HMAC signature generation, or for |
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| 541 | * data decryption and HMAC verification. |
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| 542 | * |
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| 543 | * Call INTEL_SIP_SMC_SERVICE_COMPLETED to get the output encrypted or |
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| 544 | * decrypted data |
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| 545 | * |
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| 546 | * Call register usage: |
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| 547 | * a0 INTEL_SIP_SMC_FCS_CRYPTION |
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| 548 | * a1 cryption mode (1 for encryption and 0 for decryption) |
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| 549 | * a2 physical address which stores to be encrypted or decrypted data |
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| 550 | * a3 input data size |
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| 551 | * a4 physical address which will hold the encrypted or decrypted output data |
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| 552 | * a5 output data size |
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| 553 | * a6-a7 not used |
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| 554 | * |
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| 555 | * Return status: |
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| 556 | * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_ERROR or |
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| 557 | * INTEL_SIP_SMC_STATUS_REJECTED |
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| 558 | * a1-3 not used |
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| 559 | */ |
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| 560 | #define INTEL_SIP_SMC_FUNCID_FCS_CRYPTION 91 |
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| 561 | #define INTEL_SIP_SMC_FCS_CRYPTION \ |
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| 562 | INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_CRYPTION) |
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| 563 | |
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| 564 | /** |
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| 565 | * Request INTEL_SIP_SMC_FCS_SERVICE_REQUEST |
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| 566 | * Async call for authentication service of HPS software |
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| 567 | * |
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| 568 | * Call register usage: |
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| 569 | * a0 INTEL_SIP_SMC_FCS_SERVICE_REQUEST |
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| 570 | * a1 the physical address of data block |
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| 571 | * a2 size of data block |
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| 572 | * a3-a7 not used |
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| 573 | * |
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| 574 | * Return status: |
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| 575 | * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_ERROR or |
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| 576 | * INTEL_SIP_SMC_REJECTED |
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| 577 | * a1-a3 not used |
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| 578 | */ |
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| 579 | #define INTEL_SIP_SMC_FUNCID_FCS_SERVICE_REQUEST 92 |
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| 580 | #define INTEL_SIP_SMC_FCS_SERVICE_REQUEST \ |
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| 581 | INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_SERVICE_REQUEST) |
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| 582 | |
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| 583 | /** |
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| 584 | * Request INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE |
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| 585 | * Sync call to send a signed certificate |
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| 586 | * |
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| 587 | * Call register usage: |
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| 588 | * a0 INTEL_SIP_SMC_FCS_SEND_CERTIFICATE |
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| 589 | * a1 the physical address of CERTIFICATE block |
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| 590 | * a2 size of data block |
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| 591 | * a3-a7 not used |
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| 592 | * |
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| 593 | * Return status: |
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| 594 | * a0 INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_FCS_REJECTED |
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| 595 | * a1-a3 not used |
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| 596 | */ |
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| 597 | #define INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE 93 |
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| 598 | #define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE \ |
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| 599 | INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_SEND_CERTIFICATE) |
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| 600 | |
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| 601 | /** |
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| 602 | * Request INTEL_SIP_SMC_FCS_GET_PROVISION_DATA |
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| 603 | * Sync call to dump all the fuses and key hashes |
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| 604 | * |
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| 605 | * Call register usage: |
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| 606 | * a0 INTEL_SIP_SMC_FCS_GET_PROVISION_DATA |
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| 607 | * a1 the physical address for firmware to write structure of fuse and |
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| 608 | * key hashes |
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| 609 | * a2-a7 not used |
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| 610 | * |
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| 611 | * Return status: |
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| 612 | * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FCS_ERROR or |
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| 613 | * INTEL_SIP_SMC_FCS_REJECTED |
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| 614 | * a1 mailbox error |
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| 615 | * a2 physical address for the structure of fuse and key hashes |
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| 616 | * a3 the size of structure |
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| 617 | * |
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| 618 | */ |
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| 619 | #define INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA 94 |
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| 620 | #define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \ |
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| 621 | INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA) |
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| 622 | |
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| 623 | #endif |
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| 624 | |
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