1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef __LINUX_GPIO_NOMADIK_H |
3 | #define __LINUX_GPIO_NOMADIK_H |
4 | |
5 | struct fwnode_handle; |
6 | |
7 | /* Package definitions */ |
8 | #define PINCTRL_NMK_STN8815 0 |
9 | #define PINCTRL_NMK_DB8500 1 |
10 | |
11 | #define GPIO_BLOCK_SHIFT 5 |
12 | #define NMK_GPIO_PER_CHIP BIT(GPIO_BLOCK_SHIFT) |
13 | #define NMK_MAX_BANKS DIV_ROUND_UP(512, NMK_GPIO_PER_CHIP) |
14 | |
15 | /* Register in the logic block */ |
16 | #define NMK_GPIO_DAT 0x00 |
17 | #define NMK_GPIO_DATS 0x04 |
18 | #define NMK_GPIO_DATC 0x08 |
19 | #define NMK_GPIO_PDIS 0x0c |
20 | #define NMK_GPIO_DIR 0x10 |
21 | #define NMK_GPIO_DIRS 0x14 |
22 | #define NMK_GPIO_DIRC 0x18 |
23 | #define NMK_GPIO_SLPC 0x1c |
24 | #define NMK_GPIO_AFSLA 0x20 |
25 | #define NMK_GPIO_AFSLB 0x24 |
26 | #define NMK_GPIO_LOWEMI 0x28 |
27 | |
28 | #define NMK_GPIO_RIMSC 0x40 |
29 | #define NMK_GPIO_FIMSC 0x44 |
30 | #define NMK_GPIO_IS 0x48 |
31 | #define NMK_GPIO_IC 0x4c |
32 | #define NMK_GPIO_RWIMSC 0x50 |
33 | #define NMK_GPIO_FWIMSC 0x54 |
34 | #define NMK_GPIO_WKS 0x58 |
35 | /* These appear in DB8540 and later ASICs */ |
36 | #define NMK_GPIO_EDGELEVEL 0x5C |
37 | #define NMK_GPIO_LEVEL 0x60 |
38 | |
39 | /* Pull up/down values */ |
40 | enum nmk_gpio_pull { |
41 | NMK_GPIO_PULL_NONE, |
42 | NMK_GPIO_PULL_UP, |
43 | NMK_GPIO_PULL_DOWN, |
44 | }; |
45 | |
46 | /* Sleep mode */ |
47 | enum nmk_gpio_slpm { |
48 | NMK_GPIO_SLPM_INPUT, |
49 | NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT, |
50 | NMK_GPIO_SLPM_NOCHANGE, |
51 | NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE, |
52 | }; |
53 | |
54 | struct nmk_gpio_chip { |
55 | struct gpio_chip chip; |
56 | void __iomem *addr; |
57 | struct clk *clk; |
58 | unsigned int bank; |
59 | void (*set_ioforce)(bool enable); |
60 | spinlock_t lock; |
61 | bool sleepmode; |
62 | bool is_mobileye_soc; |
63 | /* Keep track of configured edges */ |
64 | u32 edge_rising; |
65 | u32 edge_falling; |
66 | u32 real_wake; |
67 | u32 rwimsc; |
68 | u32 fwimsc; |
69 | u32 rimsc; |
70 | u32 fimsc; |
71 | u32 pull_up; |
72 | u32 lowemi; |
73 | }; |
74 | |
75 | /* Alternate functions: function C is set in hw by setting both A and B */ |
76 | #define NMK_GPIO_ALT_GPIO 0 |
77 | #define NMK_GPIO_ALT_A 1 |
78 | #define NMK_GPIO_ALT_B 2 |
79 | #define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B) |
80 | |
81 | #define NMK_GPIO_ALT_CX_SHIFT 2 |
82 | #define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) |
83 | #define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) |
84 | #define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) |
85 | #define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) |
86 | |
87 | #define PRCM_GPIOCR_ALTCX(pin_num,\ |
88 | altc1_used, altc1_ri, altc1_cb,\ |
89 | altc2_used, altc2_ri, altc2_cb,\ |
90 | altc3_used, altc3_ri, altc3_cb,\ |
91 | altc4_used, altc4_ri, altc4_cb)\ |
92 | {\ |
93 | .pin = pin_num,\ |
94 | .altcx[PRCM_IDX_GPIOCR_ALTC1] = {\ |
95 | .used = altc1_used,\ |
96 | .reg_index = altc1_ri,\ |
97 | .control_bit = altc1_cb\ |
98 | },\ |
99 | .altcx[PRCM_IDX_GPIOCR_ALTC2] = {\ |
100 | .used = altc2_used,\ |
101 | .reg_index = altc2_ri,\ |
102 | .control_bit = altc2_cb\ |
103 | },\ |
104 | .altcx[PRCM_IDX_GPIOCR_ALTC3] = {\ |
105 | .used = altc3_used,\ |
106 | .reg_index = altc3_ri,\ |
107 | .control_bit = altc3_cb\ |
108 | },\ |
109 | .altcx[PRCM_IDX_GPIOCR_ALTC4] = {\ |
110 | .used = altc4_used,\ |
111 | .reg_index = altc4_ri,\ |
112 | .control_bit = altc4_cb\ |
113 | },\ |
114 | } |
115 | |
116 | /** |
117 | * enum prcm_gpiocr_reg_index |
118 | * Used to reference an PRCM GPIOCR register address. |
119 | */ |
120 | enum prcm_gpiocr_reg_index { |
121 | PRCM_IDX_GPIOCR1, |
122 | PRCM_IDX_GPIOCR2, |
123 | PRCM_IDX_GPIOCR3 |
124 | }; |
125 | /** |
126 | * enum prcm_gpiocr_altcx_index |
127 | * Used to reference an Other alternate-C function. |
128 | */ |
129 | enum prcm_gpiocr_altcx_index { |
130 | PRCM_IDX_GPIOCR_ALTC1, |
131 | PRCM_IDX_GPIOCR_ALTC2, |
132 | PRCM_IDX_GPIOCR_ALTC3, |
133 | PRCM_IDX_GPIOCR_ALTC4, |
134 | PRCM_IDX_GPIOCR_ALTC_MAX, |
135 | }; |
136 | |
137 | /** |
138 | * struct prcm_gpio_altcx - Other alternate-C function |
139 | * @used: other alternate-C function availability |
140 | * @reg_index: PRCM GPIOCR register index used to control the function |
141 | * @control_bit: PRCM GPIOCR bit used to control the function |
142 | */ |
143 | struct prcm_gpiocr_altcx { |
144 | bool used:1; |
145 | u8 reg_index:2; |
146 | u8 control_bit:5; |
147 | } __packed; |
148 | |
149 | /** |
150 | * struct prcm_gpio_altcx_pin_desc - Other alternate-C pin |
151 | * @pin: The pin number |
152 | * @altcx: array of other alternate-C[1-4] functions |
153 | */ |
154 | struct prcm_gpiocr_altcx_pin_desc { |
155 | unsigned short pin; |
156 | struct prcm_gpiocr_altcx altcx[PRCM_IDX_GPIOCR_ALTC_MAX]; |
157 | }; |
158 | |
159 | /** |
160 | * struct nmk_function - Nomadik pinctrl mux function |
161 | * @name: The name of the function, exported to pinctrl core. |
162 | * @groups: An array of pin groups that may select this function. |
163 | * @ngroups: The number of entries in @groups. |
164 | */ |
165 | struct nmk_function { |
166 | const char *name; |
167 | const char * const *groups; |
168 | unsigned int ngroups; |
169 | }; |
170 | |
171 | /** |
172 | * struct nmk_pingroup - describes a Nomadik pin group |
173 | * @grp: Generic data of the pin group (name and pins) |
174 | * @altsetting: the altsetting to apply to all pins in this group to |
175 | * configure them to be used by a function |
176 | */ |
177 | struct nmk_pingroup { |
178 | struct pingroup grp; |
179 | int altsetting; |
180 | }; |
181 | |
182 | #define NMK_PIN_GROUP(a, b) \ |
183 | { \ |
184 | .grp = PINCTRL_PINGROUP(#a, a##_pins, ARRAY_SIZE(a##_pins)), \ |
185 | .altsetting = b, \ |
186 | } |
187 | |
188 | /** |
189 | * struct nmk_pinctrl_soc_data - Nomadik pin controller per-SoC configuration |
190 | * @pins: An array describing all pins the pin controller affects. |
191 | * All pins which are also GPIOs must be listed first within the |
192 | * array, and be numbered identically to the GPIO controller's |
193 | * numbering. |
194 | * @npins: The number of entries in @pins. |
195 | * @functions: The functions supported on this SoC. |
196 | * @nfunction: The number of entries in @functions. |
197 | * @groups: An array describing all pin groups the pin SoC supports. |
198 | * @ngroups: The number of entries in @groups. |
199 | * @altcx_pins: The pins that support Other alternate-C function on this SoC |
200 | * @npins_altcx: The number of Other alternate-C pins |
201 | * @prcm_gpiocr_registers: The array of PRCM GPIOCR registers on this SoC |
202 | */ |
203 | struct nmk_pinctrl_soc_data { |
204 | const struct pinctrl_pin_desc *pins; |
205 | unsigned int npins; |
206 | const struct nmk_function *functions; |
207 | unsigned int nfunctions; |
208 | const struct nmk_pingroup *groups; |
209 | unsigned int ngroups; |
210 | const struct prcm_gpiocr_altcx_pin_desc *altcx_pins; |
211 | unsigned int npins_altcx; |
212 | const u16 *prcm_gpiocr_registers; |
213 | }; |
214 | |
215 | #ifdef CONFIG_PINCTRL_STN8815 |
216 | |
217 | void nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc); |
218 | |
219 | #else |
220 | |
221 | static inline void |
222 | nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc) |
223 | { |
224 | } |
225 | |
226 | #endif |
227 | |
228 | #ifdef CONFIG_PINCTRL_DB8500 |
229 | |
230 | void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc); |
231 | |
232 | #else |
233 | |
234 | static inline void |
235 | nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc) |
236 | { |
237 | } |
238 | |
239 | #endif |
240 | |
241 | #ifdef CONFIG_PINCTRL_DB8540 |
242 | |
243 | void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc); |
244 | |
245 | #else |
246 | |
247 | static inline void |
248 | nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc) |
249 | { |
250 | } |
251 | |
252 | #endif |
253 | |
254 | struct platform_device; |
255 | |
256 | #ifdef CONFIG_DEBUG_FS |
257 | |
258 | /* |
259 | * Symbols declared in gpio-nomadik used by pinctrl-nomadik. If pinctrl-nomadik |
260 | * is enabled, then gpio-nomadik is enabled as well; the reverse if not always |
261 | * true. |
262 | */ |
263 | void nmk_gpio_dbg_show_one(struct seq_file *s, struct pinctrl_dev *pctldev, |
264 | struct gpio_chip *chip, unsigned int offset, |
265 | unsigned int gpio); |
266 | |
267 | #else |
268 | |
269 | static inline void nmk_gpio_dbg_show_one(struct seq_file *s, |
270 | struct pinctrl_dev *pctldev, |
271 | struct gpio_chip *chip, |
272 | unsigned int offset, |
273 | unsigned int gpio) |
274 | { |
275 | } |
276 | |
277 | #endif |
278 | |
279 | void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, |
280 | unsigned int offset, int val); |
281 | void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, |
282 | enum nmk_gpio_slpm mode); |
283 | struct nmk_gpio_chip *nmk_gpio_populate_chip(struct fwnode_handle *fwnode, |
284 | struct platform_device *pdev); |
285 | |
286 | /* Symbols declared in pinctrl-nomadik used by gpio-nomadik. */ |
287 | #ifdef CONFIG_PINCTRL_NOMADIK |
288 | extern struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; |
289 | extern spinlock_t nmk_gpio_slpm_lock; |
290 | int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, |
291 | int gpio); |
292 | #endif |
293 | |
294 | #endif /* __LINUX_GPIO_NOMADIK_H */ |
295 | |