1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * ADF4350/ADF4351 SPI PLL driver
4 *
5 * Copyright 2012-2013 Analog Devices Inc.
6 */
7
8#ifndef IIO_PLL_ADF4350_H_
9#define IIO_PLL_ADF4350_H_
10
11/* Registers */
12#define ADF4350_REG0 0
13#define ADF4350_REG1 1
14#define ADF4350_REG2 2
15#define ADF4350_REG3 3
16#define ADF4350_REG4 4
17#define ADF4350_REG5 5
18
19/* REG0 Bit Definitions */
20#define ADF4350_REG0_FRACT(x) (((x) & 0xFFF) << 3)
21#define ADF4350_REG0_INT(x) (((x) & 0xFFFF) << 15)
22
23/* REG1 Bit Definitions */
24#define ADF4350_REG1_MOD(x) (((x) & 0xFFF) << 3)
25#define ADF4350_REG1_PHASE(x) (((x) & 0xFFF) << 15)
26#define ADF4350_REG1_PRESCALER (1 << 27)
27
28/* REG2 Bit Definitions */
29#define ADF4350_REG2_COUNTER_RESET_EN (1 << 3)
30#define ADF4350_REG2_CP_THREESTATE_EN (1 << 4)
31#define ADF4350_REG2_POWER_DOWN_EN (1 << 5)
32#define ADF4350_REG2_PD_POLARITY_POS (1 << 6)
33#define ADF4350_REG2_LDP_6ns (1 << 7)
34#define ADF4350_REG2_LDP_10ns (0 << 7)
35#define ADF4350_REG2_LDF_FRACT_N (0 << 8)
36#define ADF4350_REG2_LDF_INT_N (1 << 8)
37#define ADF4350_REG2_CHARGE_PUMP_CURR_uA(x) (((((x)-312) / 312) & 0xF) << 9)
38#define ADF4350_REG2_DOUBLE_BUFF_EN (1 << 13)
39#define ADF4350_REG2_10BIT_R_CNT(x) ((x) << 14)
40#define ADF4350_REG2_RDIV2_EN (1 << 24)
41#define ADF4350_REG2_RMULT2_EN (1 << 25)
42#define ADF4350_REG2_MUXOUT(x) ((x) << 26)
43#define ADF4350_REG2_NOISE_MODE(x) (((unsigned)(x)) << 29)
44#define ADF4350_MUXOUT_THREESTATE 0
45#define ADF4350_MUXOUT_DVDD 1
46#define ADF4350_MUXOUT_GND 2
47#define ADF4350_MUXOUT_R_DIV_OUT 3
48#define ADF4350_MUXOUT_N_DIV_OUT 4
49#define ADF4350_MUXOUT_ANALOG_LOCK_DETECT 5
50#define ADF4350_MUXOUT_DIGITAL_LOCK_DETECT 6
51
52/* REG3 Bit Definitions */
53#define ADF4350_REG3_12BIT_CLKDIV(x) ((x) << 3)
54#define ADF4350_REG3_12BIT_CLKDIV_MODE(x) ((x) << 16)
55#define ADF4350_REG3_12BIT_CSR_EN (1 << 18)
56#define ADF4351_REG3_CHARGE_CANCELLATION_EN (1 << 21)
57#define ADF4351_REG3_ANTI_BACKLASH_3ns_EN (1 << 22)
58#define ADF4351_REG3_BAND_SEL_CLOCK_MODE_HIGH (1 << 23)
59
60/* REG4 Bit Definitions */
61#define ADF4350_REG4_OUTPUT_PWR(x) ((x) << 3)
62#define ADF4350_REG4_RF_OUT_EN (1 << 5)
63#define ADF4350_REG4_AUX_OUTPUT_PWR(x) ((x) << 6)
64#define ADF4350_REG4_AUX_OUTPUT_EN (1 << 8)
65#define ADF4350_REG4_AUX_OUTPUT_FUND (1 << 9)
66#define ADF4350_REG4_AUX_OUTPUT_DIV (0 << 9)
67#define ADF4350_REG4_MUTE_TILL_LOCK_EN (1 << 10)
68#define ADF4350_REG4_VCO_PWRDOWN_EN (1 << 11)
69#define ADF4350_REG4_8BIT_BAND_SEL_CLKDIV(x) ((x) << 12)
70#define ADF4350_REG4_RF_DIV_SEL(x) ((x) << 20)
71#define ADF4350_REG4_FEEDBACK_DIVIDED (0 << 23)
72#define ADF4350_REG4_FEEDBACK_FUND (1 << 23)
73
74/* REG5 Bit Definitions */
75#define ADF4350_REG5_LD_PIN_MODE_LOW (0 << 22)
76#define ADF4350_REG5_LD_PIN_MODE_DIGITAL (1 << 22)
77#define ADF4350_REG5_LD_PIN_MODE_HIGH (3 << 22)
78
79/* Specifications */
80#define ADF4350_MAX_OUT_FREQ 4400000000ULL /* Hz */
81#define ADF4350_MIN_OUT_FREQ 137500000 /* Hz */
82#define ADF4351_MIN_OUT_FREQ 34375000 /* Hz */
83#define ADF4350_MIN_VCO_FREQ 2200000000ULL /* Hz */
84#define ADF4350_MAX_FREQ_45_PRESC 3000000000ULL /* Hz */
85#define ADF4350_MAX_FREQ_PFD 32000000 /* Hz */
86#define ADF4350_MAX_BANDSEL_CLK 125000 /* Hz */
87#define ADF4350_MAX_FREQ_REFIN 250000000 /* Hz */
88#define ADF4350_MAX_MODULUS 4095
89#define ADF4350_MAX_R_CNT 1023
90
91
92/**
93 * struct adf4350_platform_data - platform specific information
94 * @name: Optional device name.
95 * @clkin: REFin frequency in Hz.
96 * @channel_spacing: Channel spacing in Hz (influences MODULUS).
97 * @power_up_frequency: Optional, If set in Hz the PLL tunes to the desired
98 * frequency on probe.
99 * @ref_div_factor: Optional, if set the driver skips dynamic calculation
100 * and uses this default value instead.
101 * @ref_doubler_en: Enables reference doubler.
102 * @ref_div2_en: Enables reference divider.
103 * @r2_user_settings: User defined settings for ADF4350/1 REGISTER_2.
104 * @r3_user_settings: User defined settings for ADF4350/1 REGISTER_3.
105 * @r4_user_settings: User defined settings for ADF4350/1 REGISTER_4.
106 */
107
108struct adf4350_platform_data {
109 char name[32];
110 unsigned long clkin;
111 unsigned long channel_spacing;
112 unsigned long long power_up_frequency;
113
114 unsigned short ref_div_factor; /* 10-bit R counter */
115 bool ref_doubler_en;
116 bool ref_div2_en;
117
118 unsigned r2_user_settings;
119 unsigned r3_user_settings;
120 unsigned r4_user_settings;
121};
122
123#endif /* IIO_PLL_ADF4350_H_ */
124

source code of linux/include/linux/iio/frequency/adf4350.h