1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * Marvell 88PM860x Interface |
4 | * |
5 | * Copyright (C) 2009 Marvell International Ltd. |
6 | * Haojian Zhuang <haojian.zhuang@marvell.com> |
7 | */ |
8 | |
9 | #ifndef __LINUX_MFD_88PM860X_H |
10 | #define __LINUX_MFD_88PM860X_H |
11 | |
12 | #include <linux/interrupt.h> |
13 | |
14 | #define MFD_NAME_SIZE (40) |
15 | |
16 | enum { |
17 | CHIP_INVALID = 0, |
18 | CHIP_PM8606, |
19 | CHIP_PM8607, |
20 | CHIP_MAX, |
21 | }; |
22 | |
23 | enum { |
24 | PM8606_ID_INVALID, |
25 | PM8606_ID_BACKLIGHT, |
26 | PM8606_ID_LED, |
27 | PM8606_ID_VIBRATOR, |
28 | PM8606_ID_TOUCH, |
29 | PM8606_ID_SOUND, |
30 | PM8606_ID_CHARGER, |
31 | PM8606_ID_MAX, |
32 | }; |
33 | |
34 | |
35 | /* 8606 Registers */ |
36 | #define PM8606_DCM_BOOST (0x00) |
37 | #define PM8606_PWM (0x01) |
38 | |
39 | #define PM8607_MISC2 (0x42) |
40 | |
41 | /* Power Up Log Register */ |
42 | #define PM8607_POWER_UP_LOG (0x3F) |
43 | |
44 | /* Charger Control Registers */ |
45 | #define PM8607_CCNT (0x47) |
46 | #define PM8607_CHG_CTRL1 (0x48) |
47 | #define PM8607_CHG_CTRL2 (0x49) |
48 | #define PM8607_CHG_CTRL3 (0x4A) |
49 | #define PM8607_CHG_CTRL4 (0x4B) |
50 | #define PM8607_CHG_CTRL5 (0x4C) |
51 | #define PM8607_CHG_CTRL6 (0x4D) |
52 | #define PM8607_CHG_CTRL7 (0x4E) |
53 | |
54 | /* Backlight Registers */ |
55 | #define PM8606_WLED1A (0x02) |
56 | #define PM8606_WLED1B (0x03) |
57 | #define PM8606_WLED2A (0x04) |
58 | #define PM8606_WLED2B (0x05) |
59 | #define PM8606_WLED3A (0x06) |
60 | #define PM8606_WLED3B (0x07) |
61 | |
62 | /* LED Registers */ |
63 | #define PM8606_RGB2A (0x08) |
64 | #define PM8606_RGB2B (0x09) |
65 | #define PM8606_RGB2C (0x0A) |
66 | #define PM8606_RGB2D (0x0B) |
67 | #define PM8606_RGB1A (0x0C) |
68 | #define PM8606_RGB1B (0x0D) |
69 | #define PM8606_RGB1C (0x0E) |
70 | #define PM8606_RGB1D (0x0F) |
71 | |
72 | #define PM8606_PREREGULATORA (0x10) |
73 | #define PM8606_PREREGULATORB (0x11) |
74 | #define PM8606_VIBRATORA (0x12) |
75 | #define PM8606_VIBRATORB (0x13) |
76 | #define PM8606_VCHG (0x14) |
77 | #define PM8606_VSYS (0x15) |
78 | #define PM8606_MISC (0x16) |
79 | #define PM8606_CHIP_ID (0x17) |
80 | #define PM8606_STATUS (0x18) |
81 | #define PM8606_FLAGS (0x19) |
82 | #define PM8606_PROTECTA (0x1A) |
83 | #define PM8606_PROTECTB (0x1B) |
84 | #define PM8606_PROTECTC (0x1C) |
85 | |
86 | /* Bit definitions of PM8606 registers */ |
87 | #define PM8606_DCM_500MA (0x0) /* current limit */ |
88 | #define PM8606_DCM_750MA (0x1) |
89 | #define PM8606_DCM_1000MA (0x2) |
90 | #define PM8606_DCM_1250MA (0x3) |
91 | #define PM8606_DCM_250MV (0x0 << 2) |
92 | #define PM8606_DCM_300MV (0x1 << 2) |
93 | #define PM8606_DCM_350MV (0x2 << 2) |
94 | #define PM8606_DCM_400MV (0x3 << 2) |
95 | |
96 | #define PM8606_PWM_31200HZ (0x0) |
97 | #define PM8606_PWM_15600HZ (0x1) |
98 | #define PM8606_PWM_7800HZ (0x2) |
99 | #define PM8606_PWM_3900HZ (0x3) |
100 | #define PM8606_PWM_1950HZ (0x4) |
101 | #define PM8606_PWM_976HZ (0x5) |
102 | #define PM8606_PWM_488HZ (0x6) |
103 | #define PM8606_PWM_244HZ (0x7) |
104 | #define PM8606_PWM_FREQ_MASK (0x7) |
105 | |
106 | #define PM8606_WLED_ON (1 << 0) |
107 | #define PM8606_WLED_CURRENT(x) ((x & 0x1F) << 1) |
108 | |
109 | #define PM8606_LED_CURRENT(x) (((x >> 2) & 0x07) << 5) |
110 | |
111 | #define PM8606_VSYS_EN (1 << 1) |
112 | |
113 | #define PM8606_MISC_OSC_EN (1 << 4) |
114 | |
115 | enum { |
116 | PM8607_ID_BUCK1 = 0, |
117 | PM8607_ID_BUCK2, |
118 | PM8607_ID_BUCK3, |
119 | |
120 | PM8607_ID_LDO1, |
121 | PM8607_ID_LDO2, |
122 | PM8607_ID_LDO3, |
123 | PM8607_ID_LDO4, |
124 | PM8607_ID_LDO5, |
125 | PM8607_ID_LDO6, |
126 | PM8607_ID_LDO7, |
127 | PM8607_ID_LDO8, |
128 | PM8607_ID_LDO9, |
129 | PM8607_ID_LDO10, |
130 | PM8607_ID_LDO11, |
131 | PM8607_ID_LDO12, |
132 | PM8607_ID_LDO13, |
133 | PM8607_ID_LDO14, |
134 | PM8607_ID_LDO15, |
135 | PM8606_ID_PREG, |
136 | |
137 | PM8607_ID_RG_MAX, |
138 | }; |
139 | |
140 | /* 8607 chip ID is 0x40 or 0x50 */ |
141 | #define PM8607_VERSION_MASK (0xF0) /* 8607 chip ID mask */ |
142 | |
143 | /* Interrupt Registers */ |
144 | #define PM8607_STATUS_1 (0x01) |
145 | #define PM8607_STATUS_2 (0x02) |
146 | #define PM8607_INT_STATUS1 (0x03) |
147 | #define PM8607_INT_STATUS2 (0x04) |
148 | #define PM8607_INT_STATUS3 (0x05) |
149 | #define PM8607_INT_MASK_1 (0x06) |
150 | #define PM8607_INT_MASK_2 (0x07) |
151 | #define PM8607_INT_MASK_3 (0x08) |
152 | |
153 | /* Regulator Control Registers */ |
154 | #define PM8607_LDO1 (0x10) |
155 | #define PM8607_LDO2 (0x11) |
156 | #define PM8607_LDO3 (0x12) |
157 | #define PM8607_LDO4 (0x13) |
158 | #define PM8607_LDO5 (0x14) |
159 | #define PM8607_LDO6 (0x15) |
160 | #define PM8607_LDO7 (0x16) |
161 | #define PM8607_LDO8 (0x17) |
162 | #define PM8607_LDO9 (0x18) |
163 | #define PM8607_LDO10 (0x19) |
164 | #define PM8607_LDO12 (0x1A) |
165 | #define PM8607_LDO14 (0x1B) |
166 | #define PM8607_SLEEP_MODE1 (0x1C) |
167 | #define PM8607_SLEEP_MODE2 (0x1D) |
168 | #define PM8607_SLEEP_MODE3 (0x1E) |
169 | #define PM8607_SLEEP_MODE4 (0x1F) |
170 | #define PM8607_GO (0x20) |
171 | #define PM8607_SLEEP_BUCK1 (0x21) |
172 | #define PM8607_SLEEP_BUCK2 (0x22) |
173 | #define PM8607_SLEEP_BUCK3 (0x23) |
174 | #define PM8607_BUCK1 (0x24) |
175 | #define PM8607_BUCK2 (0x25) |
176 | #define PM8607_BUCK3 (0x26) |
177 | #define PM8607_BUCK_CONTROLS (0x27) |
178 | #define PM8607_SUPPLIES_EN11 (0x2B) |
179 | #define PM8607_SUPPLIES_EN12 (0x2C) |
180 | #define PM8607_GROUP1 (0x2D) |
181 | #define PM8607_GROUP2 (0x2E) |
182 | #define PM8607_GROUP3 (0x2F) |
183 | #define PM8607_GROUP4 (0x30) |
184 | #define PM8607_GROUP5 (0x31) |
185 | #define PM8607_GROUP6 (0x32) |
186 | #define PM8607_SUPPLIES_EN21 (0x33) |
187 | #define PM8607_SUPPLIES_EN22 (0x34) |
188 | |
189 | /* Vibrator Control Registers */ |
190 | #define PM8607_VIBRATOR_SET (0x28) |
191 | #define PM8607_VIBRATOR_PWM (0x29) |
192 | |
193 | /* GPADC Registers */ |
194 | #define PM8607_GP_BIAS1 (0x4F) |
195 | #define PM8607_MEAS_EN1 (0x50) |
196 | #define PM8607_MEAS_EN2 (0x51) |
197 | #define PM8607_MEAS_EN3 (0x52) |
198 | #define PM8607_MEAS_OFF_TIME1 (0x53) |
199 | #define PM8607_MEAS_OFF_TIME2 (0x54) |
200 | #define PM8607_TSI_PREBIAS (0x55) /* prebias time */ |
201 | #define PM8607_PD_PREBIAS (0x56) /* prebias time */ |
202 | #define PM8607_GPADC_MISC1 (0x57) |
203 | |
204 | /* bit definitions of MEAS_EN1*/ |
205 | #define PM8607_MEAS_EN1_VBAT (1 << 0) |
206 | #define PM8607_MEAS_EN1_VCHG (1 << 1) |
207 | #define PM8607_MEAS_EN1_VSYS (1 << 2) |
208 | #define PM8607_MEAS_EN1_TINT (1 << 3) |
209 | #define PM8607_MEAS_EN1_RFTMP (1 << 4) |
210 | #define PM8607_MEAS_EN1_TBAT (1 << 5) |
211 | #define PM8607_MEAS_EN1_GPADC2 (1 << 6) |
212 | #define PM8607_MEAS_EN1_GPADC3 (1 << 7) |
213 | |
214 | /* Battery Monitor Registers */ |
215 | #define PM8607_GP_BIAS2 (0x5A) |
216 | #define PM8607_VBAT_LOWTH (0x5B) |
217 | #define PM8607_VCHG_LOWTH (0x5C) |
218 | #define PM8607_VSYS_LOWTH (0x5D) |
219 | #define PM8607_TINT_LOWTH (0x5E) |
220 | #define PM8607_GPADC0_LOWTH (0x5F) |
221 | #define PM8607_GPADC1_LOWTH (0x60) |
222 | #define PM8607_GPADC2_LOWTH (0x61) |
223 | #define PM8607_GPADC3_LOWTH (0x62) |
224 | #define PM8607_VBAT_HIGHTH (0x63) |
225 | #define PM8607_VCHG_HIGHTH (0x64) |
226 | #define PM8607_VSYS_HIGHTH (0x65) |
227 | #define PM8607_TINT_HIGHTH (0x66) |
228 | #define PM8607_GPADC0_HIGHTH (0x67) |
229 | #define PM8607_GPADC1_HIGHTH (0x68) |
230 | #define PM8607_GPADC2_HIGHTH (0x69) |
231 | #define PM8607_GPADC3_HIGHTH (0x6A) |
232 | #define PM8607_IBAT_MEAS1 (0x6B) |
233 | #define PM8607_IBAT_MEAS2 (0x6C) |
234 | #define PM8607_VBAT_MEAS1 (0x6D) |
235 | #define PM8607_VBAT_MEAS2 (0x6E) |
236 | #define PM8607_VCHG_MEAS1 (0x6F) |
237 | #define PM8607_VCHG_MEAS2 (0x70) |
238 | #define PM8607_VSYS_MEAS1 (0x71) |
239 | #define PM8607_VSYS_MEAS2 (0x72) |
240 | #define PM8607_TINT_MEAS1 (0x73) |
241 | #define PM8607_TINT_MEAS2 (0x74) |
242 | #define PM8607_GPADC0_MEAS1 (0x75) |
243 | #define PM8607_GPADC0_MEAS2 (0x76) |
244 | #define PM8607_GPADC1_MEAS1 (0x77) |
245 | #define PM8607_GPADC1_MEAS2 (0x78) |
246 | #define PM8607_GPADC2_MEAS1 (0x79) |
247 | #define PM8607_GPADC2_MEAS2 (0x7A) |
248 | #define PM8607_GPADC3_MEAS1 (0x7B) |
249 | #define PM8607_GPADC3_MEAS2 (0x7C) |
250 | #define PM8607_CCNT_MEAS1 (0x95) |
251 | #define PM8607_CCNT_MEAS2 (0x96) |
252 | #define PM8607_VBAT_AVG (0x97) |
253 | #define PM8607_VCHG_AVG (0x98) |
254 | #define PM8607_VSYS_AVG (0x99) |
255 | #define PM8607_VBAT_MIN (0x9A) |
256 | #define PM8607_VCHG_MIN (0x9B) |
257 | #define PM8607_VSYS_MIN (0x9C) |
258 | #define PM8607_VBAT_MAX (0x9D) |
259 | #define PM8607_VCHG_MAX (0x9E) |
260 | #define PM8607_VSYS_MAX (0x9F) |
261 | |
262 | #define PM8607_GPADC_MISC2 (0x59) |
263 | #define PM8607_GPADC0_GP_BIAS_A0 (1 << 0) |
264 | #define PM8607_GPADC1_GP_BIAS_A1 (1 << 1) |
265 | #define PM8607_GPADC2_GP_BIAS_A2 (1 << 2) |
266 | #define PM8607_GPADC3_GP_BIAS_A3 (1 << 3) |
267 | #define PM8607_GPADC2_GP_BIAS_OUT2 (1 << 6) |
268 | |
269 | /* RTC Control Registers */ |
270 | #define PM8607_RTC1 (0xA0) |
271 | #define PM8607_RTC_COUNTER1 (0xA1) |
272 | #define PM8607_RTC_COUNTER2 (0xA2) |
273 | #define PM8607_RTC_COUNTER3 (0xA3) |
274 | #define PM8607_RTC_COUNTER4 (0xA4) |
275 | #define PM8607_RTC_EXPIRE1 (0xA5) |
276 | #define PM8607_RTC_EXPIRE2 (0xA6) |
277 | #define PM8607_RTC_EXPIRE3 (0xA7) |
278 | #define PM8607_RTC_EXPIRE4 (0xA8) |
279 | #define PM8607_RTC_TRIM1 (0xA9) |
280 | #define PM8607_RTC_TRIM2 (0xAA) |
281 | #define PM8607_RTC_TRIM3 (0xAB) |
282 | #define PM8607_RTC_TRIM4 (0xAC) |
283 | #define PM8607_RTC_MISC1 (0xAD) |
284 | #define PM8607_RTC_MISC2 (0xAE) |
285 | #define PM8607_RTC_MISC3 (0xAF) |
286 | |
287 | /* Misc Registers */ |
288 | #define PM8607_CHIP_ID (0x00) |
289 | #define PM8607_B0_MISC1 (0x0C) |
290 | #define PM8607_LDO1 (0x10) |
291 | #define PM8607_DVC3 (0x26) |
292 | #define PM8607_A1_MISC1 (0x40) |
293 | |
294 | /* bit definitions of Status Query Interface */ |
295 | #define PM8607_STATUS_CC (1 << 3) |
296 | #define PM8607_STATUS_PEN (1 << 4) |
297 | #define PM8607_STATUS_HEADSET (1 << 5) |
298 | #define PM8607_STATUS_HOOK (1 << 6) |
299 | #define PM8607_STATUS_MICIN (1 << 7) |
300 | #define PM8607_STATUS_ONKEY (1 << 8) |
301 | #define PM8607_STATUS_EXTON (1 << 9) |
302 | #define PM8607_STATUS_CHG (1 << 10) |
303 | #define PM8607_STATUS_BAT (1 << 11) |
304 | #define PM8607_STATUS_VBUS (1 << 12) |
305 | #define PM8607_STATUS_OV (1 << 13) |
306 | |
307 | /* bit definitions of BUCK3 */ |
308 | #define PM8607_BUCK3_DOUBLE (1 << 6) |
309 | |
310 | /* bit definitions of Misc1 */ |
311 | #define PM8607_A1_MISC1_PI2C (1 << 0) |
312 | #define PM8607_B0_MISC1_INV_INT (1 << 0) |
313 | #define PM8607_B0_MISC1_INT_CLEAR (1 << 1) |
314 | #define PM8607_B0_MISC1_INT_MASK (1 << 2) |
315 | #define PM8607_B0_MISC1_PI2C (1 << 3) |
316 | #define PM8607_B0_MISC1_RESET (1 << 6) |
317 | |
318 | /* bits definitions of GPADC */ |
319 | #define PM8607_GPADC_EN (1 << 0) |
320 | #define PM8607_GPADC_PREBIAS_MASK (3 << 1) |
321 | #define PM8607_GPADC_SLOT_CYCLE_MASK (3 << 3) /* slow mode */ |
322 | #define PM8607_GPADC_OFF_SCALE_MASK (3 << 5) /* GP sleep mode */ |
323 | #define PM8607_GPADC_SW_CAL_MASK (1 << 7) |
324 | |
325 | #define PM8607_PD_PREBIAS_MASK (0x1F << 0) |
326 | #define PM8607_PD_PRECHG_MASK (7 << 5) |
327 | |
328 | #define PM8606_REF_GP_OSC_OFF 0 |
329 | #define PM8606_REF_GP_OSC_ON 1 |
330 | #define PM8606_REF_GP_OSC_UNKNOWN 2 |
331 | |
332 | /* Clients of reference group and 8MHz oscillator in 88PM8606 */ |
333 | enum pm8606_ref_gp_and_osc_clients { |
334 | REF_GP_NO_CLIENTS = 0, |
335 | WLED1_DUTY = (1<<0), /*PF 0x02.7:0*/ |
336 | WLED2_DUTY = (1<<1), /*PF 0x04.7:0*/ |
337 | WLED3_DUTY = (1<<2), /*PF 0x06.7:0*/ |
338 | RGB1_ENABLE = (1<<3), /*PF 0x07.1*/ |
339 | RGB2_ENABLE = (1<<4), /*PF 0x07.2*/ |
340 | LDO_VBR_EN = (1<<5), /*PF 0x12.0*/ |
341 | REF_GP_MAX_CLIENT = 0xFFFF |
342 | }; |
343 | |
344 | /* Interrupt Number in 88PM8607 */ |
345 | enum { |
346 | PM8607_IRQ_ONKEY, |
347 | PM8607_IRQ_EXTON, |
348 | PM8607_IRQ_CHG, |
349 | PM8607_IRQ_BAT, |
350 | PM8607_IRQ_RTC, |
351 | PM8607_IRQ_CC, |
352 | PM8607_IRQ_VBAT, |
353 | PM8607_IRQ_VCHG, |
354 | PM8607_IRQ_VSYS, |
355 | PM8607_IRQ_TINT, |
356 | PM8607_IRQ_GPADC0, |
357 | PM8607_IRQ_GPADC1, |
358 | PM8607_IRQ_GPADC2, |
359 | PM8607_IRQ_GPADC3, |
360 | PM8607_IRQ_AUDIO_SHORT, |
361 | PM8607_IRQ_PEN, |
362 | PM8607_IRQ_HEADSET, |
363 | PM8607_IRQ_HOOK, |
364 | PM8607_IRQ_MICIN, |
365 | PM8607_IRQ_CHG_FAIL, |
366 | PM8607_IRQ_CHG_DONE, |
367 | PM8607_IRQ_CHG_FAULT, |
368 | }; |
369 | |
370 | enum { |
371 | PM8607_CHIP_A0 = 0x40, |
372 | PM8607_CHIP_A1 = 0x41, |
373 | PM8607_CHIP_B0 = 0x48, |
374 | }; |
375 | |
376 | struct pm860x_chip { |
377 | struct device *dev; |
378 | struct mutex irq_lock; |
379 | struct mutex osc_lock; |
380 | struct i2c_client *client; |
381 | struct i2c_client *companion; /* companion chip client */ |
382 | struct regmap *regmap; |
383 | struct regmap *regmap_companion; |
384 | |
385 | int buck3_double; /* DVC ramp slope double */ |
386 | int companion_addr; |
387 | unsigned short osc_vote; |
388 | int id; |
389 | int irq_mode; |
390 | int irq_base; |
391 | int core_irq; |
392 | unsigned char chip_version; |
393 | unsigned char osc_status; |
394 | |
395 | unsigned int wakeup_flag; |
396 | }; |
397 | |
398 | enum { |
399 | GI2C_PORT = 0, |
400 | PI2C_PORT, |
401 | }; |
402 | |
403 | struct pm860x_backlight_pdata { |
404 | int pwm; |
405 | int iset; |
406 | }; |
407 | |
408 | struct pm860x_led_pdata { |
409 | int iset; |
410 | }; |
411 | |
412 | struct pm860x_rtc_pdata { |
413 | int (*sync)(unsigned int ticks); |
414 | int vrtc; |
415 | }; |
416 | |
417 | struct pm860x_touch_pdata { |
418 | int gpadc_prebias; |
419 | int slot_cycle; |
420 | int off_scale; |
421 | int sw_cal; |
422 | int tsi_prebias; /* time, slot */ |
423 | int pen_prebias; /* time, slot */ |
424 | int pen_prechg; /* time, slot */ |
425 | int res_x; /* resistor of Xplate */ |
426 | unsigned long flags; |
427 | }; |
428 | |
429 | struct pm860x_power_pdata { |
430 | int max_capacity; |
431 | int resistor; |
432 | }; |
433 | |
434 | struct pm860x_platform_data { |
435 | struct pm860x_backlight_pdata *backlight; |
436 | struct pm860x_led_pdata *led; |
437 | struct pm860x_rtc_pdata *rtc; |
438 | struct pm860x_touch_pdata *touch; |
439 | struct pm860x_power_pdata *power; |
440 | struct regulator_init_data *buck1; |
441 | struct regulator_init_data *buck2; |
442 | struct regulator_init_data *buck3; |
443 | struct regulator_init_data *ldo1; |
444 | struct regulator_init_data *ldo2; |
445 | struct regulator_init_data *ldo3; |
446 | struct regulator_init_data *ldo4; |
447 | struct regulator_init_data *ldo5; |
448 | struct regulator_init_data *ldo6; |
449 | struct regulator_init_data *ldo7; |
450 | struct regulator_init_data *ldo8; |
451 | struct regulator_init_data *ldo9; |
452 | struct regulator_init_data *ldo10; |
453 | struct regulator_init_data *ldo12; |
454 | struct regulator_init_data *ldo_vibrator; |
455 | struct regulator_init_data *ldo14; |
456 | struct charger_desc *chg_desc; |
457 | |
458 | int companion_addr; /* I2C address of companion chip */ |
459 | int i2c_port; /* Controlled by GI2C or PI2C */ |
460 | int irq_mode; /* Clear interrupt by read/write(0/1) */ |
461 | int irq_base; /* IRQ base number of 88pm860x */ |
462 | int num_leds; |
463 | int num_backlights; |
464 | }; |
465 | |
466 | extern int pm8606_osc_enable(struct pm860x_chip *, unsigned short); |
467 | extern int pm8606_osc_disable(struct pm860x_chip *, unsigned short); |
468 | |
469 | extern int pm860x_reg_read(struct i2c_client *, int); |
470 | extern int pm860x_reg_write(struct i2c_client *, int, unsigned char); |
471 | extern int pm860x_bulk_read(struct i2c_client *, int, int, unsigned char *); |
472 | extern int pm860x_bulk_write(struct i2c_client *, int, int, unsigned char *); |
473 | extern int pm860x_set_bits(struct i2c_client *, int, unsigned char, |
474 | unsigned char); |
475 | extern int pm860x_page_reg_write(struct i2c_client *, int, unsigned char); |
476 | extern int pm860x_page_bulk_read(struct i2c_client *, int, int, |
477 | unsigned char *); |
478 | #endif /* __LINUX_MFD_88PM860X_H */ |
479 | |