1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2022 MediaTek Inc.
4 */
5
6#ifndef __MFD_MT6357_REGISTERS_H__
7#define __MFD_MT6357_REGISTERS_H__
8
9/* PMIC Registers */
10#define MT6357_TOP0_ID 0x0
11#define MT6357_TOP0_REV0 0x2
12#define MT6357_TOP0_DSN_DBI 0x4
13#define MT6357_TOP0_DSN_DXI 0x6
14#define MT6357_HWCID 0x8
15#define MT6357_SWCID 0xa
16#define MT6357_PONSTS 0xc
17#define MT6357_POFFSTS 0xe
18#define MT6357_PSTSCTL 0x10
19#define MT6357_PG_DEB_STS0 0x12
20#define MT6357_PG_SDN_STS0 0x14
21#define MT6357_OC_SDN_STS0 0x16
22#define MT6357_THERMALSTATUS 0x18
23#define MT6357_TOP_CON 0x1a
24#define MT6357_TEST_OUT 0x1c
25#define MT6357_TEST_CON0 0x1e
26#define MT6357_TEST_CON1 0x20
27#define MT6357_TESTMODE_SW 0x22
28#define MT6357_TOPSTATUS 0x24
29#define MT6357_TDSEL_CON 0x26
30#define MT6357_RDSEL_CON 0x28
31#define MT6357_SMT_CON0 0x2a
32#define MT6357_SMT_CON1 0x2c
33#define MT6357_TOP_RSV0 0x2e
34#define MT6357_TOP_RSV1 0x30
35#define MT6357_DRV_CON0 0x32
36#define MT6357_DRV_CON1 0x34
37#define MT6357_DRV_CON2 0x36
38#define MT6357_DRV_CON3 0x38
39#define MT6357_FILTER_CON0 0x3a
40#define MT6357_FILTER_CON1 0x3c
41#define MT6357_FILTER_CON2 0x3e
42#define MT6357_FILTER_CON3 0x40
43#define MT6357_TOP_STATUS 0x42
44#define MT6357_TOP_STATUS_SET 0x44
45#define MT6357_TOP_STATUS_CLR 0x46
46#define MT6357_TOP_TRAP 0x48
47#define MT6357_TOP1_ID 0x80
48#define MT6357_TOP1_REV0 0x82
49#define MT6357_TOP1_DSN_DBI 0x84
50#define MT6357_TOP1_DSN_DXI 0x86
51#define MT6357_GPIO_DIR0 0x88
52#define MT6357_GPIO_DIR0_SET 0x8a
53#define MT6357_GPIO_DIR0_CLR 0x8c
54#define MT6357_GPIO_PULLEN0 0x8e
55#define MT6357_GPIO_PULLEN0_SET 0x90
56#define MT6357_GPIO_PULLEN0_CLR 0x92
57#define MT6357_GPIO_PULLSEL0 0x94
58#define MT6357_GPIO_PULLSEL0_SET 0x96
59#define MT6357_GPIO_PULLSEL0_CLR 0x98
60#define MT6357_GPIO_DINV0 0x9a
61#define MT6357_GPIO_DINV0_SET 0x9c
62#define MT6357_GPIO_DINV0_CLR 0x9e
63#define MT6357_GPIO_DOUT0 0xa0
64#define MT6357_GPIO_DOUT0_SET 0xa2
65#define MT6357_GPIO_DOUT0_CLR 0xa4
66#define MT6357_GPIO_PI0 0xa6
67#define MT6357_GPIO_POE0 0xa8
68#define MT6357_GPIO_MODE0 0xaa
69#define MT6357_GPIO_MODE0_SET 0xac
70#define MT6357_GPIO_MODE0_CLR 0xae
71#define MT6357_GPIO_MODE1 0xb0
72#define MT6357_GPIO_MODE1_SET 0xb2
73#define MT6357_GPIO_MODE1_CLR 0xb4
74#define MT6357_GPIO_MODE2 0xb6
75#define MT6357_GPIO_MODE2_SET 0xb8
76#define MT6357_GPIO_MODE2_CLR 0xba
77#define MT6357_GPIO_MODE3 0xbc
78#define MT6357_GPIO_MODE3_SET 0xbe
79#define MT6357_GPIO_MODE3_CLR 0xc0
80#define MT6357_GPIO_RSV 0xc2
81#define MT6357_TOP2_ID 0x100
82#define MT6357_TOP2_REV0 0x102
83#define MT6357_TOP2_DSN_DBI 0x104
84#define MT6357_TOP2_DSN_DXI 0x106
85#define MT6357_TOP_PAM0 0x108
86#define MT6357_TOP_PAM1 0x10a
87#define MT6357_TOP_CKPDN_CON0 0x10c
88#define MT6357_TOP_CKPDN_CON0_SET 0x10e
89#define MT6357_TOP_CKPDN_CON0_CLR 0x110
90#define MT6357_TOP_CKPDN_CON1 0x112
91#define MT6357_TOP_CKPDN_CON1_SET 0x114
92#define MT6357_TOP_CKPDN_CON1_CLR 0x116
93#define MT6357_TOP_CKSEL_CON0 0x118
94#define MT6357_TOP_CKSEL_CON0_SET 0x11a
95#define MT6357_TOP_CKSEL_CON0_CLR 0x11c
96#define MT6357_TOP_CKSEL_CON1 0x11e
97#define MT6357_TOP_CKSEL_CON1_SET 0x120
98#define MT6357_TOP_CKSEL_CON1_CLR 0x122
99#define MT6357_TOP_CKDIVSEL_CON0 0x124
100#define MT6357_TOP_CKDIVSEL_CON0_SET 0x126
101#define MT6357_TOP_CKDIVSEL_CON0_CLR 0x128
102#define MT6357_TOP_CKHWEN_CON0 0x12a
103#define MT6357_TOP_CKHWEN_CON0_SET 0x12c
104#define MT6357_TOP_CKHWEN_CON0_CLR 0x12e
105#define MT6357_TOP_CKTST_CON0 0x130
106#define MT6357_TOP_CKTST_CON1 0x132
107#define MT6357_TOP_CLK_CON0 0x134
108#define MT6357_TOP_CLK_CON0_SET 0x136
109#define MT6357_TOP_CLK_CON0_CLR 0x138
110#define MT6357_TOP_DCM_CON0 0x13a
111#define MT6357_TOP_HANDOVER_DEBUG0 0x13c
112#define MT6357_TOP_RST_CON0 0x13e
113#define MT6357_TOP_RST_CON0_SET 0x140
114#define MT6357_TOP_RST_CON0_CLR 0x142
115#define MT6357_TOP_RST_CON1 0x144
116#define MT6357_TOP_RST_CON1_SET 0x146
117#define MT6357_TOP_RST_CON1_CLR 0x148
118#define MT6357_TOP_RST_CON2 0x14a
119#define MT6357_TOP_RST_MISC 0x14c
120#define MT6357_TOP_RST_MISC_SET 0x14e
121#define MT6357_TOP_RST_MISC_CLR 0x150
122#define MT6357_TOP_RST_STATUS 0x152
123#define MT6357_TOP_RST_STATUS_SET 0x154
124#define MT6357_TOP_RST_STATUS_CLR 0x156
125#define MT6357_TOP2_ELR_NUM 0x158
126#define MT6357_TOP2_ELR0 0x15a
127#define MT6357_TOP2_ELR1 0x15c
128#define MT6357_TOP3_ID 0x180
129#define MT6357_TOP3_REV0 0x182
130#define MT6357_TOP3_DSN_DBI 0x184
131#define MT6357_TOP3_DSN_DXI 0x186
132#define MT6357_MISC_TOP_INT_CON0 0x188
133#define MT6357_MISC_TOP_INT_CON0_SET 0x18a
134#define MT6357_MISC_TOP_INT_CON0_CLR 0x18c
135#define MT6357_MISC_TOP_INT_MASK_CON0 0x18e
136#define MT6357_MISC_TOP_INT_MASK_CON0_SET 0x190
137#define MT6357_MISC_TOP_INT_MASK_CON0_CLR 0x192
138#define MT6357_MISC_TOP_INT_STATUS0 0x194
139#define MT6357_MISC_TOP_INT_RAW_STATUS0 0x196
140#define MT6357_TOP_INT_MASK_CON0 0x198
141#define MT6357_TOP_INT_MASK_CON0_SET 0x19a
142#define MT6357_TOP_INT_MASK_CON0_CLR 0x19c
143#define MT6357_TOP_INT_STATUS0 0x19e
144#define MT6357_TOP_INT_RAW_STATUS0 0x1a0
145#define MT6357_TOP_INT_CON0 0x1a2
146#define MT6357_PLT0_ID 0x380
147#define MT6357_PLT0_REV0 0x382
148#define MT6357_PLT0_REV1 0x384
149#define MT6357_PLT0_DSN_DXI 0x386
150#define MT6357_FQMTR_CON0 0x388
151#define MT6357_FQMTR_CON1 0x38a
152#define MT6357_FQMTR_CON2 0x38c
153#define MT6357_TOP_CLK_TRIM 0x38e
154#define MT6357_OTP_CON0 0x390
155#define MT6357_OTP_CON1 0x392
156#define MT6357_OTP_CON2 0x394
157#define MT6357_OTP_CON3 0x396
158#define MT6357_OTP_CON4 0x398
159#define MT6357_OTP_CON5 0x39a
160#define MT6357_OTP_CON6 0x39c
161#define MT6357_OTP_CON7 0x39e
162#define MT6357_OTP_CON8 0x3a0
163#define MT6357_OTP_CON9 0x3a2
164#define MT6357_OTP_CON10 0x3a4
165#define MT6357_OTP_CON11 0x3a6
166#define MT6357_OTP_CON12 0x3a8
167#define MT6357_OTP_CON13 0x3aa
168#define MT6357_OTP_CON14 0x3ac
169#define MT6357_TOP_TMA_KEY 0x3ae
170#define MT6357_TOP_MDB_CONF0 0x3b0
171#define MT6357_TOP_MDB_CONF1 0x3b2
172#define MT6357_TOP_MDB_CONF2 0x3b4
173#define MT6357_PLT0_ELR_NUM 0x3b6
174#define MT6357_PLT0_ELR0 0x3b8
175#define MT6357_PLT0_ELR1 0x3ba
176#define MT6357_SPISLV_ID 0x400
177#define MT6357_SPISLV_REV0 0x402
178#define MT6357_SPISLV_REV1 0x404
179#define MT6357_SPISLV_DSN_DXI 0x406
180#define MT6357_RG_SPI_CON0 0x408
181#define MT6357_DEW_DIO_EN 0x40a
182#define MT6357_DEW_READ_TEST 0x40c
183#define MT6357_DEW_WRITE_TEST 0x40e
184#define MT6357_DEW_CRC_SWRST 0x410
185#define MT6357_DEW_CRC_EN 0x412
186#define MT6357_DEW_CRC_VAL 0x414
187#define MT6357_DEW_DBG_MON_SEL 0x416
188#define MT6357_DEW_CIPHER_KEY_SEL 0x418
189#define MT6357_DEW_CIPHER_IV_SEL 0x41a
190#define MT6357_DEW_CIPHER_EN 0x41c
191#define MT6357_DEW_CIPHER_RDY 0x41e
192#define MT6357_DEW_CIPHER_MODE 0x420
193#define MT6357_DEW_CIPHER_SWRST 0x422
194#define MT6357_DEW_RDDMY_NO 0x424
195#define MT6357_INT_TYPE_CON0 0x426
196#define MT6357_INT_TYPE_CON0_SET 0x428
197#define MT6357_INT_TYPE_CON0_CLR 0x42a
198#define MT6357_INT_STA 0x42c
199#define MT6357_RG_SPI_CON1 0x42e
200#define MT6357_RG_SPI_CON2 0x430
201#define MT6357_RG_SPI_CON3 0x432
202#define MT6357_RG_SPI_CON4 0x434
203#define MT6357_RG_SPI_CON5 0x436
204#define MT6357_RG_SPI_CON6 0x438
205#define MT6357_RG_SPI_CON7 0x43a
206#define MT6357_RG_SPI_CON8 0x43c
207#define MT6357_RG_SPI_CON9 0x43e
208#define MT6357_RG_SPI_CON10 0x440
209#define MT6357_RG_SPI_CON11 0x442
210#define MT6357_RG_SPI_CON12 0x444
211#define MT6357_RG_SPI_CON13 0x446
212#define MT6357_TOP_SPI_CON0 0x448
213#define MT6357_TOP_SPI_CON1 0x44a
214#define MT6357_SCK_TOP_DSN_ID 0x500
215#define MT6357_SCK_TOP_DSN_REV0 0x502
216#define MT6357_SCK_TOP_DBI 0x504
217#define MT6357_SCK_TOP_DXI 0x506
218#define MT6357_SCK_TOP_TPM0 0x508
219#define MT6357_SCK_TOP_TPM1 0x50a
220#define MT6357_SCK_TOP_CON0 0x50c
221#define MT6357_SCK_TOP_CON1 0x50e
222#define MT6357_SCK_TOP_TEST_OUT 0x510
223#define MT6357_SCK_TOP_TEST_CON0 0x512
224#define MT6357_SCK_TOP_CKPDN_CON0 0x514
225#define MT6357_SCK_TOP_CKPDN_CON0_SET 0x516
226#define MT6357_SCK_TOP_CKPDN_CON0_CLR 0x518
227#define MT6357_SCK_TOP_CKHWEN_CON0 0x51a
228#define MT6357_SCK_TOP_CKHWEN_CON0_SET 0x51c
229#define MT6357_SCK_TOP_CKHWEN_CON0_CLR 0x51e
230#define MT6357_SCK_TOP_CKTST_CON 0x520
231#define MT6357_SCK_TOP_RST_CON0 0x522
232#define MT6357_SCK_TOP_RST_CON0_SET 0x524
233#define MT6357_SCK_TOP_RST_CON0_CLR 0x526
234#define MT6357_SCK_TOP_INT_CON0 0x528
235#define MT6357_SCK_TOP_INT_CON0_SET 0x52a
236#define MT6357_SCK_TOP_INT_CON0_CLR 0x52c
237#define MT6357_SCK_TOP_INT_MASK_CON0 0x52e
238#define MT6357_SCK_TOP_INT_MASK_CON0_SET 0x530
239#define MT6357_SCK_TOP_INT_MASK_CON0_CLR 0x532
240#define MT6357_SCK_TOP_INT_STATUS0 0x534
241#define MT6357_SCK_TOP_INT_RAW_STATUS0 0x536
242#define MT6357_SCK_TOP_INT_MISC_CON 0x538
243#define MT6357_EOSC_CALI_CON0 0x53a
244#define MT6357_EOSC_CALI_CON1 0x53c
245#define MT6357_RTC_MIX_CON0 0x53e
246#define MT6357_RTC_MIX_CON1 0x540
247#define MT6357_RTC_MIX_CON2 0x542
248#define MT6357_RTC_DSN_ID 0x580
249#define MT6357_RTC_DSN_REV0 0x582
250#define MT6357_RTC_DBI 0x584
251#define MT6357_RTC_DXI 0x586
252#define MT6357_RTC_BBPU 0x588
253#define MT6357_RTC_IRQ_STA 0x58a
254#define MT6357_RTC_IRQ_EN 0x58c
255#define MT6357_RTC_CII_EN 0x58e
256#define MT6357_RTC_AL_MASK 0x590
257#define MT6357_RTC_TC_SEC 0x592
258#define MT6357_RTC_TC_MIN 0x594
259#define MT6357_RTC_TC_HOU 0x596
260#define MT6357_RTC_TC_DOM 0x598
261#define MT6357_RTC_TC_DOW 0x59a
262#define MT6357_RTC_TC_MTH 0x59c
263#define MT6357_RTC_TC_YEA 0x59e
264#define MT6357_RTC_AL_SEC 0x5a0
265#define MT6357_RTC_AL_MIN 0x5a2
266#define MT6357_RTC_AL_HOU 0x5a4
267#define MT6357_RTC_AL_DOM 0x5a6
268#define MT6357_RTC_AL_DOW 0x5a8
269#define MT6357_RTC_AL_MTH 0x5aa
270#define MT6357_RTC_AL_YEA 0x5ac
271#define MT6357_RTC_OSC32CON 0x5ae
272#define MT6357_RTC_POWERKEY1 0x5b0
273#define MT6357_RTC_POWERKEY2 0x5b2
274#define MT6357_RTC_PDN1 0x5b4
275#define MT6357_RTC_PDN2 0x5b6
276#define MT6357_RTC_SPAR0 0x5b8
277#define MT6357_RTC_SPAR1 0x5ba
278#define MT6357_RTC_PROT 0x5bc
279#define MT6357_RTC_DIFF 0x5be
280#define MT6357_RTC_CALI 0x5c0
281#define MT6357_RTC_WRTGR 0x5c2
282#define MT6357_RTC_CON 0x5c4
283#define MT6357_RTC_SEC_CTRL 0x5c6
284#define MT6357_RTC_INT_CNT 0x5c8
285#define MT6357_RTC_SEC_DAT0 0x5ca
286#define MT6357_RTC_SEC_DAT1 0x5cc
287#define MT6357_RTC_SEC_DAT2 0x5ce
288#define MT6357_RTC_SEC_DSN_ID 0x600
289#define MT6357_RTC_SEC_DSN_REV0 0x602
290#define MT6357_RTC_SEC_DBI 0x604
291#define MT6357_RTC_SEC_DXI 0x606
292#define MT6357_RTC_TC_SEC_SEC 0x608
293#define MT6357_RTC_TC_MIN_SEC 0x60a
294#define MT6357_RTC_TC_HOU_SEC 0x60c
295#define MT6357_RTC_TC_DOM_SEC 0x60e
296#define MT6357_RTC_TC_DOW_SEC 0x610
297#define MT6357_RTC_TC_MTH_SEC 0x612
298#define MT6357_RTC_TC_YEA_SEC 0x614
299#define MT6357_RTC_SEC_CK_PDN 0x616
300#define MT6357_RTC_SEC_WRTGR 0x618
301#define MT6357_DCXO_DSN_ID 0x780
302#define MT6357_DCXO_DSN_REV0 0x782
303#define MT6357_DCXO_DSN_DBI 0x784
304#define MT6357_DCXO_DSN_DXI 0x786
305#define MT6357_DCXO_CW00 0x788
306#define MT6357_DCXO_CW00_SET 0x78a
307#define MT6357_DCXO_CW00_CLR 0x78c
308#define MT6357_DCXO_CW01 0x78e
309#define MT6357_DCXO_CW02 0x790
310#define MT6357_DCXO_CW03 0x792
311#define MT6357_DCXO_CW04 0x794
312#define MT6357_DCXO_CW05 0x796
313#define MT6357_DCXO_CW06 0x798
314#define MT6357_DCXO_CW07 0x79a
315#define MT6357_DCXO_CW08 0x79c
316#define MT6357_DCXO_CW09 0x79e
317#define MT6357_DCXO_CW10 0x7a0
318#define MT6357_DCXO_CW11 0x7a2
319#define MT6357_DCXO_CW11_SET 0x7a4
320#define MT6357_DCXO_CW11_CLR 0x7a6
321#define MT6357_DCXO_CW12 0x7a8
322#define MT6357_DCXO_CW13 0x7aa
323#define MT6357_DCXO_CW14 0x7ac
324#define MT6357_DCXO_CW15 0x7ae
325#define MT6357_DCXO_CW16 0x7b0
326#define MT6357_DCXO_CW17 0x7b2
327#define MT6357_DCXO_CW18 0x7b4
328#define MT6357_DCXO_CW19 0x7b6
329#define MT6357_DCXO_CW20 0x7b8
330#define MT6357_DCXO_CW21 0x7ba
331#define MT6357_DCXO_CW22 0x7bc
332#define MT6357_DCXO_ELR_NUM 0x7be
333#define MT6357_DCXO_ELR0 0x7c0
334#define MT6357_PSC_TOP_ID 0x900
335#define MT6357_PSC_TOP_REV0 0x902
336#define MT6357_PSC_TOP_DBI 0x904
337#define MT6357_PSC_TOP_DXI 0x906
338#define MT6357_PSC_TPM0 0x908
339#define MT6357_PSC_TPM1 0x90a
340#define MT6357_PSC_TOP_RSTCTL_0 0x90c
341#define MT6357_PSC_TOP_INT_CON0 0x90e
342#define MT6357_PSC_TOP_INT_CON0_SET 0x910
343#define MT6357_PSC_TOP_INT_CON0_CLR 0x912
344#define MT6357_PSC_TOP_INT_MASK_CON0 0x914
345#define MT6357_PSC_TOP_INT_MASK_CON0_SET 0x916
346#define MT6357_PSC_TOP_INT_MASK_CON0_CLR 0x918
347#define MT6357_PSC_TOP_INT_STATUS0 0x91a
348#define MT6357_PSC_TOP_INT_RAW_STATUS0 0x91c
349#define MT6357_PSC_TOP_INT_MISC_CON 0x91e
350#define MT6357_PSC_TOP_INT_MISC_CON_SET 0x920
351#define MT6357_PSC_TOP_INT_MISC_CON_CLR 0x922
352#define MT6357_PSC_TOP_MON_CTL 0x924
353#define MT6357_STRUP_ID 0x980
354#define MT6357_STRUP_REV0 0x982
355#define MT6357_STRUP_DBI 0x984
356#define MT6357_STRUP_DXI 0x986
357#define MT6357_STRUP_ANA_CON0 0x988
358#define MT6357_STRUP_ANA_CON1 0x98a
359#define MT6357_STRUP_ANA_CON2 0x98c
360#define MT6357_STRUP_ELR_NUM 0x98e
361#define MT6357_STRUP_ELR_0 0x990
362#define MT6357_PSEQ_ID 0xa00
363#define MT6357_PSEQ_REV0 0xa02
364#define MT6357_PSEQ_DBI 0xa04
365#define MT6357_PSEQ_DXI 0xa06
366#define MT6357_PPCCTL0 0xa08
367#define MT6357_PPCCTL1 0xa0a
368#define MT6357_PPCCTL2 0xa0c
369#define MT6357_PPCCFG0 0xa0e
370#define MT6357_PPCTST0 0xa10
371#define MT6357_PORFLAG 0xa12
372#define MT6357_STRUP_CON0 0xa14
373#define MT6357_STRUP_CON1 0xa16
374#define MT6357_STRUP_CON2 0xa18
375#define MT6357_STRUP_CON3 0xa1a
376#define MT6357_STRUP_CON4 0xa1c
377#define MT6357_STRUP_CON5 0xa1e
378#define MT6357_STRUP_CON6 0xa20
379#define MT6357_STRUP_CON7 0xa22
380#define MT6357_CPSCFG0 0xa24
381#define MT6357_STRUP_CON9 0xa26
382#define MT6357_STRUP_CON10 0xa28
383#define MT6357_STRUP_CON11 0xa2a
384#define MT6357_STRUP_CON12 0xa2c
385#define MT6357_STRUP_CON13 0xa2e
386#define MT6357_STRUP_CON14 0xa30
387#define MT6357_STRUP_CON15 0xa32
388#define MT6357_STRUP_CON16 0xa34
389#define MT6357_STRUP_CON19 0xa36
390#define MT6357_PSEQ_ELR_NUM 0xa38
391#define MT6357_PSEQ_ELR7 0xa3a
392#define MT6357_PSEQ_ELR8 0xa3c
393#define MT6357_PCHR_DIG_DSN_ID 0xa80
394#define MT6357_PCHR_DIG_DSN_REV0 0xa82
395#define MT6357_PCHR_DIG_DSN_DBI 0xa84
396#define MT6357_PCHR_DIG_DSN_DXI 0xa86
397#define MT6357_CHR_TOP_CON0 0xa88
398#define MT6357_CHR_TOP_CON1 0xa8a
399#define MT6357_CHR_TOP_CON2 0xa8c
400#define MT6357_CHR_TOP_CON3 0xa8e
401#define MT6357_CHR_TOP_CON4 0xa90
402#define MT6357_CHR_TOP_CON5 0xa92
403#define MT6357_CHR_TOP_CON6 0xa94
404#define MT6357_PCHR_DIG_ELR_NUM 0xa96
405#define MT6357_PCHR_ELR0 0xa98
406#define MT6357_PCHR_ELR1 0xa9a
407#define MT6357_PCHR_MACRO_DSN_ID 0xb80
408#define MT6357_PCHR_MACRO_DSN_REV0 0xb82
409#define MT6357_PCHR_MACRO_DSN_DBI 0xb84
410#define MT6357_PCHR_MACRO_DSN_DXI 0xb86
411#define MT6357_CHR_CON0 0xb88
412#define MT6357_CHR_CON1 0xb8a
413#define MT6357_CHR_CON2 0xb8c
414#define MT6357_CHR_CON3 0xb8e
415#define MT6357_CHR_CON4 0xb90
416#define MT6357_CHR_CON5 0xb92
417#define MT6357_CHR_CON6 0xb94
418#define MT6357_CHR_CON7 0xb96
419#define MT6357_CHR_CON8 0xb98
420#define MT6357_CHR_CON9 0xb9a
421#define MT6357_BM_TOP_DSN_ID 0xc00
422#define MT6357_BM_TOP_DSN_REV0 0xc02
423#define MT6357_BM_TOP_DBI 0xc04
424#define MT6357_BM_TOP_DXI 0xc06
425#define MT6357_BM_TPM0 0xc08
426#define MT6357_BM_TPM1 0xc0a
427#define MT6357_BM_TOP_CKPDN_CON0 0xc0c
428#define MT6357_BM_TOP_CKPDN_CON0_SET 0xc0e
429#define MT6357_BM_TOP_CKPDN_CON0_CLR 0xc10
430#define MT6357_BM_TOP_CKSEL_CON0 0xc12
431#define MT6357_BM_TOP_CKSEL_CON0_SET 0xc14
432#define MT6357_BM_TOP_CKSEL_CON0_CLR 0xc16
433#define MT6357_BM_TOP_CKTST_CON0 0xc18
434#define MT6357_BM_TOP_RST_CON0 0xc1a
435#define MT6357_BM_TOP_RST_CON0_SET 0xc1c
436#define MT6357_BM_TOP_RST_CON0_CLR 0xc1e
437#define MT6357_BM_TOP_INT_CON0 0xc20
438#define MT6357_BM_TOP_INT_CON0_SET 0xc22
439#define MT6357_BM_TOP_INT_CON0_CLR 0xc24
440#define MT6357_BM_TOP_INT_CON1 0xc26
441#define MT6357_BM_TOP_INT_CON1_SET 0xc28
442#define MT6357_BM_TOP_INT_CON1_CLR 0xc2a
443#define MT6357_BM_TOP_INT_MASK_CON0 0xc2c
444#define MT6357_BM_TOP_INT_MASK_CON0_SET 0xc2e
445#define MT6357_BM_TOP_INT_MASK_CON0_CLR 0xc30
446#define MT6357_BM_TOP_INT_MASK_CON1 0xc32
447#define MT6357_BM_TOP_INT_MASK_CON1_SET 0xc34
448#define MT6357_BM_TOP_INT_MASK_CON1_CLR 0xc36
449#define MT6357_BM_TOP_INT_STATUS0 0xc38
450#define MT6357_BM_TOP_INT_STATUS1 0xc3a
451#define MT6357_BM_TOP_INT_RAW_STATUS0 0xc3c
452#define MT6357_BM_TOP_INT_RAW_STATUS1 0xc3e
453#define MT6357_BM_TOP_INT_MISC_CON 0xc40
454#define MT6357_BM_TOP_DBG_CON 0xc42
455#define MT6357_BM_TOP_RSV0 0xc44
456#define MT6357_FGADC_ANA_DSN_ID 0xc80
457#define MT6357_FGADC_ANA_DSN_REV0 0xc82
458#define MT6357_FGADC_ANA_DSN_DBI 0xc84
459#define MT6357_FGADC_ANA_DSN_DXI 0xc86
460#define MT6357_FGADC_ANA_CON0 0xc88
461#define MT6357_FGADC_ANA_TEST_CON0 0xc8a
462#define MT6357_FGADC_ANA_ELR_NUM 0xc8c
463#define MT6357_FGADC_ANA_ELR0 0xc8e
464#define MT6357_FGADC_ANA_ELR1 0xc90
465#define MT6357_FGADC0_DSN_ID 0xd00
466#define MT6357_FGADC0_DSN_REV0 0xd02
467#define MT6357_FGADC0_DSN_DBI 0xd04
468#define MT6357_FGADC0_DSN_DXI 0xd06
469#define MT6357_FGADC_CON0 0xd08
470#define MT6357_FGADC_CON1 0xd0a
471#define MT6357_FGADC_CON2 0xd0c
472#define MT6357_FGADC_CON3 0xd0e
473#define MT6357_FGADC_CON4 0xd10
474#define MT6357_FGADC_CAR_CON0 0xd12
475#define MT6357_FGADC_CAR_CON1 0xd14
476#define MT6357_FGADC_CAR_CON2 0xd16
477#define MT6357_FGADC_CARTH_CON0 0xd18
478#define MT6357_FGADC_CARTH_CON1 0xd1a
479#define MT6357_FGADC_CARTH_CON2 0xd1c
480#define MT6357_FGADC_CARTH_CON3 0xd1e
481#define MT6357_FGADC_NTER_CON0 0xd20
482#define MT6357_FGADC_NTER_CON1 0xd22
483#define MT6357_FGADC_NTER_CON2 0xd24
484#define MT6357_FGADC_SON_CON0 0xd26
485#define MT6357_FGADC_SON_CON1 0xd28
486#define MT6357_FGADC_SON_CON2 0xd2a
487#define MT6357_FGADC_SON_CON3 0xd2c
488#define MT6357_FGADC_ZCV_CON0 0xd2e
489#define MT6357_FGADC_ZCV_CON1 0xd30
490#define MT6357_FGADC_ZCV_CON2 0xd32
491#define MT6357_FGADC_ZCV_CON3 0xd34
492#define MT6357_FGADC_ZCV_CON4 0xd36
493#define MT6357_FGADC_ZCVTH_CON0 0xd38
494#define MT6357_FGADC_ZCVTH_CON1 0xd3a
495#define MT6357_FGADC_ZCVTH_CON2 0xd3c
496#define MT6357_FGADC1_DSN_ID 0xd80
497#define MT6357_FGADC1_DSN_REV0 0xd82
498#define MT6357_FGADC1_DSN_DBI 0xd84
499#define MT6357_FGADC1_DSN_DXI 0xd86
500#define MT6357_FGADC_R_CON0 0xd88
501#define MT6357_FGADC_CUR_CON0 0xd8a
502#define MT6357_FGADC_CUR_CON1 0xd8c
503#define MT6357_FGADC_CUR_CON2 0xd8e
504#define MT6357_FGADC_CUR_CON3 0xd90
505#define MT6357_FGADC_OFFSET_CON0 0xd92
506#define MT6357_FGADC_OFFSET_CON1 0xd94
507#define MT6357_FGADC_GAIN_CON0 0xd96
508#define MT6357_FGADC_TEST_CON0 0xd98
509#define MT6357_SYSTEM_INFO_CON0 0xd9a
510#define MT6357_SYSTEM_INFO_CON1 0xd9c
511#define MT6357_SYSTEM_INFO_CON2 0xd9e
512#define MT6357_SYSTEM_INFO_CON3 0xda0
513#define MT6357_SYSTEM_INFO_CON4 0xda2
514#define MT6357_BATON_ANA_DSN_ID 0xe00
515#define MT6357_BATON_ANA_DSN_REV0 0xe02
516#define MT6357_BATON_ANA_DSN_DBI 0xe04
517#define MT6357_BATON_ANA_DSN_DXI 0xe06
518#define MT6357_BATON_ANA_CON0 0xe08
519#define MT6357_BATON_ANA_ELR_NUM 0xe0a
520#define MT6357_BATON_ANA_ELR0 0xe0c
521#define MT6357_HK_TOP_ID 0xf80
522#define MT6357_HK_TOP_REV0 0xf82
523#define MT6357_HK_TOP_DBI 0xf84
524#define MT6357_HK_TOP_DXI 0xf86
525#define MT6357_HK_TPM0 0xf88
526#define MT6357_HK_TPM1 0xf8a
527#define MT6357_HK_TOP_CLK_CON0 0xf8c
528#define MT6357_HK_TOP_CLK_CON1 0xf8e
529#define MT6357_HK_TOP_RST_CON0 0xf90
530#define MT6357_HK_TOP_INT_CON0 0xf92
531#define MT6357_HK_TOP_INT_CON0_SET 0xf94
532#define MT6357_HK_TOP_INT_CON0_CLR 0xf96
533#define MT6357_HK_TOP_INT_MASK_CON0 0xf98
534#define MT6357_HK_TOP_INT_MASK_CON0_SET 0xf9a
535#define MT6357_HK_TOP_INT_MASK_CON0_CLR 0xf9c
536#define MT6357_HK_TOP_INT_STATUS0 0xf9e
537#define MT6357_HK_TOP_INT_RAW_STATUS0 0xfa0
538#define MT6357_HK_TOP_MON_CON0 0xfa2
539#define MT6357_HK_TOP_MON_CON1 0xfa4
540#define MT6357_HK_TOP_MON_CON2 0xfa6
541#define MT6357_AUXADC_DSN_ID 0x1000
542#define MT6357_AUXADC_DSN_REV0 0x1002
543#define MT6357_AUXADC_DSN_DBI 0x1004
544#define MT6357_AUXADC_DSN_DXI 0x1006
545#define MT6357_AUXADC_ANA_CON0 0x1008
546#define MT6357_AUXADC_DIG_1_DSN_ID 0x1080
547#define MT6357_AUXADC_DIG_1_DSN_REV0 0x1082
548#define MT6357_AUXADC_DIG_1_DSN_DBI 0x1084
549#define MT6357_AUXADC_DIG_1_DSN_DXI 0x1086
550#define MT6357_AUXADC_ADC0 0x1088
551#define MT6357_AUXADC_ADC1 0x108a
552#define MT6357_AUXADC_ADC2 0x108c
553#define MT6357_AUXADC_ADC3 0x108e
554#define MT6357_AUXADC_ADC4 0x1090
555#define MT6357_AUXADC_ADC5 0x1092
556#define MT6357_AUXADC_ADC6 0x1094
557#define MT6357_AUXADC_ADC7 0x1096
558#define MT6357_AUXADC_ADC8 0x1098
559#define MT6357_AUXADC_ADC9 0x109a
560#define MT6357_AUXADC_ADC10 0x109c
561#define MT6357_AUXADC_ADC11 0x109e
562#define MT6357_AUXADC_ADC12 0x10a0
563#define MT6357_AUXADC_ADC14 0x10a2
564#define MT6357_AUXADC_ADC16 0x10a4
565#define MT6357_AUXADC_ADC17 0x10a6
566#define MT6357_AUXADC_ADC18 0x10a8
567#define MT6357_AUXADC_ADC19 0x10aa
568#define MT6357_AUXADC_ADC20 0x10ac
569#define MT6357_AUXADC_ADC21 0x10ae
570#define MT6357_AUXADC_ADC22 0x10b0
571#define MT6357_AUXADC_ADC23 0x10b2
572#define MT6357_AUXADC_ADC24 0x10b4
573#define MT6357_AUXADC_ADC25 0x10b6
574#define MT6357_AUXADC_ADC26 0x10b8
575#define MT6357_AUXADC_ADC27 0x10ba
576#define MT6357_AUXADC_ADC29 0x10bc
577#define MT6357_AUXADC_ADC30 0x10be
578#define MT6357_AUXADC_ADC31 0x10c0
579#define MT6357_AUXADC_ADC32 0x10c2
580#define MT6357_AUXADC_ADC33 0x10c4
581#define MT6357_AUXADC_ADC34 0x10c6
582#define MT6357_AUXADC_ADC35 0x10c8
583#define MT6357_AUXADC_ADC36 0x10ca
584#define MT6357_AUXADC_ADC38 0x10cc
585#define MT6357_AUXADC_ADC39 0x10ce
586#define MT6357_AUXADC_ADC40 0x10d0
587#define MT6357_AUXADC_ADC41 0x10d2
588#define MT6357_AUXADC_ADC42 0x10d4
589#define MT6357_AUXADC_ADC43 0x10d6
590#define MT6357_AUXADC_ADC46 0x10d8
591#define MT6357_AUXADC_ADC47 0x10da
592#define MT6357_AUXADC_DIG_1_ELR_NUM 0x10dc
593#define MT6357_AUXADC_DIG_1_ELR0 0x10de
594#define MT6357_AUXADC_DIG_1_ELR1 0x10e0
595#define MT6357_AUXADC_DIG_2_DSN_ID 0x1100
596#define MT6357_AUXADC_DIG_2_DSN_REV0 0x1102
597#define MT6357_AUXADC_DIG_2_DSN_DBI 0x1104
598#define MT6357_AUXADC_DIG_2_DSN_DXI 0x1106
599#define MT6357_AUXADC_STA0 0x1108
600#define MT6357_AUXADC_STA1 0x110a
601#define MT6357_AUXADC_STA2 0x110c
602#define MT6357_AUXADC_RQST0 0x110e
603#define MT6357_AUXADC_RQST0_SET 0x1110
604#define MT6357_AUXADC_RQST0_CLR 0x1112
605#define MT6357_AUXADC_RQST2 0x1114
606#define MT6357_AUXADC_RQST2_SET 0x1116
607#define MT6357_AUXADC_RQST2_CLR 0x1118
608#define MT6357_AUXADC_RQST1 0x111a
609#define MT6357_AUXADC_RQST1_SET 0x111c
610#define MT6357_AUXADC_RQST1_CLR 0x111e
611#define MT6357_AUXADC_CON0 0x1120
612#define MT6357_AUXADC_CON0_SET 0x1122
613#define MT6357_AUXADC_CON0_CLR 0x1124
614#define MT6357_AUXADC_CON1 0x1126
615#define MT6357_AUXADC_CON2 0x1128
616#define MT6357_AUXADC_CON3 0x112a
617#define MT6357_AUXADC_CON4 0x112c
618#define MT6357_AUXADC_CON5 0x112e
619#define MT6357_AUXADC_CON6 0x1130
620#define MT6357_AUXADC_CON7 0x1132
621#define MT6357_AUXADC_CON8 0x1134
622#define MT6357_AUXADC_CON9 0x1136
623#define MT6357_AUXADC_CON10 0x1138
624#define MT6357_AUXADC_CON11 0x113a
625#define MT6357_AUXADC_CON12 0x113c
626#define MT6357_AUXADC_CON13 0x113e
627#define MT6357_AUXADC_CON14 0x1140
628#define MT6357_AUXADC_CON15 0x1142
629#define MT6357_AUXADC_CON16 0x1144
630#define MT6357_AUXADC_CON17 0x1146
631#define MT6357_AUXADC_CON18 0x1148
632#define MT6357_AUXADC_CON19 0x114a
633#define MT6357_AUXADC_CON20 0x114c
634#define MT6357_AUXADC_DIG_3_DSN_ID 0x1180
635#define MT6357_AUXADC_DIG_3_DSN_REV0 0x1182
636#define MT6357_AUXADC_DIG_3_DSN_DBI 0x1184
637#define MT6357_AUXADC_DIG_3_DSN_DXI 0x1186
638#define MT6357_AUXADC_AUTORPT0 0x1188
639#define MT6357_AUXADC_LBAT0 0x118a
640#define MT6357_AUXADC_LBAT1 0x118c
641#define MT6357_AUXADC_LBAT2 0x118e
642#define MT6357_AUXADC_LBAT3 0x1190
643#define MT6357_AUXADC_LBAT4 0x1192
644#define MT6357_AUXADC_LBAT5 0x1194
645#define MT6357_AUXADC_LBAT6 0x1196
646#define MT6357_AUXADC_ACCDET 0x1198
647#define MT6357_AUXADC_DBG0 0x119a
648#define MT6357_AUXADC_IMP0 0x119c
649#define MT6357_AUXADC_IMP1 0x119e
650#define MT6357_AUXADC_DIG_3_ELR_NUM 0x11a0
651#define MT6357_AUXADC_DIG_3_ELR0 0x11a2
652#define MT6357_AUXADC_DIG_3_ELR1 0x11a4
653#define MT6357_AUXADC_DIG_3_ELR2 0x11a6
654#define MT6357_AUXADC_DIG_3_ELR3 0x11a8
655#define MT6357_AUXADC_DIG_3_ELR4 0x11aa
656#define MT6357_AUXADC_DIG_3_ELR5 0x11ac
657#define MT6357_AUXADC_DIG_3_ELR6 0x11ae
658#define MT6357_AUXADC_DIG_3_ELR7 0x11b0
659#define MT6357_AUXADC_DIG_3_ELR8 0x11b2
660#define MT6357_AUXADC_DIG_3_ELR9 0x11b4
661#define MT6357_AUXADC_DIG_3_ELR10 0x11b6
662#define MT6357_AUXADC_DIG_3_ELR11 0x11b8
663#define MT6357_AUXADC_DIG_4_DSN_ID 0x1200
664#define MT6357_AUXADC_DIG_4_DSN_REV0 0x1202
665#define MT6357_AUXADC_DIG_4_DSN_DBI 0x1204
666#define MT6357_AUXADC_DIG_4_DSN_DXI 0x1206
667#define MT6357_AUXADC_MDRT_0 0x1208
668#define MT6357_AUXADC_MDRT_1 0x120a
669#define MT6357_AUXADC_MDRT_2 0x120c
670#define MT6357_AUXADC_MDRT_3 0x120e
671#define MT6357_AUXADC_MDRT_4 0x1210
672#define MT6357_AUXADC_DCXO_MDRT_0 0x1212
673#define MT6357_AUXADC_DCXO_MDRT_1 0x1214
674#define MT6357_AUXADC_DCXO_MDRT_2 0x1216
675#define MT6357_AUXADC_NAG_0 0x1218
676#define MT6357_AUXADC_NAG_1 0x121a
677#define MT6357_AUXADC_NAG_2 0x121c
678#define MT6357_AUXADC_NAG_3 0x121e
679#define MT6357_AUXADC_NAG_4 0x1220
680#define MT6357_AUXADC_NAG_5 0x1222
681#define MT6357_AUXADC_NAG_6 0x1224
682#define MT6357_AUXADC_NAG_7 0x1226
683#define MT6357_AUXADC_NAG_8 0x1228
684#define MT6357_AUXADC_RSV_1 0x122a
685#define MT6357_AUXADC_ANA_0 0x122c
686#define MT6357_AUXADC_IMP_CG0 0x122e
687#define MT6357_AUXADC_LBAT_CG0 0x1230
688#define MT6357_AUXADC_NAG_CG0 0x1232
689#define MT6357_AUXADC_PRI_NEW 0x1234
690#define MT6357_AUXADC_CHR_TOP_CON2 0x1236
691#define MT6357_BUCK_TOP_DSN_ID 0x1400
692#define MT6357_BUCK_TOP_DSN_REV0 0x1402
693#define MT6357_BUCK_TOP_DBI 0x1404
694#define MT6357_BUCK_TOP_DXI 0x1406
695#define MT6357_BUCK_TOP_PAM0 0x1408
696#define MT6357_BUCK_TOP_PAM1 0x140a
697#define MT6357_BUCK_TOP_CLK_CON0 0x140c
698#define MT6357_BUCK_TOP_CLK_CON0_SET 0x140e
699#define MT6357_BUCK_TOP_CLK_CON0_CLR 0x1410
700#define MT6357_BUCK_TOP_CLK_HWEN_CON0 0x1412
701#define MT6357_BUCK_TOP_CLK_HWEN_CON0_SET 0x1414
702#define MT6357_BUCK_TOP_CLK_HWEN_CON0_CLR 0x1416
703#define MT6357_BUCK_TOP_CLK_MISC_CON0 0x1418
704#define MT6357_BUCK_TOP_INT_CON0 0x141a
705#define MT6357_BUCK_TOP_INT_CON0_SET 0x141c
706#define MT6357_BUCK_TOP_INT_CON0_CLR 0x141e
707#define MT6357_BUCK_TOP_INT_MASK_CON0 0x1420
708#define MT6357_BUCK_TOP_INT_MASK_CON0_SET 0x1422
709#define MT6357_BUCK_TOP_INT_MASK_CON0_CLR 0x1424
710#define MT6357_BUCK_TOP_INT_STATUS0 0x1426
711#define MT6357_BUCK_TOP_INT_RAW_STATUS0 0x1428
712#define MT6357_BUCK_TOP_STB_CON 0x142a
713#define MT6357_BUCK_TOP_SLP_CON0 0x142c
714#define MT6357_BUCK_TOP_SLP_CON1 0x142e
715#define MT6357_BUCK_TOP_SLP_CON2 0x1430
716#define MT6357_BUCK_TOP_MINFREQ_CON 0x1432
717#define MT6357_BUCK_TOP_OC_CON0 0x1434
718#define MT6357_BUCK_TOP_K_CON0 0x1436
719#define MT6357_BUCK_TOP_K_CON1 0x1438
720#define MT6357_BUCK_TOP_K_CON2 0x143a
721#define MT6357_BUCK_TOP_WDTDBG0 0x143c
722#define MT6357_BUCK_TOP_WDTDBG1 0x143e
723#define MT6357_BUCK_TOP_WDTDBG2 0x1440
724#define MT6357_BUCK_TOP_ELR_NUM 0x1442
725#define MT6357_BUCK_TOP_ELR0 0x1444
726#define MT6357_BUCK_TOP_ELR1 0x1446
727#define MT6357_BUCK_VPROC_DSN_ID 0x1480
728#define MT6357_BUCK_VPROC_DSN_REV0 0x1482
729#define MT6357_BUCK_VPROC_DSN_DBI 0x1484
730#define MT6357_BUCK_VPROC_DSN_DXI 0x1486
731#define MT6357_BUCK_VPROC_CON0 0x1488
732#define MT6357_BUCK_VPROC_CON1 0x148a
733#define MT6357_BUCK_VPROC_CFG0 0x148c
734#define MT6357_BUCK_VPROC_CFG1 0x148e
735#define MT6357_BUCK_VPROC_OP_EN 0x1490
736#define MT6357_BUCK_VPROC_OP_EN_SET 0x1492
737#define MT6357_BUCK_VPROC_OP_EN_CLR 0x1494
738#define MT6357_BUCK_VPROC_OP_CFG 0x1496
739#define MT6357_BUCK_VPROC_OP_CFG_SET 0x1498
740#define MT6357_BUCK_VPROC_OP_CFG_CLR 0x149a
741#define MT6357_BUCK_VPROC_SP_CON 0x149c
742#define MT6357_BUCK_VPROC_SP_CFG 0x149e
743#define MT6357_BUCK_VPROC_OC_CFG 0x14a0
744#define MT6357_BUCK_VPROC_DBG0 0x14a2
745#define MT6357_BUCK_VPROC_DBG1 0x14a4
746#define MT6357_BUCK_VPROC_DBG2 0x14a6
747#define MT6357_BUCK_VPROC_ELR_NUM 0x14a8
748#define MT6357_BUCK_VPROC_ELR0 0x14aa
749#define MT6357_BUCK_VCORE_DSN_ID 0x1500
750#define MT6357_BUCK_VCORE_DSN_REV0 0x1502
751#define MT6357_BUCK_VCORE_DSN_DBI 0x1504
752#define MT6357_BUCK_VCORE_DSN_DXI 0x1506
753#define MT6357_BUCK_VCORE_CON0 0x1508
754#define MT6357_BUCK_VCORE_CON1 0x150a
755#define MT6357_BUCK_VCORE_CFG0 0x150c
756#define MT6357_BUCK_VCORE_CFG1 0x150e
757#define MT6357_BUCK_VCORE_OP_EN 0x1510
758#define MT6357_BUCK_VCORE_OP_EN_SET 0x1512
759#define MT6357_BUCK_VCORE_OP_EN_CLR 0x1514
760#define MT6357_BUCK_VCORE_OP_CFG 0x1516
761#define MT6357_BUCK_VCORE_OP_CFG_SET 0x1518
762#define MT6357_BUCK_VCORE_OP_CFG_CLR 0x151a
763#define MT6357_BUCK_VCORE_SP_CON 0x151c
764#define MT6357_BUCK_VCORE_SP_CFG 0x151e
765#define MT6357_BUCK_VCORE_OC_CFG 0x1520
766#define MT6357_BUCK_VCORE_DBG0 0x1522
767#define MT6357_BUCK_VCORE_DBG1 0x1524
768#define MT6357_BUCK_VCORE_DBG2 0x1526
769#define MT6357_BUCK_VCORE_ELR_NUM 0x1528
770#define MT6357_BUCK_VCORE_ELR0 0x152a
771#define MT6357_BUCK_VMODEM_DSN_ID 0x1580
772#define MT6357_BUCK_VMODEM_DSN_REV0 0x1582
773#define MT6357_BUCK_VMODEM_DSN_DBI 0x1584
774#define MT6357_BUCK_VMODEM_DSN_DXI 0x1586
775#define MT6357_BUCK_VMODEM_CON0 0x1588
776#define MT6357_BUCK_VMODEM_CON1 0x158a
777#define MT6357_BUCK_VMODEM_CFG0 0x158c
778#define MT6357_BUCK_VMODEM_CFG1 0x158e
779#define MT6357_BUCK_VMODEM_OP_EN 0x1590
780#define MT6357_BUCK_VMODEM_OP_EN_SET 0x1592
781#define MT6357_BUCK_VMODEM_OP_EN_CLR 0x1594
782#define MT6357_BUCK_VMODEM_OP_CFG 0x1596
783#define MT6357_BUCK_VMODEM_OP_CFG_SET 0x1598
784#define MT6357_BUCK_VMODEM_OP_CFG_CLR 0x159a
785#define MT6357_BUCK_VMODEM_SP_CON 0x159c
786#define MT6357_BUCK_VMODEM_SP_CFG 0x159e
787#define MT6357_BUCK_VMODEM_OC_CFG 0x15a0
788#define MT6357_BUCK_VMODEM_DBG0 0x15a2
789#define MT6357_BUCK_VMODEM_DBG1 0x15a4
790#define MT6357_BUCK_VMODEM_DBG2 0x15a6
791#define MT6357_BUCK_VMODEM_ELR_NUM 0x15a8
792#define MT6357_BUCK_VMODEM_ELR0 0x15aa
793#define MT6357_BUCK_VS1_DSN_ID 0x1600
794#define MT6357_BUCK_VS1_DSN_REV0 0x1602
795#define MT6357_BUCK_VS1_DSN_DBI 0x1604
796#define MT6357_BUCK_VS1_DSN_DXI 0x1606
797#define MT6357_BUCK_VS1_CON0 0x1608
798#define MT6357_BUCK_VS1_CON1 0x160a
799#define MT6357_BUCK_VS1_CFG0 0x160c
800#define MT6357_BUCK_VS1_CFG1 0x160e
801#define MT6357_BUCK_VS1_OP_EN 0x1610
802#define MT6357_BUCK_VS1_OP_EN_SET 0x1612
803#define MT6357_BUCK_VS1_OP_EN_CLR 0x1614
804#define MT6357_BUCK_VS1_OP_CFG 0x1616
805#define MT6357_BUCK_VS1_OP_CFG_SET 0x1618
806#define MT6357_BUCK_VS1_OP_CFG_CLR 0x161a
807#define MT6357_BUCK_VS1_SP_CON 0x161c
808#define MT6357_BUCK_VS1_SP_CFG 0x161e
809#define MT6357_BUCK_VS1_OC_CFG 0x1620
810#define MT6357_BUCK_VS1_DBG0 0x1622
811#define MT6357_BUCK_VS1_DBG1 0x1624
812#define MT6357_BUCK_VS1_DBG2 0x1626
813#define MT6357_BUCK_VS1_VOTER 0x1628
814#define MT6357_BUCK_VS1_VOTER_SET 0x162a
815#define MT6357_BUCK_VS1_VOTER_CLR 0x162c
816#define MT6357_BUCK_VS1_VOTER_CFG 0x162e
817#define MT6357_BUCK_VS1_ELR_NUM 0x1630
818#define MT6357_BUCK_VS1_ELR0 0x1632
819#define MT6357_BUCK_VPA_DSN_ID 0x1680
820#define MT6357_BUCK_VPA_DSN_REV0 0x1682
821#define MT6357_BUCK_VPA_DSN_DBI 0x1684
822#define MT6357_BUCK_VPA_DSN_DXI 0x1686
823#define MT6357_BUCK_VPA_CON0 0x1688
824#define MT6357_BUCK_VPA_CON1 0x168a
825#define MT6357_BUCK_VPA_CFG0 0x168c
826#define MT6357_BUCK_VPA_CFG1 0x168e
827#define MT6357_BUCK_VPA_OC_CFG 0x1690
828#define MT6357_BUCK_VPA_DBG0 0x1692
829#define MT6357_BUCK_VPA_DBG1 0x1694
830#define MT6357_BUCK_VPA_DBG2 0x1696
831#define MT6357_BUCK_VPA_DLC_CON0 0x1698
832#define MT6357_BUCK_VPA_DLC_CON1 0x169a
833#define MT6357_BUCK_VPA_DLC_CON2 0x169c
834#define MT6357_BUCK_VPA_MSFG_CON0 0x169e
835#define MT6357_BUCK_VPA_MSFG_CON1 0x16a0
836#define MT6357_BUCK_VPA_MSFG_RRATE0 0x16a2
837#define MT6357_BUCK_VPA_MSFG_RRATE1 0x16a4
838#define MT6357_BUCK_VPA_MSFG_RRATE2 0x16a6
839#define MT6357_BUCK_VPA_MSFG_RTHD0 0x16a8
840#define MT6357_BUCK_VPA_MSFG_RTHD1 0x16aa
841#define MT6357_BUCK_VPA_MSFG_RTHD2 0x16ac
842#define MT6357_BUCK_VPA_MSFG_FRATE0 0x16ae
843#define MT6357_BUCK_VPA_MSFG_FRATE1 0x16b0
844#define MT6357_BUCK_VPA_MSFG_FRATE2 0x16b2
845#define MT6357_BUCK_VPA_MSFG_FTHD0 0x16b4
846#define MT6357_BUCK_VPA_MSFG_FTHD1 0x16b6
847#define MT6357_BUCK_VPA_MSFG_FTHD2 0x16b8
848#define MT6357_BUCK_ANA_DSN_ID 0x1700
849#define MT6357_BUCK_ANA_DSN_REV0 0x1702
850#define MT6357_BUCK_ANA_DSN_DBI 0x1704
851#define MT6357_BUCK_ANA_DSN_FPI 0x1706
852#define MT6357_SMPS_ANA_CON0 0x1708
853#define MT6357_SMPS_ANA_CON1 0x170a
854#define MT6357_SMPS_ANA_CON2 0x170c
855#define MT6357_VCORE_VPROC_ANA_CON0 0x170e
856#define MT6357_VCORE_VPROC_ANA_CON1 0x1710
857#define MT6357_VCORE_VPROC_ANA_CON2 0x1712
858#define MT6357_VCORE_VPROC_ANA_CON3 0x1714
859#define MT6357_VCORE_VPROC_ANA_CON4 0x1716
860#define MT6357_VCORE_VPROC_ANA_CON5 0x1718
861#define MT6357_VCORE_VPROC_ANA_CON6 0x171a
862#define MT6357_VCORE_VPROC_ANA_CON7 0x171c
863#define MT6357_VCORE_VPROC_ANA_CON8 0x171e
864#define MT6357_VCORE_VPROC_ANA_CON9 0x1720
865#define MT6357_VCORE_VPROC_ANA_CON10 0x1722
866#define MT6357_VCORE_VPROC_ANA_CON11 0x1724
867#define MT6357_VMODEM_ANA_CON0 0x1726
868#define MT6357_VMODEM_ANA_CON1 0x1728
869#define MT6357_VMODEM_ANA_CON2 0x172a
870#define MT6357_VMODEM_ANA_CON3 0x172c
871#define MT6357_VMODEM_ANA_CON4 0x172e
872#define MT6357_VMODEM_ANA_CON5 0x1730
873#define MT6357_VS1_ANA_CON0 0x1732
874#define MT6357_VS1_ANA_CON1 0x1734
875#define MT6357_VS1_ANA_CON2 0x1736
876#define MT6357_VS1_ANA_CON3 0x1738
877#define MT6357_VS1_ANA_CON4 0x173a
878#define MT6357_VS1_ANA_CON5 0x173c
879#define MT6357_VPA_ANA_CON0 0x173e
880#define MT6357_VPA_ANA_CON1 0x1740
881#define MT6357_VPA_ANA_CON2 0x1742
882#define MT6357_VPA_ANA_CON3 0x1744
883#define MT6357_VPA_ANA_CON4 0x1746
884#define MT6357_VPA_ANA_CON5 0x1748
885#define MT6357_BUCK_ANA_ELR_NUM 0x174a
886#define MT6357_SMPS_ELR_0 0x174c
887#define MT6357_SMPS_ELR_1 0x174e
888#define MT6357_SMPS_ELR_2 0x1750
889#define MT6357_SMPS_ELR_3 0x1752
890#define MT6357_SMPS_ELR_4 0x1754
891#define MT6357_SMPS_ELR_5 0x1756
892#define MT6357_VCORE_VPROC_ELR_0 0x1758
893#define MT6357_VCORE_VPROC_ELR_1 0x175a
894#define MT6357_VCORE_VPROC_ELR_2 0x175c
895#define MT6357_VCORE_VPROC_ELR_3 0x175e
896#define MT6357_VCORE_VPROC_ELR_4 0x1760
897#define MT6357_VMODEM_ELR_0 0x1762
898#define MT6357_VMODEM_ELR_1 0x1764
899#define MT6357_VMODEM_ELR_2 0x1766
900#define MT6357_VS1_ELR_0 0x1768
901#define MT6357_VS1_ELR_1 0x176a
902#define MT6357_VPA_ELR_0 0x176c
903#define MT6357_LDO_TOP_ID 0x1880
904#define MT6357_LDO_TOP_REV0 0x1882
905#define MT6357_LDO_TOP_DBI 0x1884
906#define MT6357_LDO_TOP_DXI 0x1886
907#define MT6357_LDO_TPM0 0x1888
908#define MT6357_LDO_TPM1 0x188a
909#define MT6357_LDO_TOP_CLK_DCM_CON0 0x188c
910#define MT6357_LDO_TOP_CLK_VIO28_CON0 0x188e
911#define MT6357_LDO_TOP_CLK_VIO18_CON0 0x1890
912#define MT6357_LDO_TOP_CLK_VAUD28_CON0 0x1892
913#define MT6357_LDO_TOP_CLK_VDRAM_CON0 0x1894
914#define MT6357_LDO_TOP_CLK_VSRAM_PROC_CON0 0x1896
915#define MT6357_LDO_TOP_CLK_VSRAM_OTHERS_CON0 0x1898
916#define MT6357_LDO_TOP_CLK_VAUX18_CON0 0x189a
917#define MT6357_LDO_TOP_CLK_VUSB33_CON0 0x189c
918#define MT6357_LDO_TOP_CLK_VEMC_CON0 0x189e
919#define MT6357_LDO_TOP_CLK_VXO22_CON0 0x18a0
920#define MT6357_LDO_TOP_CLK_VSIM1_CON0 0x18a2
921#define MT6357_LDO_TOP_CLK_VSIM2_CON0 0x18a4
922#define MT6357_LDO_TOP_CLK_VCAMD_CON0 0x18a6
923#define MT6357_LDO_TOP_CLK_VCAMIO_CON0 0x18a8
924#define MT6357_LDO_TOP_CLK_VEFUSE_CON0 0x18aa
925#define MT6357_LDO_TOP_CLK_VCN33_CON0 0x18ac
926#define MT6357_LDO_TOP_CLK_VCN18_CON0 0x18ae
927#define MT6357_LDO_TOP_CLK_VCN28_CON0 0x18b0
928#define MT6357_LDO_TOP_CLK_VIBR_CON0 0x18b2
929#define MT6357_LDO_TOP_CLK_VFE28_CON0 0x18b4
930#define MT6357_LDO_TOP_CLK_VMCH_CON0 0x18b6
931#define MT6357_LDO_TOP_CLK_VMC_CON0 0x18b8
932#define MT6357_LDO_TOP_CLK_VRF18_CON0 0x18ba
933#define MT6357_LDO_TOP_CLK_VLDO28_CON0 0x18bc
934#define MT6357_LDO_TOP_CLK_VRF12_CON0 0x18be
935#define MT6357_LDO_TOP_CLK_VCAMA_CON0 0x18c0
936#define MT6357_LDO_TOP_CLK_TREF_CON0 0x18c2
937#define MT6357_LDO_TOP_INT_CON0 0x18c4
938#define MT6357_LDO_TOP_INT_CON0_SET 0x18c6
939#define MT6357_LDO_TOP_INT_CON0_CLR 0x18c8
940#define MT6357_LDO_TOP_INT_CON1 0x18ca
941#define MT6357_LDO_TOP_INT_CON1_SET 0x18cc
942#define MT6357_LDO_TOP_INT_CON1_CLR 0x18ce
943#define MT6357_LDO_TOP_INT_MASK_CON0 0x18d0
944#define MT6357_LDO_TOP_INT_MASK_CON0_SET 0x18d2
945#define MT6357_LDO_TOP_INT_MASK_CON0_CLR 0x18d4
946#define MT6357_LDO_TOP_INT_MASK_CON1 0x18d6
947#define MT6357_LDO_TOP_INT_MASK_CON1_SET 0x18d8
948#define MT6357_LDO_TOP_INT_MASK_CON1_CLR 0x18da
949#define MT6357_LDO_TOP_INT_STATUS0 0x18dc
950#define MT6357_LDO_TOP_INT_STATUS1 0x18de
951#define MT6357_LDO_TOP_INT_RAW_STATUS0 0x18e0
952#define MT6357_LDO_TOP_INT_RAW_STATUS1 0x18e2
953#define MT6357_LDO_TEST_CON0 0x18e4
954#define MT6357_LDO_TOP_WDT_CON0 0x18e6
955#define MT6357_LDO_TOP_RSV_CON0 0x18e8
956#define MT6357_LDO_TOP_RSV_CON1 0x18ea
957#define MT6357_LDO_OCFB0 0x18ec
958#define MT6357_LDO_LP_PROTECTION 0x18ee
959#define MT6357_LDO_DUMMY_LOAD_GATED 0x18f0
960#define MT6357_LDO_GON0_DSN_ID 0x1900
961#define MT6357_LDO_GON0_DSN_REV0 0x1902
962#define MT6357_LDO_GON0_DSN_DBI 0x1904
963#define MT6357_LDO_GON0_DSN_DXI 0x1906
964#define MT6357_LDO_VXO22_CON0 0x1908
965#define MT6357_LDO_VXO22_OP_EN 0x190a
966#define MT6357_LDO_VXO22_OP_EN_SET 0x190c
967#define MT6357_LDO_VXO22_OP_EN_CLR 0x190e
968#define MT6357_LDO_VXO22_OP_CFG 0x1910
969#define MT6357_LDO_VXO22_OP_CFG_SET 0x1912
970#define MT6357_LDO_VXO22_OP_CFG_CLR 0x1914
971#define MT6357_LDO_VXO22_CON1 0x1916
972#define MT6357_LDO_VXO22_CON2 0x1918
973#define MT6357_LDO_VXO22_CON3 0x191a
974#define MT6357_LDO_VAUX18_CON0 0x191c
975#define MT6357_LDO_VAUX18_OP_EN 0x191e
976#define MT6357_LDO_VAUX18_OP_EN_SET 0x1920
977#define MT6357_LDO_VAUX18_OP_EN_CLR 0x1922
978#define MT6357_LDO_VAUX18_OP_CFG 0x1924
979#define MT6357_LDO_VAUX18_OP_CFG_SET 0x1926
980#define MT6357_LDO_VAUX18_OP_CFG_CLR 0x1928
981#define MT6357_LDO_VAUX18_CON1 0x192a
982#define MT6357_LDO_VAUX18_CON2 0x192c
983#define MT6357_LDO_VAUX18_CON3 0x192e
984#define MT6357_LDO_VAUD28_CON0 0x1930
985#define MT6357_LDO_VAUD28_OP_EN 0x1932
986#define MT6357_LDO_VAUD28_OP_EN_SET 0x1934
987#define MT6357_LDO_VAUD28_OP_EN_CLR 0x1936
988#define MT6357_LDO_VAUD28_OP_CFG 0x1938
989#define MT6357_LDO_VAUD28_OP_CFG_SET 0x193a
990#define MT6357_LDO_VAUD28_OP_CFG_CLR 0x193c
991#define MT6357_LDO_VAUD28_CON1 0x193e
992#define MT6357_LDO_VAUD28_CON2 0x1940
993#define MT6357_LDO_VAUD28_CON3 0x1942
994#define MT6357_LDO_VIO28_CON0 0x1944
995#define MT6357_LDO_VIO28_OP_EN 0x1946
996#define MT6357_LDO_VIO28_OP_EN_SET 0x1948
997#define MT6357_LDO_VIO28_OP_EN_CLR 0x194a
998#define MT6357_LDO_VIO28_OP_CFG 0x194c
999#define MT6357_LDO_VIO28_OP_CFG_SET 0x194e
1000#define MT6357_LDO_VIO28_OP_CFG_CLR 0x1950
1001#define MT6357_LDO_VIO28_CON1 0x1952
1002#define MT6357_LDO_VIO28_CON2 0x1954
1003#define MT6357_LDO_VIO28_CON3 0x1956
1004#define MT6357_LDO_VIO18_CON0 0x1958
1005#define MT6357_LDO_VIO18_OP_EN 0x195a
1006#define MT6357_LDO_VIO18_OP_EN_SET 0x195c
1007#define MT6357_LDO_VIO18_OP_EN_CLR 0x195e
1008#define MT6357_LDO_VIO18_OP_CFG 0x1960
1009#define MT6357_LDO_VIO18_OP_CFG_SET 0x1962
1010#define MT6357_LDO_VIO18_OP_CFG_CLR 0x1964
1011#define MT6357_LDO_VIO18_CON1 0x1966
1012#define MT6357_LDO_VIO18_CON2 0x1968
1013#define MT6357_LDO_VIO18_CON3 0x196a
1014#define MT6357_LDO_VDRAM_CON0 0x196c
1015#define MT6357_LDO_VDRAM_OP_EN 0x196e
1016#define MT6357_LDO_VDRAM_OP_EN_SET 0x1970
1017#define MT6357_LDO_VDRAM_OP_EN_CLR 0x1972
1018#define MT6357_LDO_VDRAM_OP_CFG 0x1974
1019#define MT6357_LDO_VDRAM_OP_CFG_SET 0x1976
1020#define MT6357_LDO_VDRAM_OP_CFG_CLR 0x1978
1021#define MT6357_LDO_VDRAM_CON1 0x197a
1022#define MT6357_LDO_VDRAM_CON2 0x197c
1023#define MT6357_LDO_VDRAM_CON3 0x197e
1024#define MT6357_LDO_GON1_DSN_ID 0x1980
1025#define MT6357_LDO_GON1_DSN_REV0 0x1982
1026#define MT6357_LDO_GON1_DSN_DBI 0x1984
1027#define MT6357_LDO_GON1_DSN_DXI 0x1986
1028#define MT6357_LDO_VEMC_CON0 0x1988
1029#define MT6357_LDO_VEMC_OP_EN 0x198a
1030#define MT6357_LDO_VEMC_OP_EN_SET 0x198c
1031#define MT6357_LDO_VEMC_OP_EN_CLR 0x198e
1032#define MT6357_LDO_VEMC_OP_CFG 0x1990
1033#define MT6357_LDO_VEMC_OP_CFG_SET 0x1992
1034#define MT6357_LDO_VEMC_OP_CFG_CLR 0x1994
1035#define MT6357_LDO_VEMC_CON1 0x1996
1036#define MT6357_LDO_VEMC_CON2 0x1998
1037#define MT6357_LDO_VEMC_CON3 0x199a
1038#define MT6357_LDO_VUSB33_CON0_0 0x199c
1039#define MT6357_LDO_VUSB33_OP_EN 0x199e
1040#define MT6357_LDO_VUSB33_OP_EN_SET 0x19a0
1041#define MT6357_LDO_VUSB33_OP_EN_CLR 0x19a2
1042#define MT6357_LDO_VUSB33_OP_CFG 0x19a4
1043#define MT6357_LDO_VUSB33_OP_CFG_SET 0x19a6
1044#define MT6357_LDO_VUSB33_OP_CFG_CLR 0x19a8
1045#define MT6357_LDO_VUSB33_CON0_1 0x19aa
1046#define MT6357_LDO_VUSB33_CON1 0x19ac
1047#define MT6357_LDO_VUSB33_CON2 0x19ae
1048#define MT6357_LDO_VUSB33_CON3 0x19b0
1049#define MT6357_LDO_VSRAM_PROC_CON0 0x19b2
1050#define MT6357_LDO_VSRAM_PROC_CON2 0x19b4
1051#define MT6357_LDO_VSRAM_PROC_CFG0 0x19b6
1052#define MT6357_LDO_VSRAM_PROC_CFG1 0x19b8
1053#define MT6357_LDO_VSRAM_PROC_OP_EN 0x19ba
1054#define MT6357_LDO_VSRAM_PROC_OP_EN_SET 0x19bc
1055#define MT6357_LDO_VSRAM_PROC_OP_EN_CLR 0x19be
1056#define MT6357_LDO_VSRAM_PROC_OP_CFG 0x19c0
1057#define MT6357_LDO_VSRAM_PROC_OP_CFG_SET 0x19c2
1058#define MT6357_LDO_VSRAM_PROC_OP_CFG_CLR 0x19c4
1059#define MT6357_LDO_VSRAM_PROC_CON3 0x19c6
1060#define MT6357_LDO_VSRAM_PROC_CON4 0x19c8
1061#define MT6357_LDO_VSRAM_PROC_CON5 0x19ca
1062#define MT6357_LDO_VSRAM_PROC_DBG0 0x19cc
1063#define MT6357_LDO_VSRAM_PROC_DBG1 0x19ce
1064#define MT6357_LDO_VSRAM_OTHERS_CON0 0x19d0
1065#define MT6357_LDO_VSRAM_OTHERS_CON2 0x19d2
1066#define MT6357_LDO_VSRAM_OTHERS_CFG0 0x19d4
1067#define MT6357_LDO_VSRAM_OTHERS_CFG1 0x19d6
1068#define MT6357_LDO_VSRAM_OTHERS_OP_EN 0x19d8
1069#define MT6357_LDO_VSRAM_OTHERS_OP_EN_SET 0x19da
1070#define MT6357_LDO_VSRAM_OTHERS_OP_EN_CLR 0x19dc
1071#define MT6357_LDO_VSRAM_OTHERS_OP_CFG 0x19de
1072#define MT6357_LDO_VSRAM_OTHERS_OP_CFG_SET 0x19e0
1073#define MT6357_LDO_VSRAM_OTHERS_OP_CFG_CLR 0x19e2
1074#define MT6357_LDO_VSRAM_OTHERS_CON3 0x19e4
1075#define MT6357_LDO_VSRAM_OTHERS_CON4 0x19e6
1076#define MT6357_LDO_VSRAM_OTHERS_CON5 0x19e8
1077#define MT6357_LDO_VSRAM_OTHERS_DBG0 0x19ea
1078#define MT6357_LDO_VSRAM_OTHERS_DBG1 0x19ec
1079#define MT6357_LDO_VSRAM_PROC_SP 0x19ee
1080#define MT6357_LDO_VSRAM_OTHERS_SP 0x19f0
1081#define MT6357_LDO_VSRAM_PROC_R2R_PDN_DIS 0x19f2
1082#define MT6357_LDO_VSRAM_OTHERS_R2R_PDN_DIS 0x19f4
1083#define MT6357_LDO_VSRAM_WDT_DBG0 0x19f6
1084#define MT6357_LDO_GON1_ELR_NUM 0x19f8
1085#define MT6357_LDO_VSRAM_CON0 0x19fa
1086#define MT6357_LDO_VSRAM_CON1 0x19fc
1087#define MT6357_LDO_VSRAM_CON2 0x19fe
1088#define MT6357_LDO_GOFF0_DSN_ID 0x1a00
1089#define MT6357_LDO_GOFF0_DSN_REV0 0x1a02
1090#define MT6357_LDO_GOFF0_DSN_DBI 0x1a04
1091#define MT6357_LDO_GOFF0_DSN_DXI 0x1a06
1092#define MT6357_LDO_VFE28_CON0 0x1a08
1093#define MT6357_LDO_VFE28_OP_EN 0x1a0a
1094#define MT6357_LDO_VFE28_OP_EN_SET 0x1a0c
1095#define MT6357_LDO_VFE28_OP_EN_CLR 0x1a0e
1096#define MT6357_LDO_VFE28_OP_CFG 0x1a10
1097#define MT6357_LDO_VFE28_OP_CFG_SET 0x1a12
1098#define MT6357_LDO_VFE28_OP_CFG_CLR 0x1a14
1099#define MT6357_LDO_VFE28_CON1 0x1a16
1100#define MT6357_LDO_VFE28_CON2 0x1a18
1101#define MT6357_LDO_VFE28_CON3 0x1a1a
1102#define MT6357_LDO_VRF18_CON0 0x1a1c
1103#define MT6357_LDO_VRF18_OP_EN 0x1a1e
1104#define MT6357_LDO_VRF18_OP_EN_SET 0x1a20
1105#define MT6357_LDO_VRF18_OP_EN_CLR 0x1a22
1106#define MT6357_LDO_VRF18_OP_CFG 0x1a24
1107#define MT6357_LDO_VRF18_OP_CFG_SET 0x1a26
1108#define MT6357_LDO_VRF18_OP_CFG_CLR 0x1a28
1109#define MT6357_LDO_VRF18_CON1 0x1a2a
1110#define MT6357_LDO_VRF18_CON2 0x1a2c
1111#define MT6357_LDO_VRF18_CON3 0x1a2e
1112#define MT6357_LDO_VRF12_CON0 0x1a30
1113#define MT6357_LDO_VRF12_OP_EN 0x1a32
1114#define MT6357_LDO_VRF12_OP_EN_SET 0x1a34
1115#define MT6357_LDO_VRF12_OP_EN_CLR 0x1a36
1116#define MT6357_LDO_VRF12_OP_CFG 0x1a38
1117#define MT6357_LDO_VRF12_OP_CFG_SET 0x1a3a
1118#define MT6357_LDO_VRF12_OP_CFG_CLR 0x1a3c
1119#define MT6357_LDO_VRF12_CON1 0x1a3e
1120#define MT6357_LDO_VRF12_CON2 0x1a40
1121#define MT6357_LDO_VRF12_CON3 0x1a42
1122#define MT6357_LDO_VEFUSE_CON0 0x1a44
1123#define MT6357_LDO_VEFUSE_OP_EN 0x1a46
1124#define MT6357_LDO_VEFUSE_OP_EN_SET 0x1a48
1125#define MT6357_LDO_VEFUSE_OP_EN_CLR 0x1a4a
1126#define MT6357_LDO_VEFUSE_OP_CFG 0x1a4c
1127#define MT6357_LDO_VEFUSE_OP_CFG_SET 0x1a4e
1128#define MT6357_LDO_VEFUSE_OP_CFG_CLR 0x1a50
1129#define MT6357_LDO_VEFUSE_CON1 0x1a52
1130#define MT6357_LDO_VEFUSE_CON2 0x1a54
1131#define MT6357_LDO_VEFUSE_CON3 0x1a56
1132#define MT6357_LDO_VCN18_CON0 0x1a58
1133#define MT6357_LDO_VCN18_OP_EN 0x1a5a
1134#define MT6357_LDO_VCN18_OP_EN_SET 0x1a5c
1135#define MT6357_LDO_VCN18_OP_EN_CLR 0x1a5e
1136#define MT6357_LDO_VCN18_OP_CFG 0x1a60
1137#define MT6357_LDO_VCN18_OP_CFG_SET 0x1a62
1138#define MT6357_LDO_VCN18_OP_CFG_CLR 0x1a64
1139#define MT6357_LDO_VCN18_CON1 0x1a66
1140#define MT6357_LDO_VCN18_CON2 0x1a68
1141#define MT6357_LDO_VCN18_CON3 0x1a6a
1142#define MT6357_LDO_VCAMA_CON0 0x1a6c
1143#define MT6357_LDO_VCAMA_OP_EN 0x1a6e
1144#define MT6357_LDO_VCAMA_OP_EN_SET 0x1a70
1145#define MT6357_LDO_VCAMA_OP_EN_CLR 0x1a72
1146#define MT6357_LDO_VCAMA_OP_CFG 0x1a74
1147#define MT6357_LDO_VCAMA_OP_CFG_SET 0x1a76
1148#define MT6357_LDO_VCAMA_OP_CFG_CLR 0x1a78
1149#define MT6357_LDO_VCAMA_CON1 0x1a7a
1150#define MT6357_LDO_VCAMA_CON2 0x1a7c
1151#define MT6357_LDO_VCAMA_CON3 0x1a7e
1152#define MT6357_LDO_GOFF1_DSN_ID 0x1a80
1153#define MT6357_LDO_GOFF1_DSN_REV0 0x1a82
1154#define MT6357_LDO_GOFF1_DSN_DBI 0x1a84
1155#define MT6357_LDO_GOFF1_DSN_DXI 0x1a86
1156#define MT6357_LDO_VCAMD_CON0 0x1a88
1157#define MT6357_LDO_VCAMD_OP_EN 0x1a8a
1158#define MT6357_LDO_VCAMD_OP_EN_SET 0x1a8c
1159#define MT6357_LDO_VCAMD_OP_EN_CLR 0x1a8e
1160#define MT6357_LDO_VCAMD_OP_CFG 0x1a90
1161#define MT6357_LDO_VCAMD_OP_CFG_SET 0x1a92
1162#define MT6357_LDO_VCAMD_OP_CFG_CLR 0x1a94
1163#define MT6357_LDO_VCAMD_CON1 0x1a96
1164#define MT6357_LDO_VCAMD_CON2 0x1a98
1165#define MT6357_LDO_VCAMD_CON3 0x1a9a
1166#define MT6357_LDO_VCAMIO_CON0 0x1a9c
1167#define MT6357_LDO_VCAMIO_OP_EN 0x1a9e
1168#define MT6357_LDO_VCAMIO_OP_EN_SET 0x1aa0
1169#define MT6357_LDO_VCAMIO_OP_EN_CLR 0x1aa2
1170#define MT6357_LDO_VCAMIO_OP_CFG 0x1aa4
1171#define MT6357_LDO_VCAMIO_OP_CFG_SET 0x1aa6
1172#define MT6357_LDO_VCAMIO_OP_CFG_CLR 0x1aa8
1173#define MT6357_LDO_VCAMIO_CON1 0x1aaa
1174#define MT6357_LDO_VCAMIO_CON2 0x1aac
1175#define MT6357_LDO_VCAMIO_CON3 0x1aae
1176#define MT6357_LDO_VMC_CON0 0x1ab0
1177#define MT6357_LDO_VMC_OP_EN 0x1ab2
1178#define MT6357_LDO_VMC_OP_EN_SET 0x1ab4
1179#define MT6357_LDO_VMC_OP_EN_CLR 0x1ab6
1180#define MT6357_LDO_VMC_OP_CFG 0x1ab8
1181#define MT6357_LDO_VMC_OP_CFG_SET 0x1aba
1182#define MT6357_LDO_VMC_OP_CFG_CLR 0x1abc
1183#define MT6357_LDO_VMC_CON1 0x1abe
1184#define MT6357_LDO_VMC_CON2 0x1ac0
1185#define MT6357_LDO_VMC_CON3 0x1ac2
1186#define MT6357_LDO_VMCH_CON0 0x1ac4
1187#define MT6357_LDO_VMCH_OP_EN 0x1ac6
1188#define MT6357_LDO_VMCH_OP_EN_SET 0x1ac8
1189#define MT6357_LDO_VMCH_OP_EN_CLR 0x1aca
1190#define MT6357_LDO_VMCH_OP_CFG 0x1acc
1191#define MT6357_LDO_VMCH_OP_CFG_SET 0x1ace
1192#define MT6357_LDO_VMCH_OP_CFG_CLR 0x1ad0
1193#define MT6357_LDO_VMCH_CON1 0x1ad2
1194#define MT6357_LDO_VMCH_CON2 0x1ad4
1195#define MT6357_LDO_VMCH_CON3 0x1ad6
1196#define MT6357_LDO_VSIM1_CON0 0x1ad8
1197#define MT6357_LDO_VSIM1_OP_EN 0x1ada
1198#define MT6357_LDO_VSIM1_OP_EN_SET 0x1adc
1199#define MT6357_LDO_VSIM1_OP_EN_CLR 0x1ade
1200#define MT6357_LDO_VSIM1_OP_CFG 0x1ae0
1201#define MT6357_LDO_VSIM1_OP_CFG_SET 0x1ae2
1202#define MT6357_LDO_VSIM1_OP_CFG_CLR 0x1ae4
1203#define MT6357_LDO_VSIM1_CON1 0x1ae6
1204#define MT6357_LDO_VSIM1_CON2 0x1ae8
1205#define MT6357_LDO_VSIM1_CON3 0x1aea
1206#define MT6357_LDO_VSIM2_CON0 0x1aec
1207#define MT6357_LDO_VSIM2_OP_EN 0x1aee
1208#define MT6357_LDO_VSIM2_OP_EN_SET 0x1af0
1209#define MT6357_LDO_VSIM2_OP_EN_CLR 0x1af2
1210#define MT6357_LDO_VSIM2_OP_CFG 0x1af4
1211#define MT6357_LDO_VSIM2_OP_CFG_SET 0x1af6
1212#define MT6357_LDO_VSIM2_OP_CFG_CLR 0x1af8
1213#define MT6357_LDO_VSIM2_CON1 0x1afa
1214#define MT6357_LDO_VSIM2_CON2 0x1afc
1215#define MT6357_LDO_VSIM2_CON3 0x1afe
1216#define MT6357_LDO_GOFF2_DSN_ID 0x1b00
1217#define MT6357_LDO_GOFF2_DSN_REV0 0x1b02
1218#define MT6357_LDO_GOFF2_DSN_DBI 0x1b04
1219#define MT6357_LDO_GOFF2_DSN_DXI 0x1b06
1220#define MT6357_LDO_VIBR_CON0 0x1b08
1221#define MT6357_LDO_VIBR_OP_EN 0x1b0a
1222#define MT6357_LDO_VIBR_OP_EN_SET 0x1b0c
1223#define MT6357_LDO_VIBR_OP_EN_CLR 0x1b0e
1224#define MT6357_LDO_VIBR_OP_CFG 0x1b10
1225#define MT6357_LDO_VIBR_OP_CFG_SET 0x1b12
1226#define MT6357_LDO_VIBR_OP_CFG_CLR 0x1b14
1227#define MT6357_LDO_VIBR_CON1 0x1b16
1228#define MT6357_LDO_VIBR_CON2 0x1b18
1229#define MT6357_LDO_VIBR_CON3 0x1b1a
1230#define MT6357_LDO_VCN33_CON0_0 0x1b1c
1231#define MT6357_LDO_VCN33_OP_EN 0x1b1e
1232#define MT6357_LDO_VCN33_OP_EN_SET 0x1b20
1233#define MT6357_LDO_VCN33_OP_EN_CLR 0x1b22
1234#define MT6357_LDO_VCN33_OP_CFG 0x1b24
1235#define MT6357_LDO_VCN33_OP_CFG_SET 0x1b26
1236#define MT6357_LDO_VCN33_OP_CFG_CLR 0x1b28
1237#define MT6357_LDO_VCN33_CON0_1 0x1b2a
1238#define MT6357_LDO_VCN33_CON1 0x1b2c
1239#define MT6357_LDO_VCN33_CON2 0x1b2e
1240#define MT6357_LDO_VCN33_CON3 0x1b30
1241#define MT6357_LDO_VLDO28_CON0_0 0x1b32
1242#define MT6357_LDO_VLDO28_OP_EN 0x1b34
1243#define MT6357_LDO_VLDO28_OP_EN_SET 0x1b36
1244#define MT6357_LDO_VLDO28_OP_EN_CLR 0x1b38
1245#define MT6357_LDO_VLDO28_OP_CFG 0x1b3a
1246#define MT6357_LDO_VLDO28_OP_CFG_SET 0x1b3c
1247#define MT6357_LDO_VLDO28_OP_CFG_CLR 0x1b3e
1248#define MT6357_LDO_VLDO28_CON0_1 0x1b40
1249#define MT6357_LDO_VLDO28_CON1 0x1b42
1250#define MT6357_LDO_VLDO28_CON2 0x1b44
1251#define MT6357_LDO_VLDO28_CON3 0x1b46
1252#define MT6357_LDO_GOFF2_RSV_CON0 0x1b48
1253#define MT6357_LDO_GOFF2_RSV_CON1 0x1b4a
1254#define MT6357_LDO_GOFF3_DSN_ID 0x1b80
1255#define MT6357_LDO_GOFF3_DSN_REV0 0x1b82
1256#define MT6357_LDO_GOFF3_DSN_DBI 0x1b84
1257#define MT6357_LDO_GOFF3_DSN_DXI 0x1b86
1258#define MT6357_LDO_VCN28_CON0 0x1b88
1259#define MT6357_LDO_VCN28_OP_EN 0x1b8a
1260#define MT6357_LDO_VCN28_OP_EN_SET 0x1b8c
1261#define MT6357_LDO_VCN28_OP_EN_CLR 0x1b8e
1262#define MT6357_LDO_VCN28_OP_CFG 0x1b90
1263#define MT6357_LDO_VCN28_OP_CFG_SET 0x1b92
1264#define MT6357_LDO_VCN28_OP_CFG_CLR 0x1b94
1265#define MT6357_LDO_VCN28_CON1 0x1b96
1266#define MT6357_LDO_VCN28_CON2 0x1b98
1267#define MT6357_LDO_VCN28_CON3 0x1b9a
1268#define MT6357_VRTC_CON0 0x1b9c
1269#define MT6357_LDO_TREF_CON0 0x1b9e
1270#define MT6357_LDO_TREF_OP_EN 0x1ba0
1271#define MT6357_LDO_TREF_OP_EN_SET 0x1ba2
1272#define MT6357_LDO_TREF_OP_EN_CLR 0x1ba4
1273#define MT6357_LDO_TREF_OP_CFG 0x1ba6
1274#define MT6357_LDO_TREF_OP_CFG_SET 0x1ba8
1275#define MT6357_LDO_TREF_OP_CFG_CLR 0x1baa
1276#define MT6357_LDO_TREF_CON1 0x1bac
1277#define MT6357_LDO_GOFF3_RSV_CON0 0x1bae
1278#define MT6357_LDO_GOFF3_RSV_CON1 0x1bb0
1279#define MT6357_LDO_ANA0_DSN_ID 0x1c00
1280#define MT6357_LDO_ANA0_DSN_REV0 0x1c02
1281#define MT6357_LDO_ANA0_DSN_DBI 0x1c04
1282#define MT6357_LDO_ANA0_DSN_DXI 0x1c06
1283#define MT6357_VFE28_ANA_CON0 0x1c08
1284#define MT6357_VFE28_ANA_CON1 0x1c0a
1285#define MT6357_VCN28_ANA_CON0 0x1c0c
1286#define MT6357_VCN28_ANA_CON1 0x1c0e
1287#define MT6357_VAUD28_ANA_CON0 0x1c10
1288#define MT6357_VAUD28_ANA_CON1 0x1c12
1289#define MT6357_VAUX18_ANA_CON0 0x1c14
1290#define MT6357_VAUX18_ANA_CON1 0x1c16
1291#define MT6357_VXO22_ANA_CON0 0x1c18
1292#define MT6357_VXO22_ANA_CON1 0x1c1a
1293#define MT6357_VCN33_ANA_CON0 0x1c1c
1294#define MT6357_VCN33_ANA_CON1 0x1c1e
1295#define MT6357_VEMC_ANA_CON0 0x1c20
1296#define MT6357_VEMC_ANA_CON1 0x1c22
1297#define MT6357_VLDO28_ANA_CON0 0x1c24
1298#define MT6357_VLDO28_ANA_CON1 0x1c26
1299#define MT6357_VIO28_ANA_CON0 0x1c28
1300#define MT6357_VIO28_ANA_CON1 0x1c2a
1301#define MT6357_VIBR_ANA_CON0 0x1c2c
1302#define MT6357_VIBR_ANA_CON1 0x1c2e
1303#define MT6357_VSIM1_ANA_CON0 0x1c30
1304#define MT6357_VSIM1_ANA_CON1 0x1c32
1305#define MT6357_VSIM2_ANA_CON0 0x1c34
1306#define MT6357_VSIM2_ANA_CON1 0x1c36
1307#define MT6357_VMCH_ANA_CON0 0x1c38
1308#define MT6357_VMCH_ANA_CON1 0x1c3a
1309#define MT6357_VMC_ANA_CON0 0x1c3c
1310#define MT6357_VMC_ANA_CON1 0x1c3e
1311#define MT6357_VCAMIO_ANA_CON0 0x1c40
1312#define MT6357_VCAMIO_ANA_CON1 0x1c42
1313#define MT6357_VCN18_ANA_CON0 0x1c44
1314#define MT6357_VCN18_ANA_CON1 0x1c46
1315#define MT6357_VRF18_ANA_CON0 0x1c48
1316#define MT6357_VRF18_ANA_CON1 0x1c4a
1317#define MT6357_VIO18_ANA_CON0 0x1c4c
1318#define MT6357_VIO18_ANA_CON1 0x1c4e
1319#define MT6357_VDRAM_ANA_CON1 0x1c50
1320#define MT6357_VRF12_ANA_CON0 0x1c52
1321#define MT6357_VRF12_ANA_CON1 0x1c54
1322#define MT6357_VSRAM_PROC_ANA_CON0 0x1c56
1323#define MT6357_VSRAM_OTHERS_ANA_CON0 0x1c58
1324#define MT6357_LDO_ANA0_ELR_NUM 0x1c5a
1325#define MT6357_VFE28_ELR_0 0x1c5c
1326#define MT6357_VCN28_ELR_0 0x1c5e
1327#define MT6357_VAUD28_ELR_0 0x1c60
1328#define MT6357_VAUX18_ELR_0 0x1c62
1329#define MT6357_VXO22_ELR_0 0x1c64
1330#define MT6357_VCN33_ELR_0 0x1c66
1331#define MT6357_VEMC_ELR_0 0x1c68
1332#define MT6357_VLDO28_ELR_0 0x1c6a
1333#define MT6357_VIO28_ELR_0 0x1c6c
1334#define MT6357_VIBR_ELR_0 0x1c6e
1335#define MT6357_VSIM1_ELR_0 0x1c70
1336#define MT6357_VSIM2_ELR_0 0x1c72
1337#define MT6357_VMCH_ELR_0 0x1c74
1338#define MT6357_VMC_ELR_0 0x1c76
1339#define MT6357_VCAMIO_ELR_0 0x1c78
1340#define MT6357_VCN18_ELR_0 0x1c7a
1341#define MT6357_VRF18_ELR_0 0x1c7c
1342#define MT6357_LDO_ANA1_DSN_ID 0x1c80
1343#define MT6357_LDO_ANA1_DSN_REV0 0x1c82
1344#define MT6357_LDO_ANA1_DSN_DBI 0x1c84
1345#define MT6357_LDO_ANA1_DSN_DXI 0x1c86
1346#define MT6357_VUSB33_ANA_CON0 0x1c88
1347#define MT6357_VUSB33_ANA_CON1 0x1c8a
1348#define MT6357_VCAMA_ANA_CON0 0x1c8c
1349#define MT6357_VCAMA_ANA_CON1 0x1c8e
1350#define MT6357_VEFUSE_ANA_CON0 0x1c90
1351#define MT6357_VEFUSE_ANA_CON1 0x1c92
1352#define MT6357_VCAMD_ANA_CON0 0x1c94
1353#define MT6357_VCAMD_ANA_CON1 0x1c96
1354#define MT6357_LDO_ANA1_ELR_NUM 0x1c98
1355#define MT6357_VUSB33_ELR_0 0x1c9a
1356#define MT6357_VCAMA_ELR_0 0x1c9c
1357#define MT6357_VEFUSE_ELR_0 0x1c9e
1358#define MT6357_VCAMD_ELR_0 0x1ca0
1359#define MT6357_VIO18_ELR_0 0x1ca2
1360#define MT6357_VDRAM_ELR_0 0x1ca4
1361#define MT6357_VRF12_ELR_0 0x1ca6
1362#define MT6357_VRTC_ELR_0 0x1ca8
1363#define MT6357_VDRAM_ELR_1 0x1caa
1364#define MT6357_VDRAM_ELR_2 0x1cac
1365#define MT6357_XPP_TOP_ID 0x1e00
1366#define MT6357_XPP_TOP_REV0 0x1e02
1367#define MT6357_XPP_TOP_DBI 0x1e04
1368#define MT6357_XPP_TOP_DXI 0x1e06
1369#define MT6357_XPP_TPM0 0x1e08
1370#define MT6357_XPP_TPM1 0x1e0a
1371#define MT6357_XPP_TOP_TEST_OUT 0x1e0c
1372#define MT6357_XPP_TOP_TEST_CON0 0x1e0e
1373#define MT6357_XPP_TOP_CKPDN_CON0 0x1e10
1374#define MT6357_XPP_TOP_CKPDN_CON0_SET 0x1e12
1375#define MT6357_XPP_TOP_CKPDN_CON0_CLR 0x1e14
1376#define MT6357_XPP_TOP_CKSEL_CON0 0x1e16
1377#define MT6357_XPP_TOP_CKSEL_CON0_SET 0x1e18
1378#define MT6357_XPP_TOP_CKSEL_CON0_CLR 0x1e1a
1379#define MT6357_XPP_TOP_RST_CON0 0x1e1c
1380#define MT6357_XPP_TOP_RST_CON0_SET 0x1e1e
1381#define MT6357_XPP_TOP_RST_CON0_CLR 0x1e20
1382#define MT6357_XPP_TOP_RST_BANK_CON0 0x1e22
1383#define MT6357_XPP_TOP_RST_BANK_CON0_SET 0x1e24
1384#define MT6357_XPP_TOP_RST_BANK_CON0_CLR 0x1e26
1385#define MT6357_DRIVER_BL_DSN_ID 0x1e80
1386#define MT6357_DRIVER_BL_DSN_REV0 0x1e82
1387#define MT6357_DRIVER_BL_DSN_DBI 0x1e84
1388#define MT6357_DRIVER_BL_DSN_DXI 0x1e86
1389#define MT6357_ISINK1_CON0 0x1e88
1390#define MT6357_ISINK1_CON1 0x1e8a
1391#define MT6357_ISINK1_CON2 0x1e8c
1392#define MT6357_ISINK1_CON3 0x1e8e
1393#define MT6357_ISINK_ANA1 0x1e90
1394#define MT6357_ISINK_PHASE_DLY 0x1e92
1395#define MT6357_ISINK_SFSTR 0x1e94
1396#define MT6357_ISINK_EN_CTRL 0x1e96
1397#define MT6357_ISINK_MODE_CTRL 0x1e98
1398#define MT6357_DRIVER_ANA_CON0 0x1e9a
1399#define MT6357_ISINK_ANA_CON0 0x1e9c
1400#define MT6357_ISINK_ANA_CON1 0x1e9e
1401#define MT6357_DRIVER_BL_ELR_NUM 0x1ea0
1402#define MT6357_DRIVER_BL_ELR_0 0x1ea2
1403#define MT6357_DRIVER_CI_DSN_ID 0x1f00
1404#define MT6357_DRIVER_CI_DSN_REV0 0x1f02
1405#define MT6357_DRIVER_CI_DSN_DBI 0x1f04
1406#define MT6357_DRIVER_CI_DSN_DXI 0x1f06
1407#define MT6357_CHRIND_CON0 0x1f08
1408#define MT6357_CHRIND_CON1 0x1f0a
1409#define MT6357_CHRIND_CON2 0x1f0c
1410#define MT6357_CHRIND_CON3 0x1f0e
1411#define MT6357_CHRIND_CON4 0x1f10
1412#define MT6357_CHRIND_EN_CTRL 0x1f12
1413#define MT6357_CHRIND_ANA_CON0 0x1f14
1414#define MT6357_DRIVER_DL_DSN_ID 0x1f80
1415#define MT6357_DRIVER_DL_DSN_REV0 0x1f82
1416#define MT6357_DRIVER_DL_DSN_DBI 0x1f84
1417#define MT6357_DRIVER_DL_DSN_DXI 0x1f86
1418#define MT6357_ISINK2_CON0 0x1f88
1419#define MT6357_ISINK3_CON0 0x1f8a
1420#define MT6357_ISINK_EN_CTRL_SMPL 0x1f8c
1421#define MT6357_AUD_TOP_ID 0x2080
1422#define MT6357_AUD_TOP_REV0 0x2082
1423#define MT6357_AUD_TOP_DBI 0x2084
1424#define MT6357_AUD_TOP_DXI 0x2086
1425#define MT6357_AUD_TOP_CKPDN_TPM0 0x2088
1426#define MT6357_AUD_TOP_CKPDN_TPM1 0x208a
1427#define MT6357_AUD_TOP_CKPDN_CON0 0x208c
1428#define MT6357_AUD_TOP_CKPDN_CON0_SET 0x208e
1429#define MT6357_AUD_TOP_CKPDN_CON0_CLR 0x2090
1430#define MT6357_AUD_TOP_CKSEL_CON0 0x2092
1431#define MT6357_AUD_TOP_CKSEL_CON0_SET 0x2094
1432#define MT6357_AUD_TOP_CKSEL_CON0_CLR 0x2096
1433#define MT6357_AUD_TOP_CKTST_CON0 0x2098
1434#define MT6357_AUD_TOP_RST_CON0 0x209a
1435#define MT6357_AUD_TOP_RST_CON0_SET 0x209c
1436#define MT6357_AUD_TOP_RST_CON0_CLR 0x209e
1437#define MT6357_AUD_TOP_RST_BANK_CON0 0x20a0
1438#define MT6357_AUD_TOP_INT_CON0 0x20a2
1439#define MT6357_AUD_TOP_INT_CON0_SET 0x20a4
1440#define MT6357_AUD_TOP_INT_CON0_CLR 0x20a6
1441#define MT6357_AUD_TOP_INT_MASK_CON0 0x20a8
1442#define MT6357_AUD_TOP_INT_MASK_CON0_SET 0x20aa
1443#define MT6357_AUD_TOP_INT_MASK_CON0_CLR 0x20ac
1444#define MT6357_AUD_TOP_INT_STATUS0 0x20ae
1445#define MT6357_AUD_TOP_INT_RAW_STATUS0 0x20b0
1446#define MT6357_AUD_TOP_INT_MISC_CON0 0x20b2
1447#define MT6357_AUDNCP_CLKDIV_CON0 0x20b4
1448#define MT6357_AUDNCP_CLKDIV_CON1 0x20b6
1449#define MT6357_AUDNCP_CLKDIV_CON2 0x20b8
1450#define MT6357_AUDNCP_CLKDIV_CON3 0x20ba
1451#define MT6357_AUDNCP_CLKDIV_CON4 0x20bc
1452#define MT6357_AUD_TOP_MON_CON0 0x20be
1453#define MT6357_AUDIO_DIG_DSN_ID 0x2100
1454#define MT6357_AUDIO_DIG_DSN_REV0 0x2102
1455#define MT6357_AUDIO_DIG_DSN_DBI 0x2104
1456#define MT6357_AUDIO_DIG_DSN_DXI 0x2106
1457#define MT6357_AFE_UL_DL_CON0 0x2108
1458#define MT6357_AFE_DL_SRC2_CON0_L 0x210a
1459#define MT6357_AFE_UL_SRC_CON0_H 0x210c
1460#define MT6357_AFE_UL_SRC_CON0_L 0x210e
1461#define MT6357_AFE_TOP_CON0 0x2110
1462#define MT6357_AUDIO_TOP_CON0 0x2112
1463#define MT6357_AFE_MON_DEBUG0 0x2114
1464#define MT6357_AFUNC_AUD_CON0 0x2116
1465#define MT6357_AFUNC_AUD_CON1 0x2118
1466#define MT6357_AFUNC_AUD_CON2 0x211a
1467#define MT6357_AFUNC_AUD_CON3 0x211c
1468#define MT6357_AFUNC_AUD_CON4 0x211e
1469#define MT6357_AFUNC_AUD_CON5 0x2120
1470#define MT6357_AFUNC_AUD_CON6 0x2122
1471#define MT6357_AFUNC_AUD_MON0 0x2124
1472#define MT6357_AUDRC_TUNE_MON0 0x2126
1473#define MT6357_AFE_ADDA_MTKAIF_FIFO_CFG0 0x2128
1474#define MT6357_AFE_ADDA_MTKAIF_FIFO_LOG_MON1 0x212a
1475#define MT6357_AFE_ADDA_MTKAIF_MON0 0x212c
1476#define MT6357_AFE_ADDA_MTKAIF_MON1 0x212e
1477#define MT6357_AFE_ADDA_MTKAIF_MON2 0x2130
1478#define MT6357_AFE_ADDA_MTKAIF_MON3 0x2132
1479#define MT6357_AFE_ADDA_MTKAIF_CFG0 0x2134
1480#define MT6357_AFE_ADDA_MTKAIF_RX_CFG0 0x2136
1481#define MT6357_AFE_ADDA_MTKAIF_RX_CFG1 0x2138
1482#define MT6357_AFE_ADDA_MTKAIF_RX_CFG2 0x213a
1483#define MT6357_AFE_ADDA_MTKAIF_RX_CFG3 0x213c
1484#define MT6357_AFE_ADDA_MTKAIF_TX_CFG1 0x213e
1485#define MT6357_AFE_SGEN_CFG0 0x2140
1486#define MT6357_AFE_SGEN_CFG1 0x2142
1487#define MT6357_AFE_ADC_ASYNC_FIFO_CFG 0x2144
1488#define MT6357_AFE_DCCLK_CFG0 0x2146
1489#define MT6357_AFE_DCCLK_CFG1 0x2148
1490#define MT6357_AUDIO_DIG_CFG 0x214a
1491#define MT6357_AFE_AUD_PAD_TOP 0x214c
1492#define MT6357_AFE_AUD_PAD_TOP_MON 0x214e
1493#define MT6357_AFE_AUD_PAD_TOP_MON1 0x2150
1494#define MT6357_AUDENC_DSN_ID 0x2180
1495#define MT6357_AUDENC_DSN_REV0 0x2182
1496#define MT6357_AUDENC_DSN_DBI 0x2184
1497#define MT6357_AUDENC_DSN_FPI 0x2186
1498#define MT6357_AUDENC_ANA_CON0 0x2188
1499#define MT6357_AUDENC_ANA_CON1 0x218a
1500#define MT6357_AUDENC_ANA_CON2 0x218c
1501#define MT6357_AUDENC_ANA_CON3 0x218e
1502#define MT6357_AUDENC_ANA_CON4 0x2190
1503#define MT6357_AUDENC_ANA_CON5 0x2192
1504#define MT6357_AUDENC_ANA_CON6 0x2194
1505#define MT6357_AUDENC_ANA_CON7 0x2196
1506#define MT6357_AUDENC_ANA_CON8 0x2198
1507#define MT6357_AUDENC_ANA_CON9 0x219a
1508#define MT6357_AUDENC_ANA_CON10 0x219c
1509#define MT6357_AUDENC_ANA_CON11 0x219e
1510#define MT6357_AUDDEC_DSN_ID 0x2200
1511#define MT6357_AUDDEC_DSN_REV0 0x2202
1512#define MT6357_AUDDEC_DSN_DBI 0x2204
1513#define MT6357_AUDDEC_DSN_FPI 0x2206
1514#define MT6357_AUDDEC_ANA_CON0 0x2208
1515#define MT6357_AUDDEC_ANA_CON1 0x220a
1516#define MT6357_AUDDEC_ANA_CON2 0x220c
1517#define MT6357_AUDDEC_ANA_CON3 0x220e
1518#define MT6357_AUDDEC_ANA_CON4 0x2210
1519#define MT6357_AUDDEC_ANA_CON5 0x2212
1520#define MT6357_AUDDEC_ANA_CON6 0x2214
1521#define MT6357_AUDDEC_ANA_CON7 0x2216
1522#define MT6357_AUDDEC_ANA_CON8 0x2218
1523#define MT6357_AUDDEC_ANA_CON9 0x221a
1524#define MT6357_AUDDEC_ANA_CON10 0x221c
1525#define MT6357_AUDDEC_ANA_CON11 0x221e
1526#define MT6357_AUDDEC_ANA_CON12 0x2220
1527#define MT6357_AUDDEC_ANA_CON13 0x2222
1528#define MT6357_AUDDEC_ELR_NUM 0x2224
1529#define MT6357_AUDDEC_ELR_0 0x2226
1530#define MT6357_AUDZCD_DSN_ID 0x2280
1531#define MT6357_AUDZCD_DSN_REV0 0x2282
1532#define MT6357_AUDZCD_DSN_DBI 0x2284
1533#define MT6357_AUDZCD_DSN_FPI 0x2286
1534#define MT6357_ZCD_CON0 0x2288
1535#define MT6357_ZCD_CON1 0x228a
1536#define MT6357_ZCD_CON2 0x228c
1537#define MT6357_ZCD_CON3 0x228e
1538#define MT6357_ZCD_CON4 0x2290
1539#define MT6357_ZCD_CON5 0x2292
1540#define MT6357_ACCDET_DSN_DIG_ID 0x2300
1541#define MT6357_ACCDET_DSN_DIG_REV0 0x2302
1542#define MT6357_ACCDET_DSN_DBI 0x2304
1543#define MT6357_ACCDET_DSN_FPI 0x2306
1544#define MT6357_ACCDET_CON0 0x2308
1545#define MT6357_ACCDET_CON1 0x230a
1546#define MT6357_ACCDET_CON2 0x230c
1547#define MT6357_ACCDET_CON3 0x230e
1548#define MT6357_ACCDET_CON4 0x2310
1549#define MT6357_ACCDET_CON5 0x2312
1550#define MT6357_ACCDET_CON6 0x2314
1551#define MT6357_ACCDET_CON7 0x2316
1552#define MT6357_ACCDET_CON8 0x2318
1553#define MT6357_ACCDET_CON9 0x231a
1554#define MT6357_ACCDET_CON10 0x231c
1555#define MT6357_ACCDET_CON11 0x231e
1556#define MT6357_ACCDET_CON12 0x2320
1557#define MT6357_ACCDET_CON13 0x2322
1558#define MT6357_ACCDET_CON14 0x2324
1559#define MT6357_ACCDET_CON15 0x2326
1560#define MT6357_ACCDET_CON16 0x2328
1561#define MT6357_ACCDET_CON17 0x232a
1562#define MT6357_ACCDET_CON18 0x232c
1563#define MT6357_ACCDET_CON19 0x232e
1564#define MT6357_ACCDET_CON20 0x2330
1565#define MT6357_ACCDET_CON21 0x2332
1566#define MT6357_ACCDET_CON22 0x2334
1567#define MT6357_ACCDET_CON23 0x2336
1568#define MT6357_ACCDET_CON24 0x2338
1569#define MT6357_ACCDET_CON25 0x233a
1570#define MT6357_ACCDET_CON26 0x233c
1571#define MT6357_ACCDET_CON27 0x233e
1572#define MT6357_ACCDET_CON28 0x2340
1573
1574#endif /* __MFD_MT6357_REGISTERS_H__ */
1575

source code of linux/include/linux/mfd/mt6357/registers.h