1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* |
3 | * Copyright (c) 2014 Samsung Electronics Co., Ltd |
4 | * http://www.samsung.com |
5 | */ |
6 | |
7 | #ifndef __LINUX_MFD_S2MPS13_H |
8 | #define __LINUX_MFD_S2MPS13_H |
9 | |
10 | /* S2MPS13 registers */ |
11 | enum s2mps13_reg { |
12 | S2MPS13_REG_ID, |
13 | S2MPS13_REG_INT1, |
14 | S2MPS13_REG_INT2, |
15 | S2MPS13_REG_INT3, |
16 | S2MPS13_REG_INT1M, |
17 | S2MPS13_REG_INT2M, |
18 | S2MPS13_REG_INT3M, |
19 | S2MPS13_REG_ST1, |
20 | S2MPS13_REG_ST2, |
21 | S2MPS13_REG_PWRONSRC, |
22 | S2MPS13_REG_OFFSRC, |
23 | S2MPS13_REG_BU_CHG, |
24 | S2MPS13_REG_RTCCTRL, |
25 | S2MPS13_REG_CTRL1, |
26 | S2MPS13_REG_CTRL2, |
27 | S2MPS13_REG_RSVD1, |
28 | S2MPS13_REG_RSVD2, |
29 | S2MPS13_REG_RSVD3, |
30 | S2MPS13_REG_RSVD4, |
31 | S2MPS13_REG_RSVD5, |
32 | S2MPS13_REG_RSVD6, |
33 | S2MPS13_REG_CTRL3, |
34 | S2MPS13_REG_RSVD7, |
35 | S2MPS13_REG_RSVD8, |
36 | S2MPS13_REG_WRSTBI, |
37 | S2MPS13_REG_B1CTRL, |
38 | S2MPS13_REG_B1OUT, |
39 | S2MPS13_REG_B2CTRL, |
40 | S2MPS13_REG_B2OUT, |
41 | S2MPS13_REG_B3CTRL, |
42 | S2MPS13_REG_B3OUT, |
43 | S2MPS13_REG_B4CTRL, |
44 | S2MPS13_REG_B4OUT, |
45 | S2MPS13_REG_B5CTRL, |
46 | S2MPS13_REG_B5OUT, |
47 | S2MPS13_REG_B6CTRL, |
48 | S2MPS13_REG_B6OUT, |
49 | S2MPS13_REG_B7CTRL, |
50 | S2MPS13_REG_B7SW, |
51 | S2MPS13_REG_B7OUT, |
52 | S2MPS13_REG_B8CTRL, |
53 | S2MPS13_REG_B8OUT, |
54 | S2MPS13_REG_B9CTRL, |
55 | S2MPS13_REG_B9OUT, |
56 | S2MPS13_REG_B10CTRL, |
57 | S2MPS13_REG_B10OUT, |
58 | S2MPS13_REG_BB1CTRL, |
59 | S2MPS13_REG_BB1OUT, |
60 | S2MPS13_REG_BUCK_RAMP1, |
61 | S2MPS13_REG_BUCK_RAMP2, |
62 | S2MPS13_REG_LDO_DVS1, |
63 | S2MPS13_REG_LDO_DVS2, |
64 | S2MPS13_REG_LDO_DVS3, |
65 | S2MPS13_REG_B6OUT2, |
66 | S2MPS13_REG_L1CTRL, |
67 | S2MPS13_REG_L2CTRL, |
68 | S2MPS13_REG_L3CTRL, |
69 | S2MPS13_REG_L4CTRL, |
70 | S2MPS13_REG_L5CTRL, |
71 | S2MPS13_REG_L6CTRL, |
72 | S2MPS13_REG_L7CTRL, |
73 | S2MPS13_REG_L8CTRL, |
74 | S2MPS13_REG_L9CTRL, |
75 | S2MPS13_REG_L10CTRL, |
76 | S2MPS13_REG_L11CTRL, |
77 | S2MPS13_REG_L12CTRL, |
78 | S2MPS13_REG_L13CTRL, |
79 | S2MPS13_REG_L14CTRL, |
80 | S2MPS13_REG_L15CTRL, |
81 | S2MPS13_REG_L16CTRL, |
82 | S2MPS13_REG_L17CTRL, |
83 | S2MPS13_REG_L18CTRL, |
84 | S2MPS13_REG_L19CTRL, |
85 | S2MPS13_REG_L20CTRL, |
86 | S2MPS13_REG_L21CTRL, |
87 | S2MPS13_REG_L22CTRL, |
88 | S2MPS13_REG_L23CTRL, |
89 | S2MPS13_REG_L24CTRL, |
90 | S2MPS13_REG_L25CTRL, |
91 | S2MPS13_REG_L26CTRL, |
92 | S2MPS13_REG_L27CTRL, |
93 | S2MPS13_REG_L28CTRL, |
94 | S2MPS13_REG_L29CTRL, |
95 | S2MPS13_REG_L30CTRL, |
96 | S2MPS13_REG_L31CTRL, |
97 | S2MPS13_REG_L32CTRL, |
98 | S2MPS13_REG_L33CTRL, |
99 | S2MPS13_REG_L34CTRL, |
100 | S2MPS13_REG_L35CTRL, |
101 | S2MPS13_REG_L36CTRL, |
102 | S2MPS13_REG_L37CTRL, |
103 | S2MPS13_REG_L38CTRL, |
104 | S2MPS13_REG_L39CTRL, |
105 | S2MPS13_REG_L40CTRL, |
106 | S2MPS13_REG_LDODSCH1, |
107 | S2MPS13_REG_LDODSCH2, |
108 | S2MPS13_REG_LDODSCH3, |
109 | S2MPS13_REG_LDODSCH4, |
110 | S2MPS13_REG_LDODSCH5, |
111 | }; |
112 | |
113 | /* regulator ids */ |
114 | enum s2mps13_regulators { |
115 | S2MPS13_LDO1, |
116 | S2MPS13_LDO2, |
117 | S2MPS13_LDO3, |
118 | S2MPS13_LDO4, |
119 | S2MPS13_LDO5, |
120 | S2MPS13_LDO6, |
121 | S2MPS13_LDO7, |
122 | S2MPS13_LDO8, |
123 | S2MPS13_LDO9, |
124 | S2MPS13_LDO10, |
125 | S2MPS13_LDO11, |
126 | S2MPS13_LDO12, |
127 | S2MPS13_LDO13, |
128 | S2MPS13_LDO14, |
129 | S2MPS13_LDO15, |
130 | S2MPS13_LDO16, |
131 | S2MPS13_LDO17, |
132 | S2MPS13_LDO18, |
133 | S2MPS13_LDO19, |
134 | S2MPS13_LDO20, |
135 | S2MPS13_LDO21, |
136 | S2MPS13_LDO22, |
137 | S2MPS13_LDO23, |
138 | S2MPS13_LDO24, |
139 | S2MPS13_LDO25, |
140 | S2MPS13_LDO26, |
141 | S2MPS13_LDO27, |
142 | S2MPS13_LDO28, |
143 | S2MPS13_LDO29, |
144 | S2MPS13_LDO30, |
145 | S2MPS13_LDO31, |
146 | S2MPS13_LDO32, |
147 | S2MPS13_LDO33, |
148 | S2MPS13_LDO34, |
149 | S2MPS13_LDO35, |
150 | S2MPS13_LDO36, |
151 | S2MPS13_LDO37, |
152 | S2MPS13_LDO38, |
153 | S2MPS13_LDO39, |
154 | S2MPS13_LDO40, |
155 | S2MPS13_BUCK1, |
156 | S2MPS13_BUCK2, |
157 | S2MPS13_BUCK3, |
158 | S2MPS13_BUCK4, |
159 | S2MPS13_BUCK5, |
160 | S2MPS13_BUCK6, |
161 | S2MPS13_BUCK7, |
162 | S2MPS13_BUCK8, |
163 | S2MPS13_BUCK9, |
164 | S2MPS13_BUCK10, |
165 | |
166 | S2MPS13_REGULATOR_MAX, |
167 | }; |
168 | |
169 | /* |
170 | * Default ramp delay in uv/us. Datasheet says that ramp delay can be |
171 | * controlled however it does not specify which register is used for that. |
172 | * Let's assume that default value will be set. |
173 | */ |
174 | #define S2MPS13_BUCK_RAMP_DELAY 12500 |
175 | #define S2MPS13_REG_WRSTBI_MASK BIT(5) |
176 | |
177 | #endif /* __LINUX_MFD_S2MPS13_H */ |
178 | |