1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* |
3 | * Copyright (C) 2014 Atmel Corporation. |
4 | * |
5 | * Memory Controllers (MATRIX, EBI) - System peripherals registers. |
6 | */ |
7 | |
8 | #ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H |
9 | #define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H |
10 | |
11 | #define AT91SAM9260_MATRIX_MCFG 0x00 |
12 | #define AT91SAM9260_MATRIX_SCFG 0x40 |
13 | #define AT91SAM9260_MATRIX_PRS 0x80 |
14 | #define AT91SAM9260_MATRIX_MRCR 0x100 |
15 | #define AT91SAM9260_MATRIX_EBICSA 0x11c |
16 | |
17 | #define AT91SAM9261_MATRIX_MRCR 0x0 |
18 | #define AT91SAM9261_MATRIX_SCFG 0x4 |
19 | #define AT91SAM9261_MATRIX_TCR 0x24 |
20 | #define AT91SAM9261_MATRIX_EBICSA 0x30 |
21 | #define AT91SAM9261_MATRIX_USBPUCR 0x34 |
22 | |
23 | #define AT91SAM9263_MATRIX_MCFG 0x00 |
24 | #define AT91SAM9263_MATRIX_SCFG 0x40 |
25 | #define AT91SAM9263_MATRIX_PRS 0x80 |
26 | #define AT91SAM9263_MATRIX_MRCR 0x100 |
27 | #define AT91SAM9263_MATRIX_TCR 0x114 |
28 | #define AT91SAM9263_MATRIX_EBI0CSA 0x120 |
29 | #define AT91SAM9263_MATRIX_EBI1CSA 0x124 |
30 | |
31 | #define AT91SAM9RL_MATRIX_MCFG 0x00 |
32 | #define AT91SAM9RL_MATRIX_SCFG 0x40 |
33 | #define AT91SAM9RL_MATRIX_PRS 0x80 |
34 | #define AT91SAM9RL_MATRIX_MRCR 0x100 |
35 | #define AT91SAM9RL_MATRIX_TCR 0x114 |
36 | #define AT91SAM9RL_MATRIX_EBICSA 0x120 |
37 | |
38 | #define AT91SAM9G45_MATRIX_MCFG 0x00 |
39 | #define AT91SAM9G45_MATRIX_SCFG 0x40 |
40 | #define AT91SAM9G45_MATRIX_PRS 0x80 |
41 | #define AT91SAM9G45_MATRIX_MRCR 0x100 |
42 | #define AT91SAM9G45_MATRIX_TCR 0x110 |
43 | #define AT91SAM9G45_MATRIX_DDRMPR 0x118 |
44 | #define AT91SAM9G45_MATRIX_EBICSA 0x128 |
45 | |
46 | #define AT91SAM9N12_MATRIX_MCFG 0x00 |
47 | #define AT91SAM9N12_MATRIX_SCFG 0x40 |
48 | #define AT91SAM9N12_MATRIX_PRS 0x80 |
49 | #define AT91SAM9N12_MATRIX_MRCR 0x100 |
50 | #define AT91SAM9N12_MATRIX_EBICSA 0x118 |
51 | |
52 | #define AT91SAM9X5_MATRIX_MCFG 0x00 |
53 | #define AT91SAM9X5_MATRIX_SCFG 0x40 |
54 | #define AT91SAM9X5_MATRIX_PRS 0x80 |
55 | #define AT91SAM9X5_MATRIX_MRCR 0x100 |
56 | #define AT91SAM9X5_MATRIX_EBICSA 0x120 |
57 | |
58 | #define SAMA5D3_MATRIX_MCFG 0x00 |
59 | #define SAMA5D3_MATRIX_SCFG 0x40 |
60 | #define SAMA5D3_MATRIX_PRS 0x80 |
61 | #define SAMA5D3_MATRIX_MRCR 0x100 |
62 | |
63 | #define AT91_MATRIX_MCFG(o, x) ((o) + ((x) * 0x4)) |
64 | #define AT91_MATRIX_ULBT GENMASK(2, 0) |
65 | #define AT91_MATRIX_ULBT_INFINITE (0 << 0) |
66 | #define AT91_MATRIX_ULBT_SINGLE (1 << 0) |
67 | #define AT91_MATRIX_ULBT_FOUR (2 << 0) |
68 | #define AT91_MATRIX_ULBT_EIGHT (3 << 0) |
69 | #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) |
70 | |
71 | #define AT91_MATRIX_SCFG(o, x) ((o) + ((x) * 0x4)) |
72 | #define AT91_MATRIX_SLOT_CYCLE GENMASK(7, 0) |
73 | #define AT91_MATRIX_DEFMSTR_TYPE GENMASK(17, 16) |
74 | #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) |
75 | #define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) |
76 | #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) |
77 | #define AT91_MATRIX_FIXED_DEFMSTR GENMASK(20, 18) |
78 | #define AT91_MATRIX_ARBT GENMASK(25, 24) |
79 | #define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) |
80 | #define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) |
81 | |
82 | #define AT91_MATRIX_ITCM_SIZE GENMASK(3, 0) |
83 | #define AT91_MATRIX_ITCM_0 (0 << 0) |
84 | #define AT91_MATRIX_ITCM_16 (5 << 0) |
85 | #define AT91_MATRIX_ITCM_32 (6 << 0) |
86 | #define AT91_MATRIX_ITCM_64 (7 << 0) |
87 | #define AT91_MATRIX_DTCM_SIZE GENMASK(7, 4) |
88 | #define AT91_MATRIX_DTCM_0 (0 << 4) |
89 | #define AT91_MATRIX_DTCM_16 (5 << 4) |
90 | #define AT91_MATRIX_DTCM_32 (6 << 4) |
91 | #define AT91_MATRIX_DTCM_64 (7 << 4) |
92 | |
93 | #define AT91_MATRIX_PRAS(o, x) ((o) + ((x) * 0x8)) |
94 | #define AT91_MATRIX_PRBS(o, x) ((o) + ((x) * 0x8) + 0x4) |
95 | #define AT91_MATRIX_MPR(x) GENMASK(((x) * 0x4) + 1, ((x) * 0x4)) |
96 | |
97 | #define AT91_MATRIX_RCB(x) BIT(x) |
98 | |
99 | #define AT91_MATRIX_CSA(cs, val) (val << (cs)) |
100 | #define AT91_MATRIX_DBPUC BIT(8) |
101 | #define AT91_MATRIX_DBPDC BIT(9) |
102 | #define AT91_MATRIX_VDDIOMSEL BIT(16) |
103 | #define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) |
104 | #define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) |
105 | #define AT91_MATRIX_EBI_IOSR BIT(17) |
106 | #define AT91_MATRIX_DDR_IOSR BIT(18) |
107 | #define AT91_MATRIX_NFD0_SELECT BIT(24) |
108 | #define AT91_MATRIX_DDR_MP_EN BIT(25) |
109 | |
110 | #define AT91_MATRIX_USBPUCR_PUON BIT(30) |
111 | |
112 | #endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */ |
113 | |