1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * include/linux/micrel_phy.h |
4 | * |
5 | * Micrel PHY IDs |
6 | */ |
7 | |
8 | #ifndef _MICREL_PHY_H |
9 | #define _MICREL_PHY_H |
10 | |
11 | #define MICREL_OUI 0x0885 |
12 | |
13 | #define MICREL_PHY_ID_MASK 0x00fffff0 |
14 | |
15 | #define PHY_ID_KSZ8873MLL 0x000e7237 |
16 | #define PHY_ID_KSZ9021 0x00221610 |
17 | #define PHY_ID_KSZ9021RLRN 0x00221611 |
18 | #define PHY_ID_KS8737 0x00221720 |
19 | #define PHY_ID_KSZ8021 0x00221555 |
20 | #define PHY_ID_KSZ8031 0x00221556 |
21 | #define PHY_ID_KSZ8041 0x00221510 |
22 | /* undocumented */ |
23 | #define PHY_ID_KSZ8041RNLI 0x00221537 |
24 | #define PHY_ID_KSZ8051 0x00221550 |
25 | /* same id: ks8001 Rev. A/B, and ks8721 Rev 3. */ |
26 | #define PHY_ID_KSZ8001 0x0022161A |
27 | /* same id: KS8081, KS8091 */ |
28 | #define PHY_ID_KSZ8081 0x00221560 |
29 | #define PHY_ID_KSZ8061 0x00221570 |
30 | #define PHY_ID_KSZ9031 0x00221620 |
31 | #define PHY_ID_KSZ9131 0x00221640 |
32 | #define PHY_ID_LAN8814 0x00221660 |
33 | #define PHY_ID_LAN8804 0x00221670 |
34 | #define PHY_ID_LAN8841 0x00221650 |
35 | |
36 | #define PHY_ID_KSZ886X 0x00221430 |
37 | #define PHY_ID_KSZ8863 0x00221435 |
38 | |
39 | #define PHY_ID_KSZ87XX 0x00221550 |
40 | |
41 | #define PHY_ID_KSZ9477 0x00221631 |
42 | |
43 | /* struct phy_device dev_flags definitions */ |
44 | #define MICREL_PHY_50MHZ_CLK BIT(0) |
45 | #define MICREL_PHY_FXEN BIT(1) |
46 | #define MICREL_KSZ8_P1_ERRATA BIT(2) |
47 | #define MICREL_NO_EEE BIT(3) |
48 | |
49 | #define MICREL_KSZ9021_EXTREG_CTRL 0xB |
50 | #define MICREL_KSZ9021_EXTREG_DATA_WRITE 0xC |
51 | #define MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW 0x104 |
52 | #define MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW 0x105 |
53 | |
54 | /* Device specific MII_BMCR (Reg 0) bits */ |
55 | /* 1 = HP Auto MDI/MDI-X mode, 0 = Microchip Auto MDI/MDI-X mode */ |
56 | #define KSZ886X_BMCR_HP_MDIX BIT(5) |
57 | /* 1 = Force MDI (transmit on RXP/RXM pins), 0 = Normal operation |
58 | * (transmit on TXP/TXM pins) |
59 | */ |
60 | #define KSZ886X_BMCR_FORCE_MDI BIT(4) |
61 | /* 1 = Disable auto MDI-X */ |
62 | #define KSZ886X_BMCR_DISABLE_AUTO_MDIX BIT(3) |
63 | #define KSZ886X_BMCR_DISABLE_FAR_END_FAULT BIT(2) |
64 | #define KSZ886X_BMCR_DISABLE_TRANSMIT BIT(1) |
65 | #define KSZ886X_BMCR_DISABLE_LED BIT(0) |
66 | |
67 | /* PHY Special Control/Status Register (Reg 31) */ |
68 | #define KSZ886X_CTRL_MDIX_STAT BIT(4) |
69 | #define KSZ886X_CTRL_FORCE_LINK BIT(3) |
70 | #define KSZ886X_CTRL_PWRSAVE BIT(2) |
71 | #define KSZ886X_CTRL_REMOTE_LOOPBACK BIT(1) |
72 | |
73 | #endif /* _MICREL_PHY_H */ |
74 | |