1/*
2 * Framework and drivers for configuring and reading different PHYs
3 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
19#include <linux/compiler.h>
20#include <linux/spinlock.h>
21#include <linux/ethtool.h>
22#include <linux/linkmode.h>
23#include <linux/mdio.h>
24#include <linux/mii.h>
25#include <linux/module.h>
26#include <linux/timer.h>
27#include <linux/workqueue.h>
28#include <linux/mod_devicetable.h>
29
30#include <linux/atomic.h>
31
32#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
33 SUPPORTED_TP | \
34 SUPPORTED_MII)
35
36#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
37 SUPPORTED_10baseT_Full)
38
39#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
40 SUPPORTED_100baseT_Full)
41
42#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
43 SUPPORTED_1000baseT_Full)
44
45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
53
54#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
55#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
56#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
57#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
58#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
59#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
60#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
61#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
62
63extern const int phy_10_100_features_array[4];
64extern const int phy_basic_t1_features_array[2];
65extern const int phy_gbit_features_array[2];
66extern const int phy_10gbit_features_array[1];
67
68/*
69 * Set phydev->irq to PHY_POLL if interrupts are not supported,
70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
71 * the attached driver handles the interrupt
72 */
73#define PHY_POLL -1
74#define PHY_IGNORE_INTERRUPT -2
75
76#define PHY_IS_INTERNAL 0x00000001
77#define PHY_RST_AFTER_CLK_EN 0x00000002
78#define MDIO_DEVICE_IS_PHY 0x80000000
79
80/* Interface Mode definitions */
81typedef enum {
82 PHY_INTERFACE_MODE_NA,
83 PHY_INTERFACE_MODE_INTERNAL,
84 PHY_INTERFACE_MODE_MII,
85 PHY_INTERFACE_MODE_GMII,
86 PHY_INTERFACE_MODE_SGMII,
87 PHY_INTERFACE_MODE_TBI,
88 PHY_INTERFACE_MODE_REVMII,
89 PHY_INTERFACE_MODE_RMII,
90 PHY_INTERFACE_MODE_RGMII,
91 PHY_INTERFACE_MODE_RGMII_ID,
92 PHY_INTERFACE_MODE_RGMII_RXID,
93 PHY_INTERFACE_MODE_RGMII_TXID,
94 PHY_INTERFACE_MODE_RTBI,
95 PHY_INTERFACE_MODE_SMII,
96 PHY_INTERFACE_MODE_XGMII,
97 PHY_INTERFACE_MODE_MOCA,
98 PHY_INTERFACE_MODE_QSGMII,
99 PHY_INTERFACE_MODE_TRGMII,
100 PHY_INTERFACE_MODE_1000BASEX,
101 PHY_INTERFACE_MODE_2500BASEX,
102 PHY_INTERFACE_MODE_RXAUI,
103 PHY_INTERFACE_MODE_XAUI,
104 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
105 PHY_INTERFACE_MODE_10GKR,
106 PHY_INTERFACE_MODE_MAX,
107} phy_interface_t;
108
109/**
110 * phy_supported_speeds - return all speeds currently supported by a phy device
111 * @phy: The phy device to return supported speeds of.
112 * @speeds: buffer to store supported speeds in.
113 * @size: size of speeds buffer.
114 *
115 * Description: Returns the number of supported speeds, and fills
116 * the speeds buffer with the supported speeds. If speeds buffer is
117 * too small to contain all currently supported speeds, will return as
118 * many speeds as can fit.
119 */
120unsigned int phy_supported_speeds(struct phy_device *phy,
121 unsigned int *speeds,
122 unsigned int size);
123
124/**
125 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
126 * @interface: enum phy_interface_t value
127 *
128 * Description: maps 'enum phy_interface_t' defined in this file
129 * into the device tree binding of 'phy-mode', so that Ethernet
130 * device driver can get phy interface from device tree.
131 */
132static inline const char *phy_modes(phy_interface_t interface)
133{
134 switch (interface) {
135 case PHY_INTERFACE_MODE_NA:
136 return "";
137 case PHY_INTERFACE_MODE_INTERNAL:
138 return "internal";
139 case PHY_INTERFACE_MODE_MII:
140 return "mii";
141 case PHY_INTERFACE_MODE_GMII:
142 return "gmii";
143 case PHY_INTERFACE_MODE_SGMII:
144 return "sgmii";
145 case PHY_INTERFACE_MODE_TBI:
146 return "tbi";
147 case PHY_INTERFACE_MODE_REVMII:
148 return "rev-mii";
149 case PHY_INTERFACE_MODE_RMII:
150 return "rmii";
151 case PHY_INTERFACE_MODE_RGMII:
152 return "rgmii";
153 case PHY_INTERFACE_MODE_RGMII_ID:
154 return "rgmii-id";
155 case PHY_INTERFACE_MODE_RGMII_RXID:
156 return "rgmii-rxid";
157 case PHY_INTERFACE_MODE_RGMII_TXID:
158 return "rgmii-txid";
159 case PHY_INTERFACE_MODE_RTBI:
160 return "rtbi";
161 case PHY_INTERFACE_MODE_SMII:
162 return "smii";
163 case PHY_INTERFACE_MODE_XGMII:
164 return "xgmii";
165 case PHY_INTERFACE_MODE_MOCA:
166 return "moca";
167 case PHY_INTERFACE_MODE_QSGMII:
168 return "qsgmii";
169 case PHY_INTERFACE_MODE_TRGMII:
170 return "trgmii";
171 case PHY_INTERFACE_MODE_1000BASEX:
172 return "1000base-x";
173 case PHY_INTERFACE_MODE_2500BASEX:
174 return "2500base-x";
175 case PHY_INTERFACE_MODE_RXAUI:
176 return "rxaui";
177 case PHY_INTERFACE_MODE_XAUI:
178 return "xaui";
179 case PHY_INTERFACE_MODE_10GKR:
180 return "10gbase-kr";
181 default:
182 return "unknown";
183 }
184}
185
186
187#define PHY_INIT_TIMEOUT 100000
188#define PHY_STATE_TIME 1
189#define PHY_FORCE_TIMEOUT 10
190
191#define PHY_MAX_ADDR 32
192
193/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
194#define PHY_ID_FMT "%s:%02x"
195
196#define MII_BUS_ID_SIZE 61
197
198/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
199 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
200#define MII_ADDR_C45 (1<<30)
201
202struct device;
203struct phylink;
204struct sk_buff;
205
206/*
207 * The Bus class for PHYs. Devices which provide access to
208 * PHYs should register using this structure
209 */
210struct mii_bus {
211 struct module *owner;
212 const char *name;
213 char id[MII_BUS_ID_SIZE];
214 void *priv;
215 int (*read)(struct mii_bus *bus, int addr, int regnum);
216 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
217 int (*reset)(struct mii_bus *bus);
218
219 /*
220 * A lock to ensure that only one thing can read/write
221 * the MDIO bus at a time
222 */
223 struct mutex mdio_lock;
224
225 struct device *parent;
226 enum {
227 MDIOBUS_ALLOCATED = 1,
228 MDIOBUS_REGISTERED,
229 MDIOBUS_UNREGISTERED,
230 MDIOBUS_RELEASED,
231 } state;
232 struct device dev;
233
234 /* list of all PHYs on bus */
235 struct mdio_device *mdio_map[PHY_MAX_ADDR];
236
237 /* PHY addresses to be ignored when probing */
238 u32 phy_mask;
239
240 /* PHY addresses to ignore the TA/read failure */
241 u32 phy_ignore_ta_mask;
242
243 /*
244 * An array of interrupts, each PHY's interrupt at the index
245 * matching its address
246 */
247 int irq[PHY_MAX_ADDR];
248
249 /* GPIO reset pulse width in microseconds */
250 int reset_delay_us;
251 /* RESET GPIO descriptor pointer */
252 struct gpio_desc *reset_gpiod;
253};
254#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
255
256struct mii_bus *mdiobus_alloc_size(size_t);
257static inline struct mii_bus *mdiobus_alloc(void)
258{
259 return mdiobus_alloc_size(0);
260}
261
262int __mdiobus_register(struct mii_bus *bus, struct module *owner);
263#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
264void mdiobus_unregister(struct mii_bus *bus);
265void mdiobus_free(struct mii_bus *bus);
266struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
267static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
268{
269 return devm_mdiobus_alloc_size(dev, 0);
270}
271
272void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
273struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
274
275#define PHY_INTERRUPT_DISABLED false
276#define PHY_INTERRUPT_ENABLED true
277
278/* PHY state machine states:
279 *
280 * DOWN: PHY device and driver are not ready for anything. probe
281 * should be called if and only if the PHY is in this state,
282 * given that the PHY device exists.
283 * - PHY driver probe function will set the state to READY
284 *
285 * READY: PHY is ready to send and receive packets, but the
286 * controller is not. By default, PHYs which do not implement
287 * probe will be set to this state by phy_probe().
288 * - start will set the state to UP
289 *
290 * UP: The PHY and attached device are ready to do work.
291 * Interrupts should be started here.
292 * - timer moves to NOLINK or RUNNING
293 *
294 * NOLINK: PHY is up, but not currently plugged in.
295 * - irq or timer will set RUNNING if link comes back
296 * - phy_stop moves to HALTED
297 *
298 * FORCING: PHY is being configured with forced settings
299 * - if link is up, move to RUNNING
300 * - If link is down, we drop to the next highest setting, and
301 * retry (FORCING) after a timeout
302 * - phy_stop moves to HALTED
303 *
304 * RUNNING: PHY is currently up, running, and possibly sending
305 * and/or receiving packets
306 * - irq or timer will set NOLINK if link goes down
307 * - phy_stop moves to HALTED
308 *
309 * HALTED: PHY is up, but no polling or interrupts are done. Or
310 * PHY is in an error state.
311 *
312 * - phy_start moves to RESUMING
313 *
314 * RESUMING: PHY was halted, but now wants to run again.
315 * - If we are forcing, or aneg is done, timer moves to RUNNING
316 * - If aneg is not done, timer moves to AN
317 * - phy_stop moves to HALTED
318 */
319enum phy_state {
320 PHY_DOWN = 0,
321 PHY_READY,
322 PHY_HALTED,
323 PHY_UP,
324 PHY_RUNNING,
325 PHY_NOLINK,
326 PHY_FORCING,
327 PHY_RESUMING
328};
329
330/**
331 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
332 * @devices_in_package: Bit vector of devices present.
333 * @device_ids: The device identifer for each present device.
334 */
335struct phy_c45_device_ids {
336 u32 devices_in_package;
337 u32 device_ids[8];
338};
339
340/* phy_device: An instance of a PHY
341 *
342 * drv: Pointer to the driver for this PHY instance
343 * phy_id: UID for this device found during discovery
344 * c45_ids: 802.3-c45 Device Identifers if is_c45.
345 * is_c45: Set to true if this phy uses clause 45 addressing.
346 * is_internal: Set to true if this phy is internal to a MAC.
347 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
348 * has_fixups: Set to true if this phy has fixups/quirks.
349 * suspended: Set to true if this phy has been suspended successfully.
350 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
351 * loopback_enabled: Set true if this phy has been loopbacked successfully.
352 * state: state of the PHY for management purposes
353 * dev_flags: Device-specific flags used by the PHY driver.
354 * link_timeout: The number of timer firings to wait before the
355 * giving up on the current attempt at acquiring a link
356 * irq: IRQ number of the PHY's interrupt (-1 if none)
357 * phy_timer: The timer for handling the state machine
358 * attached_dev: The attached enet driver's device instance ptr
359 * adjust_link: Callback for the enet controller to respond to
360 * changes in the link state.
361 *
362 * speed, duplex, pause, supported, advertising, lp_advertising,
363 * and autoneg are used like in mii_if_info
364 *
365 * interrupts currently only supports enabled or disabled,
366 * but could be changed in the future to support enabling
367 * and disabling specific interrupts
368 *
369 * Contains some infrastructure for polling and interrupt
370 * handling, as well as handling shifts in PHY hardware state
371 */
372struct phy_device {
373 struct mdio_device mdio;
374
375 /* Information about the PHY type */
376 /* And management functions */
377 struct phy_driver *drv;
378
379 u32 phy_id;
380
381 struct phy_c45_device_ids c45_ids;
382 unsigned is_c45:1;
383 unsigned is_internal:1;
384 unsigned is_pseudo_fixed_link:1;
385 unsigned has_fixups:1;
386 unsigned suspended:1;
387 unsigned sysfs_links:1;
388 unsigned loopback_enabled:1;
389
390 unsigned autoneg:1;
391 /* The most recently read link state */
392 unsigned link:1;
393
394 /* Interrupts are enabled */
395 unsigned interrupts:1;
396
397 enum phy_state state;
398
399 u32 dev_flags;
400
401 phy_interface_t interface;
402
403 /*
404 * forced speed & duplex (no autoneg)
405 * partner speed & duplex & pause (autoneg)
406 */
407 int speed;
408 int duplex;
409 int pause;
410 int asym_pause;
411
412 /* Union of PHY and Attached devices' supported link modes */
413 /* See ethtool.h for more info */
414 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
415 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
416 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
417
418 /* Energy efficient ethernet modes which should be prohibited */
419 u32 eee_broken_modes;
420
421 int link_timeout;
422
423#ifdef CONFIG_LED_TRIGGER_PHY
424 struct phy_led_trigger *phy_led_triggers;
425 unsigned int phy_num_led_triggers;
426 struct phy_led_trigger *last_triggered;
427
428 struct phy_led_trigger *led_link_trigger;
429#endif
430
431 /*
432 * Interrupt number for this PHY
433 * -1 means no interrupt
434 */
435 int irq;
436
437 /* private data pointer */
438 /* For use by PHYs to maintain extra state */
439 void *priv;
440
441 /* Interrupt and Polling infrastructure */
442 struct delayed_work state_queue;
443
444 struct mutex lock;
445
446 struct phylink *phylink;
447 struct net_device *attached_dev;
448
449 u8 mdix;
450 u8 mdix_ctrl;
451
452 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
453 void (*adjust_link)(struct net_device *dev);
454};
455#define to_phy_device(d) container_of(to_mdio_device(d), \
456 struct phy_device, mdio)
457
458/* struct phy_driver: Driver structure for a particular PHY type
459 *
460 * driver_data: static driver data
461 * phy_id: The result of reading the UID registers of this PHY
462 * type, and ANDing them with the phy_id_mask. This driver
463 * only works for PHYs with IDs which match this field
464 * name: The friendly name of this PHY type
465 * phy_id_mask: Defines the important bits of the phy_id
466 * features: A mandatory list of features (speed, duplex, etc)
467 * supported by this PHY
468 * flags: A bitfield defining certain other features this PHY
469 * supports (like interrupts)
470 *
471 * All functions are optional. If config_aneg or read_status
472 * are not implemented, the phy core uses the genphy versions.
473 * Note that none of these functions should be called from
474 * interrupt time. The goal is for the bus read/write functions
475 * to be able to block when the bus transaction is happening,
476 * and be freed up by an interrupt (The MPC85xx has this ability,
477 * though it is not currently supported in the driver).
478 */
479struct phy_driver {
480 struct mdio_driver_common mdiodrv;
481 u32 phy_id;
482 char *name;
483 u32 phy_id_mask;
484 const unsigned long * const features;
485 u32 flags;
486 const void *driver_data;
487
488 /*
489 * Called to issue a PHY software reset
490 */
491 int (*soft_reset)(struct phy_device *phydev);
492
493 /*
494 * Called to initialize the PHY,
495 * including after a reset
496 */
497 int (*config_init)(struct phy_device *phydev);
498
499 /*
500 * Called during discovery. Used to set
501 * up device-specific structures, if any
502 */
503 int (*probe)(struct phy_device *phydev);
504
505 /*
506 * Probe the hardware to determine what abilities it has.
507 * Should only set phydev->supported.
508 */
509 int (*get_features)(struct phy_device *phydev);
510
511 /* PHY Power Management */
512 int (*suspend)(struct phy_device *phydev);
513 int (*resume)(struct phy_device *phydev);
514
515 /*
516 * Configures the advertisement and resets
517 * autonegotiation if phydev->autoneg is on,
518 * forces the speed to the current settings in phydev
519 * if phydev->autoneg is off
520 */
521 int (*config_aneg)(struct phy_device *phydev);
522
523 /* Determines the auto negotiation result */
524 int (*aneg_done)(struct phy_device *phydev);
525
526 /* Determines the negotiated speed and duplex */
527 int (*read_status)(struct phy_device *phydev);
528
529 /* Clears any pending interrupts */
530 int (*ack_interrupt)(struct phy_device *phydev);
531
532 /* Enables or disables interrupts */
533 int (*config_intr)(struct phy_device *phydev);
534
535 /*
536 * Checks if the PHY generated an interrupt.
537 * For multi-PHY devices with shared PHY interrupt pin
538 */
539 int (*did_interrupt)(struct phy_device *phydev);
540
541 /* Clears up any memory if needed */
542 void (*remove)(struct phy_device *phydev);
543
544 /* Returns true if this is a suitable driver for the given
545 * phydev. If NULL, matching is based on phy_id and
546 * phy_id_mask.
547 */
548 int (*match_phy_device)(struct phy_device *phydev);
549
550 /* Handles ethtool queries for hardware time stamping. */
551 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
552
553 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
554 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
555
556 /*
557 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
558 * the phy driver promises to deliver it using netif_rx() as
559 * soon as a timestamp becomes available. One of the
560 * PTP_CLASS_ values is passed in 'type'. The function must
561 * return true if the skb is accepted for delivery.
562 */
563 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
564
565 /*
566 * Requests a Tx timestamp for 'skb'. The phy driver promises
567 * to deliver it using skb_complete_tx_timestamp() as soon as a
568 * timestamp becomes available. One of the PTP_CLASS_ values
569 * is passed in 'type'.
570 */
571 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
572
573 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
574 * enable Wake on LAN, so set_wol is provided to be called in the
575 * ethernet driver's set_wol function. */
576 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
577
578 /* See set_wol, but for checking whether Wake on LAN is enabled. */
579 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
580
581 /*
582 * Called to inform a PHY device driver when the core is about to
583 * change the link state. This callback is supposed to be used as
584 * fixup hook for drivers that need to take action when the link
585 * state changes. Drivers are by no means allowed to mess with the
586 * PHY device structure in their implementations.
587 */
588 void (*link_change_notify)(struct phy_device *dev);
589
590 /*
591 * Phy specific driver override for reading a MMD register.
592 * This function is optional for PHY specific drivers. When
593 * not provided, the default MMD read function will be used
594 * by phy_read_mmd(), which will use either a direct read for
595 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
596 * devnum is the MMD device number within the PHY device,
597 * regnum is the register within the selected MMD device.
598 */
599 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
600
601 /*
602 * Phy specific driver override for writing a MMD register.
603 * This function is optional for PHY specific drivers. When
604 * not provided, the default MMD write function will be used
605 * by phy_write_mmd(), which will use either a direct write for
606 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
607 * devnum is the MMD device number within the PHY device,
608 * regnum is the register within the selected MMD device.
609 * val is the value to be written.
610 */
611 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
612 u16 val);
613
614 int (*read_page)(struct phy_device *dev);
615 int (*write_page)(struct phy_device *dev, int page);
616
617 /* Get the size and type of the eeprom contained within a plug-in
618 * module */
619 int (*module_info)(struct phy_device *dev,
620 struct ethtool_modinfo *modinfo);
621
622 /* Get the eeprom information from the plug-in module */
623 int (*module_eeprom)(struct phy_device *dev,
624 struct ethtool_eeprom *ee, u8 *data);
625
626 /* Get statistics from the phy using ethtool */
627 int (*get_sset_count)(struct phy_device *dev);
628 void (*get_strings)(struct phy_device *dev, u8 *data);
629 void (*get_stats)(struct phy_device *dev,
630 struct ethtool_stats *stats, u64 *data);
631
632 /* Get and Set PHY tunables */
633 int (*get_tunable)(struct phy_device *dev,
634 struct ethtool_tunable *tuna, void *data);
635 int (*set_tunable)(struct phy_device *dev,
636 struct ethtool_tunable *tuna,
637 const void *data);
638 int (*set_loopback)(struct phy_device *dev, bool enable);
639};
640#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
641 struct phy_driver, mdiodrv)
642
643#define PHY_ANY_ID "MATCH ANY PHY"
644#define PHY_ANY_UID 0xffffffff
645
646#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
647#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
648#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
649
650/* A Structure for boards to register fixups with the PHY Lib */
651struct phy_fixup {
652 struct list_head list;
653 char bus_id[MII_BUS_ID_SIZE + 3];
654 u32 phy_uid;
655 u32 phy_uid_mask;
656 int (*run)(struct phy_device *phydev);
657};
658
659const char *phy_speed_to_str(int speed);
660const char *phy_duplex_to_str(unsigned int duplex);
661
662/* A structure for mapping a particular speed and duplex
663 * combination to a particular SUPPORTED and ADVERTISED value
664 */
665struct phy_setting {
666 u32 speed;
667 u8 duplex;
668 u8 bit;
669};
670
671const struct phy_setting *
672phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
673 bool exact);
674size_t phy_speeds(unsigned int *speeds, size_t size,
675 unsigned long *mask);
676void of_set_phy_supported(struct phy_device *phydev);
677void of_set_phy_eee_broken(struct phy_device *phydev);
678
679/**
680 * phy_is_started - Convenience function to check whether PHY is started
681 * @phydev: The phy_device struct
682 */
683static inline bool phy_is_started(struct phy_device *phydev)
684{
685 return phydev->state >= PHY_UP;
686}
687
688void phy_resolve_aneg_linkmode(struct phy_device *phydev);
689
690/**
691 * phy_read - Convenience function for reading a given PHY register
692 * @phydev: the phy_device struct
693 * @regnum: register number to read
694 *
695 * NOTE: MUST NOT be called from interrupt context,
696 * because the bus read/write functions may wait for an interrupt
697 * to conclude the operation.
698 */
699static inline int phy_read(struct phy_device *phydev, u32 regnum)
700{
701 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
702}
703
704/**
705 * __phy_read - convenience function for reading a given PHY register
706 * @phydev: the phy_device struct
707 * @regnum: register number to read
708 *
709 * The caller must have taken the MDIO bus lock.
710 */
711static inline int __phy_read(struct phy_device *phydev, u32 regnum)
712{
713 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
714}
715
716/**
717 * phy_write - Convenience function for writing a given PHY register
718 * @phydev: the phy_device struct
719 * @regnum: register number to write
720 * @val: value to write to @regnum
721 *
722 * NOTE: MUST NOT be called from interrupt context,
723 * because the bus read/write functions may wait for an interrupt
724 * to conclude the operation.
725 */
726static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
727{
728 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
729}
730
731/**
732 * __phy_write - Convenience function for writing a given PHY register
733 * @phydev: the phy_device struct
734 * @regnum: register number to write
735 * @val: value to write to @regnum
736 *
737 * The caller must have taken the MDIO bus lock.
738 */
739static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
740{
741 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
742 val);
743}
744
745/**
746 * phy_read_mmd - Convenience function for reading a register
747 * from an MMD on a given PHY.
748 * @phydev: The phy_device struct
749 * @devad: The MMD to read from
750 * @regnum: The register on the MMD to read
751 *
752 * Same rules as for phy_read();
753 */
754int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
755
756/**
757 * __phy_read_mmd - Convenience function for reading a register
758 * from an MMD on a given PHY.
759 * @phydev: The phy_device struct
760 * @devad: The MMD to read from
761 * @regnum: The register on the MMD to read
762 *
763 * Same rules as for __phy_read();
764 */
765int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
766
767/**
768 * phy_write_mmd - Convenience function for writing a register
769 * on an MMD on a given PHY.
770 * @phydev: The phy_device struct
771 * @devad: The MMD to write to
772 * @regnum: The register on the MMD to read
773 * @val: value to write to @regnum
774 *
775 * Same rules as for phy_write();
776 */
777int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
778
779/**
780 * __phy_write_mmd - Convenience function for writing a register
781 * on an MMD on a given PHY.
782 * @phydev: The phy_device struct
783 * @devad: The MMD to write to
784 * @regnum: The register on the MMD to read
785 * @val: value to write to @regnum
786 *
787 * Same rules as for __phy_write();
788 */
789int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
790
791int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
792 u16 set);
793int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
794 u16 set);
795int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
796int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
797
798int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
799 u16 mask, u16 set);
800int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
801 u16 mask, u16 set);
802int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
803 u16 mask, u16 set);
804int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
805 u16 mask, u16 set);
806
807/**
808 * __phy_set_bits - Convenience function for setting bits in a PHY register
809 * @phydev: the phy_device struct
810 * @regnum: register number to write
811 * @val: bits to set
812 *
813 * The caller must have taken the MDIO bus lock.
814 */
815static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
816{
817 return __phy_modify(phydev, regnum, 0, val);
818}
819
820/**
821 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
822 * @phydev: the phy_device struct
823 * @regnum: register number to write
824 * @val: bits to clear
825 *
826 * The caller must have taken the MDIO bus lock.
827 */
828static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
829 u16 val)
830{
831 return __phy_modify(phydev, regnum, val, 0);
832}
833
834/**
835 * phy_set_bits - Convenience function for setting bits in a PHY register
836 * @phydev: the phy_device struct
837 * @regnum: register number to write
838 * @val: bits to set
839 */
840static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
841{
842 return phy_modify(phydev, regnum, 0, val);
843}
844
845/**
846 * phy_clear_bits - Convenience function for clearing bits in a PHY register
847 * @phydev: the phy_device struct
848 * @regnum: register number to write
849 * @val: bits to clear
850 */
851static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
852{
853 return phy_modify(phydev, regnum, val, 0);
854}
855
856/**
857 * __phy_set_bits_mmd - Convenience function for setting bits in a register
858 * on MMD
859 * @phydev: the phy_device struct
860 * @devad: the MMD containing register to modify
861 * @regnum: register number to modify
862 * @val: bits to set
863 *
864 * The caller must have taken the MDIO bus lock.
865 */
866static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
867 u32 regnum, u16 val)
868{
869 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
870}
871
872/**
873 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
874 * on MMD
875 * @phydev: the phy_device struct
876 * @devad: the MMD containing register to modify
877 * @regnum: register number to modify
878 * @val: bits to clear
879 *
880 * The caller must have taken the MDIO bus lock.
881 */
882static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
883 u32 regnum, u16 val)
884{
885 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
886}
887
888/**
889 * phy_set_bits_mmd - Convenience function for setting bits in a register
890 * on MMD
891 * @phydev: the phy_device struct
892 * @devad: the MMD containing register to modify
893 * @regnum: register number to modify
894 * @val: bits to set
895 */
896static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
897 u32 regnum, u16 val)
898{
899 return phy_modify_mmd(phydev, devad, regnum, 0, val);
900}
901
902/**
903 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
904 * on MMD
905 * @phydev: the phy_device struct
906 * @devad: the MMD containing register to modify
907 * @regnum: register number to modify
908 * @val: bits to clear
909 */
910static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
911 u32 regnum, u16 val)
912{
913 return phy_modify_mmd(phydev, devad, regnum, val, 0);
914}
915
916/**
917 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
918 * @phydev: the phy_device struct
919 *
920 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
921 * PHY_IGNORE_INTERRUPT
922 */
923static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
924{
925 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
926}
927
928/**
929 * phy_polling_mode - Convenience function for testing whether polling is
930 * used to detect PHY status changes
931 * @phydev: the phy_device struct
932 */
933static inline bool phy_polling_mode(struct phy_device *phydev)
934{
935 return phydev->irq == PHY_POLL;
936}
937
938/**
939 * phy_is_internal - Convenience function for testing if a PHY is internal
940 * @phydev: the phy_device struct
941 */
942static inline bool phy_is_internal(struct phy_device *phydev)
943{
944 return phydev->is_internal;
945}
946
947/**
948 * phy_interface_mode_is_rgmii - Convenience function for testing if a
949 * PHY interface mode is RGMII (all variants)
950 * @mode: the phy_interface_t enum
951 */
952static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
953{
954 return mode >= PHY_INTERFACE_MODE_RGMII &&
955 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
956};
957
958/**
959 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
960 * negotiation
961 * @mode: one of &enum phy_interface_t
962 *
963 * Returns true if the phy interface mode uses the 16-bit negotiation
964 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
965 */
966static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
967{
968 return mode == PHY_INTERFACE_MODE_1000BASEX ||
969 mode == PHY_INTERFACE_MODE_2500BASEX;
970}
971
972/**
973 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
974 * is RGMII (all variants)
975 * @phydev: the phy_device struct
976 */
977static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
978{
979 return phy_interface_mode_is_rgmii(phydev->interface);
980};
981
982/*
983 * phy_is_pseudo_fixed_link - Convenience function for testing if this
984 * PHY is the CPU port facing side of an Ethernet switch, or similar.
985 * @phydev: the phy_device struct
986 */
987static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
988{
989 return phydev->is_pseudo_fixed_link;
990}
991
992int phy_save_page(struct phy_device *phydev);
993int phy_select_page(struct phy_device *phydev, int page);
994int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
995int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
996int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
997int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
998 u16 mask, u16 set);
999
1000struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
1001 bool is_c45,
1002 struct phy_c45_device_ids *c45_ids);
1003#if IS_ENABLED(CONFIG_PHYLIB)
1004struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1005int phy_device_register(struct phy_device *phy);
1006void phy_device_free(struct phy_device *phydev);
1007#else
1008static inline
1009struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1010{
1011 return NULL;
1012}
1013
1014static inline int phy_device_register(struct phy_device *phy)
1015{
1016 return 0;
1017}
1018
1019static inline void phy_device_free(struct phy_device *phydev) { }
1020#endif /* CONFIG_PHYLIB */
1021void phy_device_remove(struct phy_device *phydev);
1022int phy_init_hw(struct phy_device *phydev);
1023int phy_suspend(struct phy_device *phydev);
1024int phy_resume(struct phy_device *phydev);
1025int __phy_resume(struct phy_device *phydev);
1026int phy_loopback(struct phy_device *phydev, bool enable);
1027struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1028 phy_interface_t interface);
1029struct phy_device *phy_find_first(struct mii_bus *bus);
1030int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1031 u32 flags, phy_interface_t interface);
1032int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1033 void (*handler)(struct net_device *),
1034 phy_interface_t interface);
1035struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1036 void (*handler)(struct net_device *),
1037 phy_interface_t interface);
1038void phy_disconnect(struct phy_device *phydev);
1039void phy_detach(struct phy_device *phydev);
1040void phy_start(struct phy_device *phydev);
1041void phy_stop(struct phy_device *phydev);
1042int phy_start_aneg(struct phy_device *phydev);
1043int phy_aneg_done(struct phy_device *phydev);
1044int phy_speed_down(struct phy_device *phydev, bool sync);
1045int phy_speed_up(struct phy_device *phydev);
1046
1047int phy_restart_aneg(struct phy_device *phydev);
1048int phy_reset_after_clk_enable(struct phy_device *phydev);
1049
1050static inline void phy_device_reset(struct phy_device *phydev, int value)
1051{
1052 mdio_device_reset(&phydev->mdio, value);
1053}
1054
1055#define phydev_err(_phydev, format, args...) \
1056 dev_err(&_phydev->mdio.dev, format, ##args)
1057
1058#define phydev_info(_phydev, format, args...) \
1059 dev_info(&_phydev->mdio.dev, format, ##args)
1060
1061#define phydev_warn(_phydev, format, args...) \
1062 dev_warn(&_phydev->mdio.dev, format, ##args)
1063
1064#define phydev_dbg(_phydev, format, args...) \
1065 dev_dbg(&_phydev->mdio.dev, format, ##args)
1066
1067static inline const char *phydev_name(const struct phy_device *phydev)
1068{
1069 return dev_name(&phydev->mdio.dev);
1070}
1071
1072void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1073 __printf(2, 3);
1074void phy_attached_info(struct phy_device *phydev);
1075
1076/* Clause 22 PHY */
1077int genphy_config_init(struct phy_device *phydev);
1078int genphy_setup_forced(struct phy_device *phydev);
1079int genphy_restart_aneg(struct phy_device *phydev);
1080int genphy_config_eee_advert(struct phy_device *phydev);
1081int genphy_config_aneg(struct phy_device *phydev);
1082int genphy_aneg_done(struct phy_device *phydev);
1083int genphy_update_link(struct phy_device *phydev);
1084int genphy_read_status(struct phy_device *phydev);
1085int genphy_suspend(struct phy_device *phydev);
1086int genphy_resume(struct phy_device *phydev);
1087int genphy_loopback(struct phy_device *phydev, bool enable);
1088int genphy_soft_reset(struct phy_device *phydev);
1089static inline int genphy_no_soft_reset(struct phy_device *phydev)
1090{
1091 return 0;
1092}
1093static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1094{
1095 return 0;
1096}
1097static inline int genphy_no_config_intr(struct phy_device *phydev)
1098{
1099 return 0;
1100}
1101int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1102 u16 regnum);
1103int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1104 u16 regnum, u16 val);
1105
1106/* Clause 45 PHY */
1107int genphy_c45_restart_aneg(struct phy_device *phydev);
1108int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1109int genphy_c45_aneg_done(struct phy_device *phydev);
1110int genphy_c45_read_link(struct phy_device *phydev);
1111int genphy_c45_read_lpa(struct phy_device *phydev);
1112int genphy_c45_read_pma(struct phy_device *phydev);
1113int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1114int genphy_c45_an_config_aneg(struct phy_device *phydev);
1115int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1116int genphy_c45_read_mdix(struct phy_device *phydev);
1117int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1118int genphy_c45_read_status(struct phy_device *phydev);
1119
1120/* The gen10g_* functions are the old Clause 45 stub */
1121int gen10g_config_aneg(struct phy_device *phydev);
1122
1123static inline int phy_read_status(struct phy_device *phydev)
1124{
1125 if (!phydev->drv)
1126 return -EIO;
1127
1128 if (phydev->drv->read_status)
1129 return phydev->drv->read_status(phydev);
1130 else
1131 return genphy_read_status(phydev);
1132}
1133
1134void phy_driver_unregister(struct phy_driver *drv);
1135void phy_drivers_unregister(struct phy_driver *drv, int n);
1136int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1137int phy_drivers_register(struct phy_driver *new_driver, int n,
1138 struct module *owner);
1139void phy_state_machine(struct work_struct *work);
1140void phy_mac_interrupt(struct phy_device *phydev);
1141void phy_start_machine(struct phy_device *phydev);
1142void phy_stop_machine(struct phy_device *phydev);
1143int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
1144void phy_ethtool_ksettings_get(struct phy_device *phydev,
1145 struct ethtool_link_ksettings *cmd);
1146int phy_ethtool_ksettings_set(struct phy_device *phydev,
1147 const struct ethtool_link_ksettings *cmd);
1148int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1149void phy_request_interrupt(struct phy_device *phydev);
1150void phy_print_status(struct phy_device *phydev);
1151int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1152void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1153void phy_support_sym_pause(struct phy_device *phydev);
1154void phy_support_asym_pause(struct phy_device *phydev);
1155void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1156 bool autoneg);
1157void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1158bool phy_validate_pause(struct phy_device *phydev,
1159 struct ethtool_pauseparam *pp);
1160
1161int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1162 int (*run)(struct phy_device *));
1163int phy_register_fixup_for_id(const char *bus_id,
1164 int (*run)(struct phy_device *));
1165int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1166 int (*run)(struct phy_device *));
1167
1168int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1169int phy_unregister_fixup_for_id(const char *bus_id);
1170int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1171
1172int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1173int phy_get_eee_err(struct phy_device *phydev);
1174int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1175int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1176int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1177void phy_ethtool_get_wol(struct phy_device *phydev,
1178 struct ethtool_wolinfo *wol);
1179int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1180 struct ethtool_link_ksettings *cmd);
1181int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1182 const struct ethtool_link_ksettings *cmd);
1183int phy_ethtool_nway_reset(struct net_device *ndev);
1184
1185#if IS_ENABLED(CONFIG_PHYLIB)
1186int __init mdio_bus_init(void);
1187void mdio_bus_exit(void);
1188#endif
1189
1190/* Inline function for use within net/core/ethtool.c (built-in) */
1191static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
1192{
1193 if (!phydev->drv)
1194 return -EIO;
1195
1196 mutex_lock(&phydev->lock);
1197 phydev->drv->get_strings(phydev, data);
1198 mutex_unlock(&phydev->lock);
1199
1200 return 0;
1201}
1202
1203static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
1204{
1205 int ret;
1206
1207 if (!phydev->drv)
1208 return -EIO;
1209
1210 if (phydev->drv->get_sset_count &&
1211 phydev->drv->get_strings &&
1212 phydev->drv->get_stats) {
1213 mutex_lock(&phydev->lock);
1214 ret = phydev->drv->get_sset_count(phydev);
1215 mutex_unlock(&phydev->lock);
1216
1217 return ret;
1218 }
1219
1220 return -EOPNOTSUPP;
1221}
1222
1223static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1224 struct ethtool_stats *stats, u64 *data)
1225{
1226 if (!phydev->drv)
1227 return -EIO;
1228
1229 mutex_lock(&phydev->lock);
1230 phydev->drv->get_stats(phydev, stats, data);
1231 mutex_unlock(&phydev->lock);
1232
1233 return 0;
1234}
1235
1236extern struct bus_type mdio_bus_type;
1237
1238struct mdio_board_info {
1239 const char *bus_id;
1240 char modalias[MDIO_NAME_SIZE];
1241 int mdio_addr;
1242 const void *platform_data;
1243};
1244
1245#if IS_ENABLED(CONFIG_MDIO_DEVICE)
1246int mdiobus_register_board_info(const struct mdio_board_info *info,
1247 unsigned int n);
1248#else
1249static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1250 unsigned int n)
1251{
1252 return 0;
1253}
1254#endif
1255
1256
1257/**
1258 * module_phy_driver() - Helper macro for registering PHY drivers
1259 * @__phy_drivers: array of PHY drivers to register
1260 *
1261 * Helper macro for PHY drivers which do not do anything special in module
1262 * init/exit. Each module may only use this macro once, and calling it
1263 * replaces module_init() and module_exit().
1264 */
1265#define phy_module_driver(__phy_drivers, __count) \
1266static int __init phy_module_init(void) \
1267{ \
1268 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1269} \
1270module_init(phy_module_init); \
1271static void __exit phy_module_exit(void) \
1272{ \
1273 phy_drivers_unregister(__phy_drivers, __count); \
1274} \
1275module_exit(phy_module_exit)
1276
1277#define module_phy_driver(__phy_drivers) \
1278 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1279
1280bool phy_driver_is_genphy(struct phy_device *phydev);
1281bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1282
1283#endif /* __PHY_H */
1284