1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * Host communication command constants for ChromeOS EC |
4 | * |
5 | * Copyright (C) 2012 Google, Inc |
6 | * |
7 | * NOTE: This file is auto-generated from ChromeOS EC Open Source code from |
8 | * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h |
9 | */ |
10 | |
11 | /* Host communication command constants for Chrome EC */ |
12 | |
13 | #ifndef __CROS_EC_COMMANDS_H |
14 | #define __CROS_EC_COMMANDS_H |
15 | |
16 | #include <linux/bits.h> |
17 | #include <linux/types.h> |
18 | |
19 | #define BUILD_ASSERT(_cond) |
20 | |
21 | /* |
22 | * Current version of this protocol |
23 | * |
24 | * TODO(crosbug.com/p/11223): This is effectively useless; protocol is |
25 | * determined in other ways. Remove this once the kernel code no longer |
26 | * depends on it. |
27 | */ |
28 | #define EC_PROTO_VERSION 0x00000002 |
29 | |
30 | /* Command version mask */ |
31 | #define EC_VER_MASK(version) BIT(version) |
32 | |
33 | /* I/O addresses for ACPI commands */ |
34 | #define EC_LPC_ADDR_ACPI_DATA 0x62 |
35 | #define EC_LPC_ADDR_ACPI_CMD 0x66 |
36 | |
37 | /* I/O addresses for host command */ |
38 | #define EC_LPC_ADDR_HOST_DATA 0x200 |
39 | #define EC_LPC_ADDR_HOST_CMD 0x204 |
40 | |
41 | /* I/O addresses for host command args and params */ |
42 | /* Protocol version 2 */ |
43 | #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ |
44 | #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is |
45 | * EC_PROTO2_MAX_PARAM_SIZE |
46 | */ |
47 | /* Protocol version 3 */ |
48 | #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ |
49 | #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ |
50 | |
51 | /* |
52 | * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff |
53 | * and they tell the kernel that so we have to think of it as two parts. |
54 | * |
55 | * Other BIOSes report only the I/O port region spanned by the Microchip |
56 | * MEC series EC; an attempt to address a larger region may fail. |
57 | */ |
58 | #define EC_HOST_CMD_REGION0 0x800 |
59 | #define EC_HOST_CMD_REGION1 0x880 |
60 | #define EC_HOST_CMD_REGION_SIZE 0x80 |
61 | #define EC_HOST_CMD_MEC_REGION_SIZE 0x8 |
62 | |
63 | /* EC command register bit functions */ |
64 | #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ |
65 | #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ |
66 | #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ |
67 | #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ |
68 | #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ |
69 | #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ |
70 | #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ |
71 | |
72 | #define EC_LPC_ADDR_MEMMAP 0x900 |
73 | #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ |
74 | #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ |
75 | |
76 | /* The offset address of each type of data in mapped memory. */ |
77 | #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ |
78 | #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ |
79 | #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ |
80 | #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ |
81 | #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ |
82 | #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ |
83 | #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ |
84 | #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ |
85 | #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ |
86 | #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ |
87 | /* Unused 0x28 - 0x2f */ |
88 | #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ |
89 | /* Unused 0x31 - 0x33 */ |
90 | #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ |
91 | /* Battery values are all 32 bits, unless otherwise noted. */ |
92 | #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ |
93 | #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ |
94 | #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ |
95 | #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ |
96 | #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ |
97 | #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ |
98 | /* Unused 0x4f */ |
99 | #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ |
100 | #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ |
101 | #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ |
102 | #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ |
103 | /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ |
104 | #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ |
105 | #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ |
106 | #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ |
107 | #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ |
108 | #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ |
109 | /* Unused 0x84 - 0x8f */ |
110 | #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ |
111 | /* Unused 0x91 */ |
112 | #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ |
113 | /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ |
114 | /* 0x94 - 0x99: 1st Accelerometer */ |
115 | /* 0x9a - 0x9f: 2nd Accelerometer */ |
116 | #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ |
117 | /* Unused 0xa6 - 0xdf */ |
118 | |
119 | /* |
120 | * ACPI is unable to access memory mapped data at or above this offset due to |
121 | * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe |
122 | * which might be needed by ACPI. |
123 | */ |
124 | #define EC_MEMMAP_NO_ACPI 0xe0 |
125 | |
126 | /* Define the format of the accelerometer mapped memory status byte. */ |
127 | #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f |
128 | #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) |
129 | #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) |
130 | |
131 | /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ |
132 | #define EC_TEMP_SENSOR_ENTRIES 16 |
133 | /* |
134 | * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. |
135 | * |
136 | * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. |
137 | */ |
138 | #define EC_TEMP_SENSOR_B_ENTRIES 8 |
139 | |
140 | /* Special values for mapped temperature sensors */ |
141 | #define EC_TEMP_SENSOR_NOT_PRESENT 0xff |
142 | #define EC_TEMP_SENSOR_ERROR 0xfe |
143 | #define EC_TEMP_SENSOR_NOT_POWERED 0xfd |
144 | #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc |
145 | /* |
146 | * The offset of temperature value stored in mapped memory. This allows |
147 | * reporting a temperature range of 200K to 454K = -73C to 181C. |
148 | */ |
149 | #define EC_TEMP_SENSOR_OFFSET 200 |
150 | |
151 | /* |
152 | * Number of ALS readings at EC_MEMMAP_ALS |
153 | */ |
154 | #define EC_ALS_ENTRIES 2 |
155 | |
156 | /* |
157 | * The default value a temperature sensor will return when it is present but |
158 | * has not been read this boot. This is a reasonable number to avoid |
159 | * triggering alarms on the host. |
160 | */ |
161 | #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) |
162 | |
163 | #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ |
164 | #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ |
165 | #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ |
166 | |
167 | /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ |
168 | #define EC_BATT_FLAG_AC_PRESENT 0x01 |
169 | #define EC_BATT_FLAG_BATT_PRESENT 0x02 |
170 | #define EC_BATT_FLAG_DISCHARGING 0x04 |
171 | #define EC_BATT_FLAG_CHARGING 0x08 |
172 | #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 |
173 | /* Set if some of the static/dynamic data is invalid (or outdated). */ |
174 | #define EC_BATT_FLAG_INVALID_DATA 0x20 |
175 | |
176 | /* Switch flags at EC_MEMMAP_SWITCHES */ |
177 | #define EC_SWITCH_LID_OPEN 0x01 |
178 | #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 |
179 | #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 |
180 | /* Was recovery requested via keyboard; now unused. */ |
181 | #define EC_SWITCH_IGNORE1 0x08 |
182 | /* Recovery requested via dedicated signal (from servo board) */ |
183 | #define EC_SWITCH_DEDICATED_RECOVERY 0x10 |
184 | /* Was fake developer mode switch; now unused. Remove in next refactor. */ |
185 | #define EC_SWITCH_IGNORE0 0x20 |
186 | |
187 | /* Host command interface flags */ |
188 | /* Host command interface supports LPC args (LPC interface only) */ |
189 | #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 |
190 | /* Host command interface supports version 3 protocol */ |
191 | #define EC_HOST_CMD_FLAG_VERSION_3 0x02 |
192 | |
193 | /* Wireless switch flags */ |
194 | #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ |
195 | #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ |
196 | #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ |
197 | #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ |
198 | #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ |
199 | |
200 | /*****************************************************************************/ |
201 | /* |
202 | * ACPI commands |
203 | * |
204 | * These are valid ONLY on the ACPI command/data port. |
205 | */ |
206 | |
207 | /* |
208 | * ACPI Read Embedded Controller |
209 | * |
210 | * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). |
211 | * |
212 | * Use the following sequence: |
213 | * |
214 | * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD |
215 | * - Wait for EC_LPC_CMDR_PENDING bit to clear |
216 | * - Write address to EC_LPC_ADDR_ACPI_DATA |
217 | * - Wait for EC_LPC_CMDR_DATA bit to set |
218 | * - Read value from EC_LPC_ADDR_ACPI_DATA |
219 | */ |
220 | #define EC_CMD_ACPI_READ 0x0080 |
221 | |
222 | /* |
223 | * ACPI Write Embedded Controller |
224 | * |
225 | * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). |
226 | * |
227 | * Use the following sequence: |
228 | * |
229 | * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD |
230 | * - Wait for EC_LPC_CMDR_PENDING bit to clear |
231 | * - Write address to EC_LPC_ADDR_ACPI_DATA |
232 | * - Wait for EC_LPC_CMDR_PENDING bit to clear |
233 | * - Write value to EC_LPC_ADDR_ACPI_DATA |
234 | */ |
235 | #define EC_CMD_ACPI_WRITE 0x0081 |
236 | |
237 | /* |
238 | * ACPI Burst Enable Embedded Controller |
239 | * |
240 | * This enables burst mode on the EC to allow the host to issue several |
241 | * commands back-to-back. While in this mode, writes to mapped multi-byte |
242 | * data are locked out to ensure data consistency. |
243 | */ |
244 | #define EC_CMD_ACPI_BURST_ENABLE 0x0082 |
245 | |
246 | /* |
247 | * ACPI Burst Disable Embedded Controller |
248 | * |
249 | * This disables burst mode on the EC and stops preventing EC writes to mapped |
250 | * multi-byte data. |
251 | */ |
252 | #define EC_CMD_ACPI_BURST_DISABLE 0x0083 |
253 | |
254 | /* |
255 | * ACPI Query Embedded Controller |
256 | * |
257 | * This clears the lowest-order bit in the currently pending host events, and |
258 | * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, |
259 | * event 0x80000000 = 32), or 0 if no event was pending. |
260 | */ |
261 | #define EC_CMD_ACPI_QUERY_EVENT 0x0084 |
262 | |
263 | /* Valid addresses in ACPI memory space, for read/write commands */ |
264 | |
265 | /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ |
266 | #define EC_ACPI_MEM_VERSION 0x00 |
267 | /* |
268 | * Test location; writing value here updates test compliment byte to (0xff - |
269 | * value). |
270 | */ |
271 | #define EC_ACPI_MEM_TEST 0x01 |
272 | /* Test compliment; writes here are ignored. */ |
273 | #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 |
274 | |
275 | /* Keyboard backlight brightness percent (0 - 100) */ |
276 | #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 |
277 | /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ |
278 | #define EC_ACPI_MEM_FAN_DUTY 0x04 |
279 | |
280 | /* |
281 | * DPTF temp thresholds. Any of the EC's temp sensors can have up to two |
282 | * independent thresholds attached to them. The current value of the ID |
283 | * register determines which sensor is affected by the THRESHOLD and COMMIT |
284 | * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme |
285 | * as the memory-mapped sensors. The COMMIT register applies those settings. |
286 | * |
287 | * The spec does not mandate any way to read back the threshold settings |
288 | * themselves, but when a threshold is crossed the AP needs a way to determine |
289 | * which sensor(s) are responsible. Each reading of the ID register clears and |
290 | * returns one sensor ID that has crossed one of its threshold (in either |
291 | * direction) since the last read. A value of 0xFF means "no new thresholds |
292 | * have tripped". Setting or enabling the thresholds for a sensor will clear |
293 | * the unread event count for that sensor. |
294 | */ |
295 | #define EC_ACPI_MEM_TEMP_ID 0x05 |
296 | #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 |
297 | #define EC_ACPI_MEM_TEMP_COMMIT 0x07 |
298 | /* |
299 | * Here are the bits for the COMMIT register: |
300 | * bit 0 selects the threshold index for the chosen sensor (0/1) |
301 | * bit 1 enables/disables the selected threshold (0 = off, 1 = on) |
302 | * Each write to the commit register affects one threshold. |
303 | */ |
304 | #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) |
305 | #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) |
306 | /* |
307 | * Example: |
308 | * |
309 | * Set the thresholds for sensor 2 to 50 C and 60 C: |
310 | * write 2 to [0x05] -- select temp sensor 2 |
311 | * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET |
312 | * write 0x2 to [0x07] -- enable threshold 0 with this value |
313 | * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET |
314 | * write 0x3 to [0x07] -- enable threshold 1 with this value |
315 | * |
316 | * Disable the 60 C threshold, leaving the 50 C threshold unchanged: |
317 | * write 2 to [0x05] -- select temp sensor 2 |
318 | * write 0x1 to [0x07] -- disable threshold 1 |
319 | */ |
320 | |
321 | /* DPTF battery charging current limit */ |
322 | #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 |
323 | |
324 | /* Charging limit is specified in 64 mA steps */ |
325 | #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 |
326 | /* Value to disable DPTF battery charging limit */ |
327 | #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff |
328 | |
329 | /* |
330 | * Report device orientation |
331 | * Bits Definition |
332 | * 3:1 Device DPTF Profile Number (DDPN) |
333 | * 0 = Reserved for backward compatibility (indicates no valid |
334 | * profile number. Host should fall back to using TBMD). |
335 | * 1..7 = DPTF Profile number to indicate to host which table needs |
336 | * to be loaded. |
337 | * 0 Tablet Mode Device Indicator (TBMD) |
338 | */ |
339 | #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 |
340 | #define EC_ACPI_MEM_TBMD_SHIFT 0 |
341 | #define EC_ACPI_MEM_TBMD_MASK 0x1 |
342 | #define EC_ACPI_MEM_DDPN_SHIFT 1 |
343 | #define EC_ACPI_MEM_DDPN_MASK 0x7 |
344 | |
345 | /* |
346 | * Report device features. Uses the same format as the host command, except: |
347 | * |
348 | * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set |
349 | * of features", which is of limited interest when the system is already |
350 | * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since |
351 | * these are supported, it defaults to 0. |
352 | * This allows detecting the presence of this field since older versions of |
353 | * the EC codebase would simply return 0xff to that unknown address. Check |
354 | * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits |
355 | * are valid. |
356 | */ |
357 | #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a |
358 | #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b |
359 | #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c |
360 | #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d |
361 | #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e |
362 | #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f |
363 | #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 |
364 | #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 |
365 | |
366 | #define EC_ACPI_MEM_BATTERY_INDEX 0x12 |
367 | |
368 | /* |
369 | * USB Port Power. Each bit indicates whether the corresponding USB ports' power |
370 | * is enabled (1) or disabled (0). |
371 | * bit 0 USB port ID 0 |
372 | * ... |
373 | * bit 7 USB port ID 7 |
374 | */ |
375 | #define EC_ACPI_MEM_USB_PORT_POWER 0x13 |
376 | |
377 | /* |
378 | * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data |
379 | * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. |
380 | */ |
381 | #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 |
382 | #define EC_ACPI_MEM_MAPPED_SIZE 0xe0 |
383 | |
384 | /* Current version of ACPI memory address space */ |
385 | #define EC_ACPI_MEM_VERSION_CURRENT 2 |
386 | |
387 | |
388 | /* |
389 | * This header file is used in coreboot both in C and ACPI code. The ACPI code |
390 | * is pre-processed to handle constants but the ASL compiler is unable to |
391 | * handle actual C code so keep it separate. |
392 | */ |
393 | |
394 | |
395 | /* |
396 | * Attributes for EC request and response packets. Just defining __packed |
397 | * results in inefficient assembly code on ARM, if the structure is actually |
398 | * 32-bit aligned, as it should be for all buffers. |
399 | * |
400 | * Be very careful when adding these to existing structures. They will round |
401 | * up the structure size to the specified boundary. |
402 | * |
403 | * Also be very careful to make that if a structure is included in some other |
404 | * parent structure that the alignment will still be true given the packing of |
405 | * the parent structure. This is particularly important if the sub-structure |
406 | * will be passed as a pointer to another function, since that function will |
407 | * not know about the misaligment caused by the parent structure's packing. |
408 | * |
409 | * Also be very careful using __packed - particularly when nesting non-packed |
410 | * structures inside packed ones. In fact, DO NOT use __packed directly; |
411 | * always use one of these attributes. |
412 | * |
413 | * Once everything is annotated properly, the following search strings should |
414 | * not return ANY matches in this file other than right here: |
415 | * |
416 | * "__packed" - generates inefficient code; all sub-structs must also be packed |
417 | * |
418 | * "struct [^_]" - all structs should be annotated, except for structs that are |
419 | * members of other structs/unions (and their original declarations should be |
420 | * annotated). |
421 | */ |
422 | |
423 | /* |
424 | * Packed structures make no assumption about alignment, so they do inefficient |
425 | * byte-wise reads. |
426 | */ |
427 | #define __ec_align1 __packed |
428 | #define __ec_align2 __packed |
429 | #define __ec_align4 __packed |
430 | #define __ec_align_size1 __packed |
431 | #define __ec_align_offset1 __packed |
432 | #define __ec_align_offset2 __packed |
433 | #define __ec_todo_packed __packed |
434 | #define __ec_todo_unpacked |
435 | |
436 | |
437 | /* LPC command status byte masks */ |
438 | /* EC has written a byte in the data register and host hasn't read it yet */ |
439 | #define EC_LPC_STATUS_TO_HOST 0x01 |
440 | /* Host has written a command/data byte and the EC hasn't read it yet */ |
441 | #define EC_LPC_STATUS_FROM_HOST 0x02 |
442 | /* EC is processing a command */ |
443 | #define EC_LPC_STATUS_PROCESSING 0x04 |
444 | /* Last write to EC was a command, not data */ |
445 | #define EC_LPC_STATUS_LAST_CMD 0x08 |
446 | /* EC is in burst mode */ |
447 | #define EC_LPC_STATUS_BURST_MODE 0x10 |
448 | /* SCI event is pending (requesting SCI query) */ |
449 | #define EC_LPC_STATUS_SCI_PENDING 0x20 |
450 | /* SMI event is pending (requesting SMI query) */ |
451 | #define EC_LPC_STATUS_SMI_PENDING 0x40 |
452 | /* (reserved) */ |
453 | #define EC_LPC_STATUS_RESERVED 0x80 |
454 | |
455 | /* |
456 | * EC is busy. This covers both the EC processing a command, and the host has |
457 | * written a new command but the EC hasn't picked it up yet. |
458 | */ |
459 | #define EC_LPC_STATUS_BUSY_MASK \ |
460 | (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) |
461 | |
462 | /* |
463 | * Host command response codes (16-bit). Note that response codes should be |
464 | * stored in a uint16_t rather than directly in a value of this type. |
465 | */ |
466 | enum ec_status { |
467 | EC_RES_SUCCESS = 0, |
468 | EC_RES_INVALID_COMMAND = 1, |
469 | EC_RES_ERROR = 2, |
470 | EC_RES_INVALID_PARAM = 3, |
471 | EC_RES_ACCESS_DENIED = 4, |
472 | EC_RES_INVALID_RESPONSE = 5, |
473 | EC_RES_INVALID_VERSION = 6, |
474 | EC_RES_INVALID_CHECKSUM = 7, |
475 | EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ |
476 | EC_RES_UNAVAILABLE = 9, /* No response available */ |
477 | EC_RES_TIMEOUT = 10, /* We got a timeout */ |
478 | EC_RES_OVERFLOW = 11, /* Table / data overflow */ |
479 | = 12, /* Header contains invalid data */ |
480 | EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ |
481 | EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ |
482 | EC_RES_BUS_ERROR = 15, /* Communications bus error */ |
483 | EC_RES_BUSY = 16, /* Up but too busy. Should retry */ |
484 | = 17, /* Header version invalid */ |
485 | = 18, /* Header CRC invalid */ |
486 | EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ |
487 | EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ |
488 | }; |
489 | |
490 | /* |
491 | * Host event codes. Note these are 1-based, not 0-based, because ACPI query |
492 | * EC command uses code 0 to mean "no event pending". We explicitly specify |
493 | * each value in the enum listing so they won't change if we delete/insert an |
494 | * item or rearrange the list (it needs to be stable across platforms, not |
495 | * just within a single compiled instance). |
496 | */ |
497 | enum host_event_code { |
498 | EC_HOST_EVENT_LID_CLOSED = 1, |
499 | EC_HOST_EVENT_LID_OPEN = 2, |
500 | EC_HOST_EVENT_POWER_BUTTON = 3, |
501 | EC_HOST_EVENT_AC_CONNECTED = 4, |
502 | EC_HOST_EVENT_AC_DISCONNECTED = 5, |
503 | EC_HOST_EVENT_BATTERY_LOW = 6, |
504 | EC_HOST_EVENT_BATTERY_CRITICAL = 7, |
505 | EC_HOST_EVENT_BATTERY = 8, |
506 | EC_HOST_EVENT_THERMAL_THRESHOLD = 9, |
507 | /* Event generated by a device attached to the EC */ |
508 | EC_HOST_EVENT_DEVICE = 10, |
509 | EC_HOST_EVENT_THERMAL = 11, |
510 | EC_HOST_EVENT_USB_CHARGER = 12, |
511 | EC_HOST_EVENT_KEY_PRESSED = 13, |
512 | /* |
513 | * EC has finished initializing the host interface. The host can check |
514 | * for this event following sending a EC_CMD_REBOOT_EC command to |
515 | * determine when the EC is ready to accept subsequent commands. |
516 | */ |
517 | EC_HOST_EVENT_INTERFACE_READY = 14, |
518 | /* Keyboard recovery combo has been pressed */ |
519 | EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, |
520 | |
521 | /* Shutdown due to thermal overload */ |
522 | EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, |
523 | /* Shutdown due to battery level too low */ |
524 | EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, |
525 | |
526 | /* Suggest that the AP throttle itself */ |
527 | EC_HOST_EVENT_THROTTLE_START = 18, |
528 | /* Suggest that the AP resume normal speed */ |
529 | EC_HOST_EVENT_THROTTLE_STOP = 19, |
530 | |
531 | /* Hang detect logic detected a hang and host event timeout expired */ |
532 | EC_HOST_EVENT_HANG_DETECT = 20, |
533 | /* Hang detect logic detected a hang and warm rebooted the AP */ |
534 | EC_HOST_EVENT_HANG_REBOOT = 21, |
535 | |
536 | /* PD MCU triggering host event */ |
537 | EC_HOST_EVENT_PD_MCU = 22, |
538 | |
539 | /* Battery Status flags have changed */ |
540 | EC_HOST_EVENT_BATTERY_STATUS = 23, |
541 | |
542 | /* EC encountered a panic, triggering a reset */ |
543 | EC_HOST_EVENT_PANIC = 24, |
544 | |
545 | /* Keyboard fastboot combo has been pressed */ |
546 | EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, |
547 | |
548 | /* EC RTC event occurred */ |
549 | EC_HOST_EVENT_RTC = 26, |
550 | |
551 | /* Emulate MKBP event */ |
552 | EC_HOST_EVENT_MKBP = 27, |
553 | |
554 | /* EC desires to change state of host-controlled USB mux */ |
555 | EC_HOST_EVENT_USB_MUX = 28, |
556 | |
557 | /* TABLET/LAPTOP mode or detachable base attach/detach event */ |
558 | EC_HOST_EVENT_MODE_CHANGE = 29, |
559 | |
560 | /* Keyboard recovery combo with hardware reinitialization */ |
561 | EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, |
562 | |
563 | /* WoV */ |
564 | EC_HOST_EVENT_WOV = 31, |
565 | |
566 | /* |
567 | * The high bit of the event mask is not used as a host event code. If |
568 | * it reads back as set, then the entire event mask should be |
569 | * considered invalid by the host. This can happen when reading the |
570 | * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is |
571 | * not initialized on the EC, or improperly configured on the host. |
572 | */ |
573 | EC_HOST_EVENT_INVALID = 32 |
574 | }; |
575 | /* Host event mask */ |
576 | #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) |
577 | |
578 | /** |
579 | * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS |
580 | * @flags: The host argument flags. |
581 | * @command_version: Command version. |
582 | * @data_size: The length of data. |
583 | * @checksum: Checksum; sum of command + flags + command_version + data_size + |
584 | * all params/response data bytes. |
585 | */ |
586 | struct ec_lpc_host_args { |
587 | uint8_t flags; |
588 | uint8_t command_version; |
589 | uint8_t data_size; |
590 | uint8_t checksum; |
591 | } __ec_align4; |
592 | |
593 | /* Flags for ec_lpc_host_args.flags */ |
594 | /* |
595 | * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command |
596 | * params. |
597 | * |
598 | * If EC gets a command and this flag is not set, this is an old-style command. |
599 | * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with |
600 | * unknown length. EC must respond with an old-style response (that is, |
601 | * without setting EC_HOST_ARGS_FLAG_TO_HOST). |
602 | */ |
603 | #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 |
604 | /* |
605 | * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. |
606 | * |
607 | * If EC responds to a command and this flag is not set, this is an old-style |
608 | * response. Command version is 0 and response data from EC is at |
609 | * EC_LPC_ADDR_OLD_PARAM with unknown length. |
610 | */ |
611 | #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 |
612 | |
613 | /*****************************************************************************/ |
614 | /* |
615 | * Byte codes returned by EC over SPI interface. |
616 | * |
617 | * These can be used by the AP to debug the EC interface, and to determine |
618 | * when the EC is not in a state where it will ever get around to responding |
619 | * to the AP. |
620 | * |
621 | * Example of sequence of bytes read from EC for a current good transfer: |
622 | * 1. - - AP asserts chip select (CS#) |
623 | * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request |
624 | * 3. - - EC starts handling CS# interrupt |
625 | * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request |
626 | * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in |
627 | * bytes looking for EC_SPI_FRAME_START |
628 | * 6. - - EC finishes processing and sets up response |
629 | * 7. EC_SPI_FRAME_START - AP reads frame byte |
630 | * 8. (response packet) - AP reads response packet |
631 | * 9. EC_SPI_PAST_END - Any additional bytes read by AP |
632 | * 10 - - AP deasserts chip select |
633 | * 11 - - EC processes CS# interrupt and sets up DMA for |
634 | * next request |
635 | * |
636 | * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than |
637 | * the following byte values: |
638 | * EC_SPI_OLD_READY |
639 | * EC_SPI_RX_READY |
640 | * EC_SPI_RECEIVING |
641 | * EC_SPI_PROCESSING |
642 | * |
643 | * Then the EC found an error in the request, or was not ready for the request |
644 | * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, |
645 | * because the EC is unable to tell when the AP is done sending its request. |
646 | */ |
647 | |
648 | /* |
649 | * Framing byte which precedes a response packet from the EC. After sending a |
650 | * request, the AP will clock in bytes until it sees the framing byte, then |
651 | * clock in the response packet. |
652 | */ |
653 | #define EC_SPI_FRAME_START 0xec |
654 | |
655 | /* |
656 | * Padding bytes which are clocked out after the end of a response packet. |
657 | */ |
658 | #define EC_SPI_PAST_END 0xed |
659 | |
660 | /* |
661 | * EC is ready to receive, and has ignored the byte sent by the AP. EC expects |
662 | * that the AP will send a valid packet header (starting with |
663 | * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. |
664 | */ |
665 | #define EC_SPI_RX_READY 0xf8 |
666 | |
667 | /* |
668 | * EC has started receiving the request from the AP, but hasn't started |
669 | * processing it yet. |
670 | */ |
671 | #define EC_SPI_RECEIVING 0xf9 |
672 | |
673 | /* EC has received the entire request from the AP and is processing it. */ |
674 | #define EC_SPI_PROCESSING 0xfa |
675 | |
676 | /* |
677 | * EC received bad data from the AP, such as a packet header with an invalid |
678 | * length. EC will ignore all data until chip select deasserts. |
679 | */ |
680 | #define EC_SPI_RX_BAD_DATA 0xfb |
681 | |
682 | /* |
683 | * EC received data from the AP before it was ready. That is, the AP asserted |
684 | * chip select and started clocking data before the EC was ready to receive it. |
685 | * EC will ignore all data until chip select deasserts. |
686 | */ |
687 | #define EC_SPI_NOT_READY 0xfc |
688 | |
689 | /* |
690 | * EC was ready to receive a request from the AP. EC has treated the byte sent |
691 | * by the AP as part of a request packet, or (for old-style ECs) is processing |
692 | * a fully received packet but is not ready to respond yet. |
693 | */ |
694 | #define EC_SPI_OLD_READY 0xfd |
695 | |
696 | /*****************************************************************************/ |
697 | |
698 | /* |
699 | * Protocol version 2 for I2C and SPI send a request this way: |
700 | * |
701 | * 0 EC_CMD_VERSION0 + (command version) |
702 | * 1 Command number |
703 | * 2 Length of params = N |
704 | * 3..N+2 Params, if any |
705 | * N+3 8-bit checksum of bytes 0..N+2 |
706 | * |
707 | * The corresponding response is: |
708 | * |
709 | * 0 Result code (EC_RES_*) |
710 | * 1 Length of params = M |
711 | * 2..M+1 Params, if any |
712 | * M+2 8-bit checksum of bytes 0..M+1 |
713 | */ |
714 | #define 3 |
715 | #define EC_PROTO2_REQUEST_TRAILER_BYTES 1 |
716 | #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ |
717 | EC_PROTO2_REQUEST_TRAILER_BYTES) |
718 | |
719 | #define 2 |
720 | #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 |
721 | #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ |
722 | EC_PROTO2_RESPONSE_TRAILER_BYTES) |
723 | |
724 | /* Parameter length was limited by the LPC interface */ |
725 | #define EC_PROTO2_MAX_PARAM_SIZE 0xfc |
726 | |
727 | /* Maximum request and response packet sizes for protocol version 2 */ |
728 | #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ |
729 | EC_PROTO2_MAX_PARAM_SIZE) |
730 | #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ |
731 | EC_PROTO2_MAX_PARAM_SIZE) |
732 | |
733 | /*****************************************************************************/ |
734 | |
735 | /* |
736 | * Value written to legacy command port / prefix byte to indicate protocol |
737 | * 3+ structs are being used. Usage is bus-dependent. |
738 | */ |
739 | #define EC_COMMAND_PROTOCOL_3 0xda |
740 | |
741 | #define EC_HOST_REQUEST_VERSION 3 |
742 | |
743 | /** |
744 | * struct ec_host_request - Version 3 request from host. |
745 | * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it |
746 | * receives a header with a version it doesn't know how to |
747 | * parse. |
748 | * @checksum: Checksum of request and data; sum of all bytes including checksum |
749 | * should total to 0. |
750 | * @command: Command to send (EC_CMD_...) |
751 | * @command_version: Command version. |
752 | * @reserved: Unused byte in current protocol version; set to 0. |
753 | * @data_len: Length of data which follows this header. |
754 | */ |
755 | struct ec_host_request { |
756 | uint8_t struct_version; |
757 | uint8_t checksum; |
758 | uint16_t command; |
759 | uint8_t command_version; |
760 | uint8_t reserved; |
761 | uint16_t data_len; |
762 | } __ec_align4; |
763 | |
764 | #define EC_HOST_RESPONSE_VERSION 3 |
765 | |
766 | /** |
767 | * struct ec_host_response - Version 3 response from EC. |
768 | * @struct_version: Struct version (=3). |
769 | * @checksum: Checksum of response and data; sum of all bytes including |
770 | * checksum should total to 0. |
771 | * @result: EC's response to the command (separate from communication failure) |
772 | * @data_len: Length of data which follows this header. |
773 | * @reserved: Unused bytes in current protocol version; set to 0. |
774 | */ |
775 | struct ec_host_response { |
776 | uint8_t struct_version; |
777 | uint8_t checksum; |
778 | uint16_t result; |
779 | uint16_t data_len; |
780 | uint16_t reserved; |
781 | } __ec_align4; |
782 | |
783 | /*****************************************************************************/ |
784 | |
785 | /* |
786 | * Host command protocol V4. |
787 | * |
788 | * Packets always start with a request or response header. They are followed |
789 | * by data_len bytes of data. If the data_crc_present flag is set, the data |
790 | * bytes are followed by a CRC-8 of that data, using x^8 + x^2 + x + 1 |
791 | * polynomial. |
792 | * |
793 | * Host algorithm when sending a request q: |
794 | * |
795 | * 101) tries_left=(some value, e.g. 3); |
796 | * 102) q.seq_num++ |
797 | * 103) q.seq_dup=0 |
798 | * 104) Calculate q.header_crc. |
799 | * 105) Send request q to EC. |
800 | * 106) Wait for response r. Go to 201 if received or 301 if timeout. |
801 | * |
802 | * 201) If r.struct_version != 4, go to 301. |
803 | * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. |
804 | * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. |
805 | * 204) If r.seq_num != q.seq_num, go to 301. |
806 | * 205) If r.seq_dup == q.seq_dup, return success. |
807 | * 207) If r.seq_dup == 1, go to 301. |
808 | * 208) Return error. |
809 | * |
810 | * 301) If --tries_left <= 0, return error. |
811 | * 302) If q.seq_dup == 1, go to 105. |
812 | * 303) q.seq_dup = 1 |
813 | * 304) Go to 104. |
814 | * |
815 | * EC algorithm when receiving a request q. |
816 | * EC has response buffer r, error buffer e. |
817 | * |
818 | * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION |
819 | * and go to 301 |
820 | * 102) If q.header_crc mismatches calculated CRC, set e.result = |
821 | * EC_RES_INVALID_HEADER_CRC and go to 301 |
822 | * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC |
823 | * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC |
824 | * and go to 301. |
825 | * 104) If q.seq_dup == 0, go to 201. |
826 | * 105) If q.seq_num != r.seq_num, go to 201. |
827 | * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. |
828 | * |
829 | * 201) Process request q into response r. |
830 | * 202) r.seq_num = q.seq_num |
831 | * 203) r.seq_dup = q.seq_dup |
832 | * 204) Calculate r.header_crc |
833 | * 205) If r.data_len > 0 and data is no longer available, set e.result = |
834 | * EC_RES_DUP_UNAVAILABLE and go to 301. |
835 | * 206) Send response r. |
836 | * |
837 | * 301) e.seq_num = q.seq_num |
838 | * 302) e.seq_dup = q.seq_dup |
839 | * 303) Calculate e.header_crc. |
840 | * 304) Send error response e. |
841 | */ |
842 | |
843 | /* Version 4 request from host */ |
844 | struct ec_host_request4 { |
845 | /* |
846 | * bits 0-3: struct_version: Structure version (=4) |
847 | * bit 4: is_response: Is response (=0) |
848 | * bits 5-6: seq_num: Sequence number |
849 | * bit 7: seq_dup: Sequence duplicate flag |
850 | */ |
851 | uint8_t fields0; |
852 | |
853 | /* |
854 | * bits 0-4: command_version: Command version |
855 | * bits 5-6: Reserved (set 0, ignore on read) |
856 | * bit 7: data_crc_present: Is data CRC present after data |
857 | */ |
858 | uint8_t fields1; |
859 | |
860 | /* Command code (EC_CMD_*) */ |
861 | uint16_t command; |
862 | |
863 | /* Length of data which follows this header (not including data CRC) */ |
864 | uint16_t data_len; |
865 | |
866 | /* Reserved (set 0, ignore on read) */ |
867 | uint8_t reserved; |
868 | |
869 | /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ |
870 | uint8_t ; |
871 | } __ec_align4; |
872 | |
873 | /* Version 4 response from EC */ |
874 | struct ec_host_response4 { |
875 | /* |
876 | * bits 0-3: struct_version: Structure version (=4) |
877 | * bit 4: is_response: Is response (=1) |
878 | * bits 5-6: seq_num: Sequence number |
879 | * bit 7: seq_dup: Sequence duplicate flag |
880 | */ |
881 | uint8_t fields0; |
882 | |
883 | /* |
884 | * bits 0-6: Reserved (set 0, ignore on read) |
885 | * bit 7: data_crc_present: Is data CRC present after data |
886 | */ |
887 | uint8_t fields1; |
888 | |
889 | /* Result code (EC_RES_*) */ |
890 | uint16_t result; |
891 | |
892 | /* Length of data which follows this header (not including data CRC) */ |
893 | uint16_t data_len; |
894 | |
895 | /* Reserved (set 0, ignore on read) */ |
896 | uint8_t reserved; |
897 | |
898 | /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ |
899 | uint8_t ; |
900 | } __ec_align4; |
901 | |
902 | /* Fields in fields0 byte */ |
903 | #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f |
904 | #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 |
905 | #define EC_PACKET4_0_SEQ_NUM_SHIFT 5 |
906 | #define EC_PACKET4_0_SEQ_NUM_MASK 0x60 |
907 | #define EC_PACKET4_0_SEQ_DUP_MASK 0x80 |
908 | |
909 | /* Fields in fields1 byte */ |
910 | #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ |
911 | #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 |
912 | |
913 | /*****************************************************************************/ |
914 | /* |
915 | * Notes on commands: |
916 | * |
917 | * Each command is an 16-bit command value. Commands which take params or |
918 | * return response data specify structures for that data. If no structure is |
919 | * specified, the command does not input or output data, respectively. |
920 | * Parameter/response length is implicit in the structs. Some underlying |
921 | * communication protocols (I2C, SPI) may add length or checksum headers, but |
922 | * those are implementation-dependent and not defined here. |
923 | * |
924 | * All commands MUST be #defined to be 4-digit UPPER CASE hex values |
925 | * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. |
926 | */ |
927 | |
928 | /*****************************************************************************/ |
929 | /* General / test commands */ |
930 | |
931 | /* |
932 | * Get protocol version, used to deal with non-backward compatible protocol |
933 | * changes. |
934 | */ |
935 | #define EC_CMD_PROTO_VERSION 0x0000 |
936 | |
937 | /** |
938 | * struct ec_response_proto_version - Response to the proto version command. |
939 | * @version: The protocol version. |
940 | */ |
941 | struct ec_response_proto_version { |
942 | uint32_t version; |
943 | } __ec_align4; |
944 | |
945 | /* |
946 | * Hello. This is a simple command to test the EC is responsive to |
947 | * commands. |
948 | */ |
949 | #define EC_CMD_HELLO 0x0001 |
950 | |
951 | /** |
952 | * struct ec_params_hello - Parameters to the hello command. |
953 | * @in_data: Pass anything here. |
954 | */ |
955 | struct ec_params_hello { |
956 | uint32_t in_data; |
957 | } __ec_align4; |
958 | |
959 | /** |
960 | * struct ec_response_hello - Response to the hello command. |
961 | * @out_data: Output will be in_data + 0x01020304. |
962 | */ |
963 | struct ec_response_hello { |
964 | uint32_t out_data; |
965 | } __ec_align4; |
966 | |
967 | /* Get version number */ |
968 | #define EC_CMD_GET_VERSION 0x0002 |
969 | |
970 | enum ec_current_image { |
971 | EC_IMAGE_UNKNOWN = 0, |
972 | EC_IMAGE_RO, |
973 | EC_IMAGE_RW |
974 | }; |
975 | |
976 | /** |
977 | * struct ec_response_get_version - Response to the get version command. |
978 | * @version_string_ro: Null-terminated RO firmware version string. |
979 | * @version_string_rw: Null-terminated RW firmware version string. |
980 | * @reserved: Unused bytes; was previously RW-B firmware version string. |
981 | * @current_image: One of ec_current_image. |
982 | */ |
983 | struct ec_response_get_version { |
984 | char version_string_ro[32]; |
985 | char version_string_rw[32]; |
986 | char reserved[32]; |
987 | uint32_t current_image; |
988 | } __ec_align4; |
989 | |
990 | /* Read test */ |
991 | #define EC_CMD_READ_TEST 0x0003 |
992 | |
993 | /** |
994 | * struct ec_params_read_test - Parameters for the read test command. |
995 | * @offset: Starting value for read buffer. |
996 | * @size: Size to read in bytes. |
997 | */ |
998 | struct ec_params_read_test { |
999 | uint32_t offset; |
1000 | uint32_t size; |
1001 | } __ec_align4; |
1002 | |
1003 | /** |
1004 | * struct ec_response_read_test - Response to the read test command. |
1005 | * @data: Data returned by the read test command. |
1006 | */ |
1007 | struct ec_response_read_test { |
1008 | uint32_t data[32]; |
1009 | } __ec_align4; |
1010 | |
1011 | /* |
1012 | * Get build information |
1013 | * |
1014 | * Response is null-terminated string. |
1015 | */ |
1016 | #define EC_CMD_GET_BUILD_INFO 0x0004 |
1017 | |
1018 | /* Get chip info */ |
1019 | #define EC_CMD_GET_CHIP_INFO 0x0005 |
1020 | |
1021 | /** |
1022 | * struct ec_response_get_chip_info - Response to the get chip info command. |
1023 | * @vendor: Null-terminated string for chip vendor. |
1024 | * @name: Null-terminated string for chip name. |
1025 | * @revision: Null-terminated string for chip mask version. |
1026 | */ |
1027 | struct ec_response_get_chip_info { |
1028 | char vendor[32]; |
1029 | char name[32]; |
1030 | char revision[32]; |
1031 | } __ec_align4; |
1032 | |
1033 | /* Get board HW version */ |
1034 | #define EC_CMD_GET_BOARD_VERSION 0x0006 |
1035 | |
1036 | /** |
1037 | * struct ec_response_board_version - Response to the board version command. |
1038 | * @board_version: A monotonously incrementing number. |
1039 | */ |
1040 | struct ec_response_board_version { |
1041 | uint16_t board_version; |
1042 | } __ec_align2; |
1043 | |
1044 | /* |
1045 | * Read memory-mapped data. |
1046 | * |
1047 | * This is an alternate interface to memory-mapped data for bus protocols |
1048 | * which don't support direct-mapped memory - I2C, SPI, etc. |
1049 | * |
1050 | * Response is params.size bytes of data. |
1051 | */ |
1052 | #define EC_CMD_READ_MEMMAP 0x0007 |
1053 | |
1054 | /** |
1055 | * struct ec_params_read_memmap - Parameters for the read memory map command. |
1056 | * @offset: Offset in memmap (EC_MEMMAP_*). |
1057 | * @size: Size to read in bytes. |
1058 | */ |
1059 | struct ec_params_read_memmap { |
1060 | uint8_t offset; |
1061 | uint8_t size; |
1062 | } __ec_align1; |
1063 | |
1064 | /* Read versions supported for a command */ |
1065 | #define EC_CMD_GET_CMD_VERSIONS 0x0008 |
1066 | |
1067 | /** |
1068 | * struct ec_params_get_cmd_versions - Parameters for the get command versions. |
1069 | * @cmd: Command to check. |
1070 | */ |
1071 | struct ec_params_get_cmd_versions { |
1072 | uint8_t cmd; |
1073 | } __ec_align1; |
1074 | |
1075 | /** |
1076 | * struct ec_params_get_cmd_versions_v1 - Parameters for the get command |
1077 | * versions (v1) |
1078 | * @cmd: Command to check. |
1079 | */ |
1080 | struct ec_params_get_cmd_versions_v1 { |
1081 | uint16_t cmd; |
1082 | } __ec_align2; |
1083 | |
1084 | /** |
1085 | * struct ec_response_get_cmd_versions - Response to the get command versions. |
1086 | * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with |
1087 | * a desired version. |
1088 | */ |
1089 | struct ec_response_get_cmd_versions { |
1090 | uint32_t version_mask; |
1091 | } __ec_align4; |
1092 | |
1093 | /* |
1094 | * Check EC communications status (busy). This is needed on i2c/spi but not |
1095 | * on lpc since it has its own out-of-band busy indicator. |
1096 | * |
1097 | * lpc must read the status from the command register. Attempting this on |
1098 | * lpc will overwrite the args/parameter space and corrupt its data. |
1099 | */ |
1100 | #define EC_CMD_GET_COMMS_STATUS 0x0009 |
1101 | |
1102 | /* Avoid using ec_status which is for return values */ |
1103 | enum ec_comms_status { |
1104 | EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ |
1105 | }; |
1106 | |
1107 | /** |
1108 | * struct ec_response_get_comms_status - Response to the get comms status |
1109 | * command. |
1110 | * @flags: Mask of enum ec_comms_status. |
1111 | */ |
1112 | struct ec_response_get_comms_status { |
1113 | uint32_t flags; /* Mask of enum ec_comms_status */ |
1114 | } __ec_align4; |
1115 | |
1116 | /* Fake a variety of responses, purely for testing purposes. */ |
1117 | #define EC_CMD_TEST_PROTOCOL 0x000A |
1118 | |
1119 | /* Tell the EC what to send back to us. */ |
1120 | struct ec_params_test_protocol { |
1121 | uint32_t ec_result; |
1122 | uint32_t ret_len; |
1123 | uint8_t buf[32]; |
1124 | } __ec_align4; |
1125 | |
1126 | /* Here it comes... */ |
1127 | struct ec_response_test_protocol { |
1128 | uint8_t buf[32]; |
1129 | } __ec_align4; |
1130 | |
1131 | /* Get protocol information */ |
1132 | #define EC_CMD_GET_PROTOCOL_INFO 0x000B |
1133 | |
1134 | /* Flags for ec_response_get_protocol_info.flags */ |
1135 | /* EC_RES_IN_PROGRESS may be returned if a command is slow */ |
1136 | #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) |
1137 | |
1138 | /** |
1139 | * struct ec_response_get_protocol_info - Response to the get protocol info. |
1140 | * @protocol_versions: Bitmask of protocol versions supported (1 << n means |
1141 | * version n). |
1142 | * @max_request_packet_size: Maximum request packet size in bytes. |
1143 | * @max_response_packet_size: Maximum response packet size in bytes. |
1144 | * @flags: see EC_PROTOCOL_INFO_* |
1145 | */ |
1146 | struct ec_response_get_protocol_info { |
1147 | /* Fields which exist if at least protocol version 3 supported */ |
1148 | uint32_t protocol_versions; |
1149 | uint16_t max_request_packet_size; |
1150 | uint16_t max_response_packet_size; |
1151 | uint32_t flags; |
1152 | } __ec_align4; |
1153 | |
1154 | |
1155 | /*****************************************************************************/ |
1156 | /* Get/Set miscellaneous values */ |
1157 | |
1158 | /* The upper byte of .flags tells what to do (nothing means "get") */ |
1159 | #define EC_GSV_SET 0x80000000 |
1160 | |
1161 | /* |
1162 | * The lower three bytes of .flags identifies the parameter, if that has |
1163 | * meaning for an individual command. |
1164 | */ |
1165 | #define EC_GSV_PARAM_MASK 0x00ffffff |
1166 | |
1167 | struct ec_params_get_set_value { |
1168 | uint32_t flags; |
1169 | uint32_t value; |
1170 | } __ec_align4; |
1171 | |
1172 | struct ec_response_get_set_value { |
1173 | uint32_t flags; |
1174 | uint32_t value; |
1175 | } __ec_align4; |
1176 | |
1177 | /* More than one command can use these structs to get/set parameters. */ |
1178 | #define EC_CMD_GSV_PAUSE_IN_S5 0x000C |
1179 | |
1180 | /*****************************************************************************/ |
1181 | /* List the features supported by the firmware */ |
1182 | #define EC_CMD_GET_FEATURES 0x000D |
1183 | |
1184 | /* Supported features */ |
1185 | enum ec_feature_code { |
1186 | /* |
1187 | * This image contains a limited set of features. Another image |
1188 | * in RW partition may support more features. |
1189 | */ |
1190 | EC_FEATURE_LIMITED = 0, |
1191 | /* |
1192 | * Commands for probing/reading/writing/erasing the flash in the |
1193 | * EC are present. |
1194 | */ |
1195 | EC_FEATURE_FLASH = 1, |
1196 | /* |
1197 | * Can control the fan speed directly. |
1198 | */ |
1199 | EC_FEATURE_PWM_FAN = 2, |
1200 | /* |
1201 | * Can control the intensity of the keyboard backlight. |
1202 | */ |
1203 | EC_FEATURE_PWM_KEYB = 3, |
1204 | /* |
1205 | * Support Google lightbar, introduced on Pixel. |
1206 | */ |
1207 | EC_FEATURE_LIGHTBAR = 4, |
1208 | /* Control of LEDs */ |
1209 | EC_FEATURE_LED = 5, |
1210 | /* Exposes an interface to control gyro and sensors. |
1211 | * The host goes through the EC to access these sensors. |
1212 | * In addition, the EC may provide composite sensors, like lid angle. |
1213 | */ |
1214 | EC_FEATURE_MOTION_SENSE = 6, |
1215 | /* The keyboard is controlled by the EC */ |
1216 | EC_FEATURE_KEYB = 7, |
1217 | /* The AP can use part of the EC flash as persistent storage. */ |
1218 | EC_FEATURE_PSTORE = 8, |
1219 | /* The EC monitors BIOS port 80h, and can return POST codes. */ |
1220 | EC_FEATURE_PORT80 = 9, |
1221 | /* |
1222 | * Thermal management: include TMP specific commands. |
1223 | * Higher level than direct fan control. |
1224 | */ |
1225 | EC_FEATURE_THERMAL = 10, |
1226 | /* Can switch the screen backlight on/off */ |
1227 | EC_FEATURE_BKLIGHT_SWITCH = 11, |
1228 | /* Can switch the wifi module on/off */ |
1229 | EC_FEATURE_WIFI_SWITCH = 12, |
1230 | /* Monitor host events, through for example SMI or SCI */ |
1231 | EC_FEATURE_HOST_EVENTS = 13, |
1232 | /* The EC exposes GPIO commands to control/monitor connected devices. */ |
1233 | EC_FEATURE_GPIO = 14, |
1234 | /* The EC can send i2c messages to downstream devices. */ |
1235 | EC_FEATURE_I2C = 15, |
1236 | /* Command to control charger are included */ |
1237 | EC_FEATURE_CHARGER = 16, |
1238 | /* Simple battery support. */ |
1239 | EC_FEATURE_BATTERY = 17, |
1240 | /* |
1241 | * Support Smart battery protocol |
1242 | * (Common Smart Battery System Interface Specification) |
1243 | */ |
1244 | EC_FEATURE_SMART_BATTERY = 18, |
1245 | /* EC can detect when the host hangs. */ |
1246 | EC_FEATURE_HANG_DETECT = 19, |
1247 | /* Report power information, for pit only */ |
1248 | EC_FEATURE_PMU = 20, |
1249 | /* Another Cros EC device is present downstream of this one */ |
1250 | EC_FEATURE_SUB_MCU = 21, |
1251 | /* Support USB Power delivery (PD) commands */ |
1252 | EC_FEATURE_USB_PD = 22, |
1253 | /* Control USB multiplexer, for audio through USB port for instance. */ |
1254 | EC_FEATURE_USB_MUX = 23, |
1255 | /* Motion Sensor code has an internal software FIFO */ |
1256 | EC_FEATURE_MOTION_SENSE_FIFO = 24, |
1257 | /* Support temporary secure vstore */ |
1258 | EC_FEATURE_VSTORE = 25, |
1259 | /* EC decides on USB-C SS mux state, muxes configured by host */ |
1260 | EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, |
1261 | /* EC has RTC feature that can be controlled by host commands */ |
1262 | EC_FEATURE_RTC = 27, |
1263 | /* The MCU exposes a Fingerprint sensor */ |
1264 | EC_FEATURE_FINGERPRINT = 28, |
1265 | /* The MCU exposes a Touchpad */ |
1266 | EC_FEATURE_TOUCHPAD = 29, |
1267 | /* The MCU has RWSIG task enabled */ |
1268 | EC_FEATURE_RWSIG = 30, |
1269 | /* EC has device events support */ |
1270 | EC_FEATURE_DEVICE_EVENT = 31, |
1271 | /* EC supports the unified wake masks for LPC/eSPI systems */ |
1272 | EC_FEATURE_UNIFIED_WAKE_MASKS = 32, |
1273 | /* EC supports 64-bit host events */ |
1274 | EC_FEATURE_HOST_EVENT64 = 33, |
1275 | /* EC runs code in RAM (not in place, a.k.a. XIP) */ |
1276 | EC_FEATURE_EXEC_IN_RAM = 34, |
1277 | /* EC supports CEC commands */ |
1278 | EC_FEATURE_CEC = 35, |
1279 | /* EC supports tight sensor timestamping. */ |
1280 | EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, |
1281 | /* |
1282 | * EC supports tablet mode detection aligned to Chrome and allows |
1283 | * setting of threshold by host command using |
1284 | * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. |
1285 | */ |
1286 | EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, |
1287 | /* The MCU is a System Companion Processor (SCP). */ |
1288 | EC_FEATURE_SCP = 39, |
1289 | /* The MCU is an Integrated Sensor Hub */ |
1290 | EC_FEATURE_ISH = 40, |
1291 | /* New TCPMv2 TYPEC_ prefaced commands supported */ |
1292 | EC_FEATURE_TYPEC_CMD = 41, |
1293 | /* |
1294 | * The EC will wait for direction from the AP to enter Type-C alternate |
1295 | * modes or USB4. |
1296 | */ |
1297 | EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42, |
1298 | /* |
1299 | * The EC will wait for an acknowledge from the AP after setting the |
1300 | * mux. |
1301 | */ |
1302 | EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, |
1303 | /* |
1304 | * The EC supports entering and residing in S4. |
1305 | */ |
1306 | EC_FEATURE_S4_RESIDENCY = 44, |
1307 | /* |
1308 | * The EC supports the AP directing mux sets for the board. |
1309 | */ |
1310 | EC_FEATURE_TYPEC_AP_MUX_SET = 45, |
1311 | /* |
1312 | * The EC supports the AP composing VDMs for us to send. |
1313 | */ |
1314 | EC_FEATURE_TYPEC_AP_VDM_SEND = 46, |
1315 | }; |
1316 | |
1317 | #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) |
1318 | #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) |
1319 | |
1320 | struct ec_response_get_features { |
1321 | uint32_t flags[2]; |
1322 | } __ec_align4; |
1323 | |
1324 | /*****************************************************************************/ |
1325 | /* Get the board's SKU ID from EC */ |
1326 | #define EC_CMD_GET_SKU_ID 0x000E |
1327 | |
1328 | /* Set SKU ID from AP */ |
1329 | #define EC_CMD_SET_SKU_ID 0x000F |
1330 | |
1331 | struct ec_sku_id_info { |
1332 | uint32_t sku_id; |
1333 | } __ec_align4; |
1334 | |
1335 | /*****************************************************************************/ |
1336 | /* Flash commands */ |
1337 | |
1338 | /* Get flash info */ |
1339 | #define EC_CMD_FLASH_INFO 0x0010 |
1340 | #define EC_VER_FLASH_INFO 2 |
1341 | |
1342 | /** |
1343 | * struct ec_response_flash_info - Response to the flash info command. |
1344 | * @flash_size: Usable flash size in bytes. |
1345 | * @write_block_size: Write block size. Write offset and size must be a |
1346 | * multiple of this. |
1347 | * @erase_block_size: Erase block size. Erase offset and size must be a |
1348 | * multiple of this. |
1349 | * @protect_block_size: Protection block size. Protection offset and size |
1350 | * must be a multiple of this. |
1351 | * |
1352 | * Version 0 returns these fields. |
1353 | */ |
1354 | struct ec_response_flash_info { |
1355 | uint32_t flash_size; |
1356 | uint32_t write_block_size; |
1357 | uint32_t erase_block_size; |
1358 | uint32_t protect_block_size; |
1359 | } __ec_align4; |
1360 | |
1361 | /* |
1362 | * Flags for version 1+ flash info command |
1363 | * EC flash erases bits to 0 instead of 1. |
1364 | */ |
1365 | #define EC_FLASH_INFO_ERASE_TO_0 BIT(0) |
1366 | |
1367 | /* |
1368 | * Flash must be selected for read/write/erase operations to succeed. This may |
1369 | * be necessary on a chip where write/erase can be corrupted by other board |
1370 | * activity, or where the chip needs to enable some sort of programming voltage, |
1371 | * or where the read/write/erase operations require cleanly suspending other |
1372 | * chip functionality. |
1373 | */ |
1374 | #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) |
1375 | |
1376 | /** |
1377 | * struct ec_response_flash_info_1 - Response to the flash info v1 command. |
1378 | * @flash_size: Usable flash size in bytes. |
1379 | * @write_block_size: Write block size. Write offset and size must be a |
1380 | * multiple of this. |
1381 | * @erase_block_size: Erase block size. Erase offset and size must be a |
1382 | * multiple of this. |
1383 | * @protect_block_size: Protection block size. Protection offset and size |
1384 | * must be a multiple of this. |
1385 | * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if |
1386 | * size is exactly this and offset is a multiple of this. |
1387 | * For example, an EC may have a write buffer which can do |
1388 | * half-page operations if data is aligned, and a slower |
1389 | * word-at-a-time write mode. |
1390 | * @flags: Flags; see EC_FLASH_INFO_* |
1391 | * |
1392 | * Version 1 returns the same initial fields as version 0, with additional |
1393 | * fields following. |
1394 | * |
1395 | * gcc anonymous structs don't seem to get along with the __packed directive; |
1396 | * if they did we'd define the version 0 structure as a sub-structure of this |
1397 | * one. |
1398 | * |
1399 | * Version 2 supports flash banks of different sizes: |
1400 | * The caller specified the number of banks it has preallocated |
1401 | * (num_banks_desc) |
1402 | * The EC returns the number of banks describing the flash memory. |
1403 | * It adds banks descriptions up to num_banks_desc. |
1404 | */ |
1405 | struct ec_response_flash_info_1 { |
1406 | /* Version 0 fields; see above for description */ |
1407 | uint32_t flash_size; |
1408 | uint32_t write_block_size; |
1409 | uint32_t erase_block_size; |
1410 | uint32_t protect_block_size; |
1411 | |
1412 | /* Version 1 adds these fields: */ |
1413 | uint32_t write_ideal_size; |
1414 | uint32_t flags; |
1415 | } __ec_align4; |
1416 | |
1417 | struct ec_params_flash_info_2 { |
1418 | /* Number of banks to describe */ |
1419 | uint16_t num_banks_desc; |
1420 | /* Reserved; set 0; ignore on read */ |
1421 | uint8_t reserved[2]; |
1422 | } __ec_align4; |
1423 | |
1424 | struct ec_flash_bank { |
1425 | /* Number of sector is in this bank. */ |
1426 | uint16_t count; |
1427 | /* Size in power of 2 of each sector (8 --> 256 bytes) */ |
1428 | uint8_t size_exp; |
1429 | /* Minimal write size for the sectors in this bank */ |
1430 | uint8_t write_size_exp; |
1431 | /* Erase size for the sectors in this bank */ |
1432 | uint8_t erase_size_exp; |
1433 | /* Size for write protection, usually identical to erase size. */ |
1434 | uint8_t protect_size_exp; |
1435 | /* Reserved; set 0; ignore on read */ |
1436 | uint8_t reserved[2]; |
1437 | }; |
1438 | |
1439 | struct ec_response_flash_info_2 { |
1440 | /* Total flash in the EC. */ |
1441 | uint32_t flash_size; |
1442 | /* Flags; see EC_FLASH_INFO_* */ |
1443 | uint32_t flags; |
1444 | /* Maximum size to use to send data to write to the EC. */ |
1445 | uint32_t write_ideal_size; |
1446 | /* Number of banks present in the EC. */ |
1447 | uint16_t num_banks_total; |
1448 | /* Number of banks described in banks array. */ |
1449 | uint16_t num_banks_desc; |
1450 | struct ec_flash_bank banks[]; |
1451 | } __ec_align4; |
1452 | |
1453 | /* |
1454 | * Read flash |
1455 | * |
1456 | * Response is params.size bytes of data. |
1457 | */ |
1458 | #define EC_CMD_FLASH_READ 0x0011 |
1459 | |
1460 | /** |
1461 | * struct ec_params_flash_read - Parameters for the flash read command. |
1462 | * @offset: Byte offset to read. |
1463 | * @size: Size to read in bytes. |
1464 | */ |
1465 | struct ec_params_flash_read { |
1466 | uint32_t offset; |
1467 | uint32_t size; |
1468 | } __ec_align4; |
1469 | |
1470 | /* Write flash */ |
1471 | #define EC_CMD_FLASH_WRITE 0x0012 |
1472 | #define EC_VER_FLASH_WRITE 1 |
1473 | |
1474 | /* Version 0 of the flash command supported only 64 bytes of data */ |
1475 | #define EC_FLASH_WRITE_VER0_SIZE 64 |
1476 | |
1477 | /** |
1478 | * struct ec_params_flash_write - Parameters for the flash write command. |
1479 | * @offset: Byte offset to write. |
1480 | * @size: Size to write in bytes. |
1481 | */ |
1482 | struct ec_params_flash_write { |
1483 | uint32_t offset; |
1484 | uint32_t size; |
1485 | /* Followed by data to write */ |
1486 | } __ec_align4; |
1487 | |
1488 | /* Erase flash */ |
1489 | #define EC_CMD_FLASH_ERASE 0x0013 |
1490 | |
1491 | /** |
1492 | * struct ec_params_flash_erase - Parameters for the flash erase command, v0. |
1493 | * @offset: Byte offset to erase. |
1494 | * @size: Size to erase in bytes. |
1495 | */ |
1496 | struct ec_params_flash_erase { |
1497 | uint32_t offset; |
1498 | uint32_t size; |
1499 | } __ec_align4; |
1500 | |
1501 | /* |
1502 | * v1 add async erase: |
1503 | * subcommands can returns: |
1504 | * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). |
1505 | * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. |
1506 | * EC_RES_ERROR : other errors. |
1507 | * EC_RES_BUSY : an existing erase operation is in progress. |
1508 | * EC_RES_ACCESS_DENIED: Trying to erase running image. |
1509 | * |
1510 | * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just |
1511 | * properly queued. The user must call ERASE_GET_RESULT subcommand to get |
1512 | * the proper result. |
1513 | * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send |
1514 | * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. |
1515 | * ERASE_GET_RESULT command may timeout on EC where flash access is not |
1516 | * permitted while erasing. (For instance, STM32F4). |
1517 | */ |
1518 | enum ec_flash_erase_cmd { |
1519 | FLASH_ERASE_SECTOR, /* Erase and wait for result */ |
1520 | FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ |
1521 | FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ |
1522 | }; |
1523 | |
1524 | /** |
1525 | * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. |
1526 | * @cmd: One of ec_flash_erase_cmd. |
1527 | * @reserved: Pad byte; currently always contains 0. |
1528 | * @flag: No flags defined yet; set to 0. |
1529 | * @params: Same as v0 parameters. |
1530 | */ |
1531 | struct ec_params_flash_erase_v1 { |
1532 | uint8_t cmd; |
1533 | uint8_t reserved; |
1534 | uint16_t flag; |
1535 | struct ec_params_flash_erase params; |
1536 | } __ec_align4; |
1537 | |
1538 | /* |
1539 | * Get/set flash protection. |
1540 | * |
1541 | * If mask!=0, sets/clear the requested bits of flags. Depending on the |
1542 | * firmware write protect GPIO, not all flags will take effect immediately; |
1543 | * some flags require a subsequent hard reset to take effect. Check the |
1544 | * returned flags bits to see what actually happened. |
1545 | * |
1546 | * If mask=0, simply returns the current flags state. |
1547 | */ |
1548 | #define EC_CMD_FLASH_PROTECT 0x0015 |
1549 | #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ |
1550 | |
1551 | /* Flags for flash protection */ |
1552 | /* RO flash code protected when the EC boots */ |
1553 | #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) |
1554 | /* |
1555 | * RO flash code protected now. If this bit is set, at-boot status cannot |
1556 | * be changed. |
1557 | */ |
1558 | #define EC_FLASH_PROTECT_RO_NOW BIT(1) |
1559 | /* Entire flash code protected now, until reboot. */ |
1560 | #define EC_FLASH_PROTECT_ALL_NOW BIT(2) |
1561 | /* Flash write protect GPIO is asserted now */ |
1562 | #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) |
1563 | /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ |
1564 | #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) |
1565 | /* |
1566 | * Error - flash protection is in inconsistent state. At least one bank of |
1567 | * flash which should be protected is not protected. Usually fixed by |
1568 | * re-requesting the desired flags, or by a hard reset if that fails. |
1569 | */ |
1570 | #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) |
1571 | /* Entire flash code protected when the EC boots */ |
1572 | #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) |
1573 | /* RW flash code protected when the EC boots */ |
1574 | #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) |
1575 | /* RW flash code protected now. */ |
1576 | #define EC_FLASH_PROTECT_RW_NOW BIT(8) |
1577 | /* Rollback information flash region protected when the EC boots */ |
1578 | #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) |
1579 | /* Rollback information flash region protected now */ |
1580 | #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) |
1581 | |
1582 | |
1583 | /** |
1584 | * struct ec_params_flash_protect - Parameters for the flash protect command. |
1585 | * @mask: Bits in flags to apply. |
1586 | * @flags: New flags to apply. |
1587 | */ |
1588 | struct ec_params_flash_protect { |
1589 | uint32_t mask; |
1590 | uint32_t flags; |
1591 | } __ec_align4; |
1592 | |
1593 | /** |
1594 | * struct ec_response_flash_protect - Response to the flash protect command. |
1595 | * @flags: Current value of flash protect flags. |
1596 | * @valid_flags: Flags which are valid on this platform. This allows the |
1597 | * caller to distinguish between flags which aren't set vs. flags |
1598 | * which can't be set on this platform. |
1599 | * @writable_flags: Flags which can be changed given the current protection |
1600 | * state. |
1601 | */ |
1602 | struct ec_response_flash_protect { |
1603 | uint32_t flags; |
1604 | uint32_t valid_flags; |
1605 | uint32_t writable_flags; |
1606 | } __ec_align4; |
1607 | |
1608 | /* |
1609 | * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash |
1610 | * write protect. These commands may be reused with version > 0. |
1611 | */ |
1612 | |
1613 | /* Get the region offset/size */ |
1614 | #define EC_CMD_FLASH_REGION_INFO 0x0016 |
1615 | #define EC_VER_FLASH_REGION_INFO 1 |
1616 | |
1617 | enum ec_flash_region { |
1618 | /* Region which holds read-only EC image */ |
1619 | EC_FLASH_REGION_RO = 0, |
1620 | /* |
1621 | * Region which holds active RW image. 'Active' is different from |
1622 | * 'running'. Active means 'scheduled-to-run'. Since RO image always |
1623 | * scheduled to run, active/non-active applies only to RW images (for |
1624 | * the same reason 'update' applies only to RW images. It's a state of |
1625 | * an image on a flash. Running image can be RO, RW_A, RW_B but active |
1626 | * image can only be RW_A or RW_B. In recovery mode, an active RW image |
1627 | * doesn't enter 'running' state but it's still active on a flash. |
1628 | */ |
1629 | EC_FLASH_REGION_ACTIVE, |
1630 | /* |
1631 | * Region which should be write-protected in the factory (a superset of |
1632 | * EC_FLASH_REGION_RO) |
1633 | */ |
1634 | EC_FLASH_REGION_WP_RO, |
1635 | /* Region which holds updatable (non-active) RW image */ |
1636 | EC_FLASH_REGION_UPDATE, |
1637 | /* Number of regions */ |
1638 | EC_FLASH_REGION_COUNT, |
1639 | }; |
1640 | /* |
1641 | * 'RW' is vague if there are multiple RW images; we mean the active one, |
1642 | * so the old constant is deprecated. |
1643 | */ |
1644 | #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE |
1645 | |
1646 | /** |
1647 | * struct ec_params_flash_region_info - Parameters for the flash region info |
1648 | * command. |
1649 | * @region: Flash region; see EC_FLASH_REGION_* |
1650 | */ |
1651 | struct ec_params_flash_region_info { |
1652 | uint32_t region; |
1653 | } __ec_align4; |
1654 | |
1655 | struct ec_response_flash_region_info { |
1656 | uint32_t offset; |
1657 | uint32_t size; |
1658 | } __ec_align4; |
1659 | |
1660 | /* Read/write VbNvContext */ |
1661 | #define EC_CMD_VBNV_CONTEXT 0x0017 |
1662 | #define EC_VER_VBNV_CONTEXT 1 |
1663 | #define EC_VBNV_BLOCK_SIZE 16 |
1664 | |
1665 | enum ec_vbnvcontext_op { |
1666 | EC_VBNV_CONTEXT_OP_READ, |
1667 | EC_VBNV_CONTEXT_OP_WRITE, |
1668 | }; |
1669 | |
1670 | struct ec_params_vbnvcontext { |
1671 | uint32_t op; |
1672 | uint8_t block[EC_VBNV_BLOCK_SIZE]; |
1673 | } __ec_align4; |
1674 | |
1675 | struct ec_response_vbnvcontext { |
1676 | uint8_t block[EC_VBNV_BLOCK_SIZE]; |
1677 | } __ec_align4; |
1678 | |
1679 | |
1680 | /* Get SPI flash information */ |
1681 | #define EC_CMD_FLASH_SPI_INFO 0x0018 |
1682 | |
1683 | struct ec_response_flash_spi_info { |
1684 | /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ |
1685 | uint8_t jedec[3]; |
1686 | |
1687 | /* Pad byte; currently always contains 0 */ |
1688 | uint8_t reserved0; |
1689 | |
1690 | /* Manufacturer / device ID from command 0x90 */ |
1691 | uint8_t mfr_dev_id[2]; |
1692 | |
1693 | /* Status registers from command 0x05 and 0x35 */ |
1694 | uint8_t sr1, sr2; |
1695 | } __ec_align1; |
1696 | |
1697 | |
1698 | /* Select flash during flash operations */ |
1699 | #define EC_CMD_FLASH_SELECT 0x0019 |
1700 | |
1701 | /** |
1702 | * struct ec_params_flash_select - Parameters for the flash select command. |
1703 | * @select: 1 to select flash, 0 to deselect flash |
1704 | */ |
1705 | struct ec_params_flash_select { |
1706 | uint8_t select; |
1707 | } __ec_align4; |
1708 | |
1709 | |
1710 | /*****************************************************************************/ |
1711 | /* PWM commands */ |
1712 | |
1713 | /* Get fan target RPM */ |
1714 | #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 |
1715 | |
1716 | struct ec_response_pwm_get_fan_rpm { |
1717 | uint32_t rpm; |
1718 | } __ec_align4; |
1719 | |
1720 | /* Set target fan RPM */ |
1721 | #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 |
1722 | |
1723 | /* Version 0 of input params */ |
1724 | struct ec_params_pwm_set_fan_target_rpm_v0 { |
1725 | uint32_t rpm; |
1726 | } __ec_align4; |
1727 | |
1728 | /* Version 1 of input params */ |
1729 | struct ec_params_pwm_set_fan_target_rpm_v1 { |
1730 | uint32_t rpm; |
1731 | uint8_t fan_idx; |
1732 | } __ec_align_size1; |
1733 | |
1734 | /* Get keyboard backlight */ |
1735 | /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ |
1736 | #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 |
1737 | |
1738 | struct ec_response_pwm_get_keyboard_backlight { |
1739 | uint8_t percent; |
1740 | uint8_t enabled; |
1741 | } __ec_align1; |
1742 | |
1743 | /* Set keyboard backlight */ |
1744 | /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ |
1745 | #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 |
1746 | |
1747 | struct ec_params_pwm_set_keyboard_backlight { |
1748 | uint8_t percent; |
1749 | } __ec_align1; |
1750 | |
1751 | /* Set target fan PWM duty cycle */ |
1752 | #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 |
1753 | |
1754 | /* Version 0 of input params */ |
1755 | struct ec_params_pwm_set_fan_duty_v0 { |
1756 | uint32_t percent; |
1757 | } __ec_align4; |
1758 | |
1759 | /* Version 1 of input params */ |
1760 | struct ec_params_pwm_set_fan_duty_v1 { |
1761 | uint32_t percent; |
1762 | uint8_t fan_idx; |
1763 | } __ec_align_size1; |
1764 | |
1765 | #define EC_CMD_PWM_SET_DUTY 0x0025 |
1766 | /* 16 bit duty cycle, 0xffff = 100% */ |
1767 | #define EC_PWM_MAX_DUTY 0xffff |
1768 | |
1769 | enum ec_pwm_type { |
1770 | /* All types, indexed by board-specific enum pwm_channel */ |
1771 | EC_PWM_TYPE_GENERIC = 0, |
1772 | /* Keyboard backlight */ |
1773 | EC_PWM_TYPE_KB_LIGHT, |
1774 | /* Display backlight */ |
1775 | EC_PWM_TYPE_DISPLAY_LIGHT, |
1776 | EC_PWM_TYPE_COUNT, |
1777 | }; |
1778 | |
1779 | struct ec_params_pwm_set_duty { |
1780 | uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ |
1781 | uint8_t pwm_type; /* ec_pwm_type */ |
1782 | uint8_t index; /* Type-specific index, or 0 if unique */ |
1783 | } __ec_align4; |
1784 | |
1785 | #define EC_CMD_PWM_GET_DUTY 0x0026 |
1786 | |
1787 | struct ec_params_pwm_get_duty { |
1788 | uint8_t pwm_type; /* ec_pwm_type */ |
1789 | uint8_t index; /* Type-specific index, or 0 if unique */ |
1790 | } __ec_align1; |
1791 | |
1792 | struct ec_response_pwm_get_duty { |
1793 | uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ |
1794 | } __ec_align2; |
1795 | |
1796 | /*****************************************************************************/ |
1797 | /* |
1798 | * Lightbar commands. This looks worse than it is. Since we only use one HOST |
1799 | * command to say "talk to the lightbar", we put the "and tell it to do X" part |
1800 | * into a subcommand. We'll make separate structs for subcommands with |
1801 | * different input args, so that we know how much to expect. |
1802 | */ |
1803 | #define EC_CMD_LIGHTBAR_CMD 0x0028 |
1804 | |
1805 | struct rgb_s { |
1806 | uint8_t r, g, b; |
1807 | } __ec_todo_unpacked; |
1808 | |
1809 | #define LB_BATTERY_LEVELS 4 |
1810 | |
1811 | /* |
1812 | * List of tweakable parameters. NOTE: It's __packed so it can be sent in a |
1813 | * host command, but the alignment is the same regardless. Keep it that way. |
1814 | */ |
1815 | struct lightbar_params_v0 { |
1816 | /* Timing */ |
1817 | int32_t google_ramp_up; |
1818 | int32_t google_ramp_down; |
1819 | int32_t s3s0_ramp_up; |
1820 | int32_t s0_tick_delay[2]; /* AC=0/1 */ |
1821 | int32_t s0a_tick_delay[2]; /* AC=0/1 */ |
1822 | int32_t s0s3_ramp_down; |
1823 | int32_t s3_sleep_for; |
1824 | int32_t s3_ramp_up; |
1825 | int32_t s3_ramp_down; |
1826 | |
1827 | /* Oscillation */ |
1828 | uint8_t new_s0; |
1829 | uint8_t osc_min[2]; /* AC=0/1 */ |
1830 | uint8_t osc_max[2]; /* AC=0/1 */ |
1831 | uint8_t w_ofs[2]; /* AC=0/1 */ |
1832 | |
1833 | /* Brightness limits based on the backlight and AC. */ |
1834 | uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ |
1835 | uint8_t bright_bl_on_min[2]; /* AC=0/1 */ |
1836 | uint8_t bright_bl_on_max[2]; /* AC=0/1 */ |
1837 | |
1838 | /* Battery level thresholds */ |
1839 | uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; |
1840 | |
1841 | /* Map [AC][battery_level] to color index */ |
1842 | uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ |
1843 | uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ |
1844 | |
1845 | /* Color palette */ |
1846 | struct rgb_s color[8]; /* 0-3 are Google colors */ |
1847 | } __ec_todo_packed; |
1848 | |
1849 | struct lightbar_params_v1 { |
1850 | /* Timing */ |
1851 | int32_t google_ramp_up; |
1852 | int32_t google_ramp_down; |
1853 | int32_t s3s0_ramp_up; |
1854 | int32_t s0_tick_delay[2]; /* AC=0/1 */ |
1855 | int32_t s0a_tick_delay[2]; /* AC=0/1 */ |
1856 | int32_t s0s3_ramp_down; |
1857 | int32_t s3_sleep_for; |
1858 | int32_t s3_ramp_up; |
1859 | int32_t s3_ramp_down; |
1860 | int32_t s5_ramp_up; |
1861 | int32_t s5_ramp_down; |
1862 | int32_t tap_tick_delay; |
1863 | int32_t tap_gate_delay; |
1864 | int32_t tap_display_time; |
1865 | |
1866 | /* Tap-for-battery params */ |
1867 | uint8_t tap_pct_red; |
1868 | uint8_t tap_pct_green; |
1869 | uint8_t tap_seg_min_on; |
1870 | uint8_t tap_seg_max_on; |
1871 | uint8_t tap_seg_osc; |
1872 | uint8_t tap_idx[3]; |
1873 | |
1874 | /* Oscillation */ |
1875 | uint8_t osc_min[2]; /* AC=0/1 */ |
1876 | uint8_t osc_max[2]; /* AC=0/1 */ |
1877 | uint8_t w_ofs[2]; /* AC=0/1 */ |
1878 | |
1879 | /* Brightness limits based on the backlight and AC. */ |
1880 | uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ |
1881 | uint8_t bright_bl_on_min[2]; /* AC=0/1 */ |
1882 | uint8_t bright_bl_on_max[2]; /* AC=0/1 */ |
1883 | |
1884 | /* Battery level thresholds */ |
1885 | uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; |
1886 | |
1887 | /* Map [AC][battery_level] to color index */ |
1888 | uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ |
1889 | uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ |
1890 | |
1891 | /* s5: single color pulse on inhibited power-up */ |
1892 | uint8_t s5_idx; |
1893 | |
1894 | /* Color palette */ |
1895 | struct rgb_s color[8]; /* 0-3 are Google colors */ |
1896 | } __ec_todo_packed; |
1897 | |
1898 | /* Lightbar command params v2 |
1899 | * crbug.com/467716 |
1900 | * |
1901 | * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by |
1902 | * logical groups to make it more manageable ( < 120 bytes). |
1903 | * |
1904 | * NOTE: Each of these groups must be less than 120 bytes. |
1905 | */ |
1906 | |
1907 | struct lightbar_params_v2_timing { |
1908 | /* Timing */ |
1909 | int32_t google_ramp_up; |
1910 | int32_t google_ramp_down; |
1911 | int32_t s3s0_ramp_up; |
1912 | int32_t s0_tick_delay[2]; /* AC=0/1 */ |
1913 | int32_t s0a_tick_delay[2]; /* AC=0/1 */ |
1914 | int32_t s0s3_ramp_down; |
1915 | int32_t s3_sleep_for; |
1916 | int32_t s3_ramp_up; |
1917 | int32_t s3_ramp_down; |
1918 | int32_t s5_ramp_up; |
1919 | int32_t s5_ramp_down; |
1920 | int32_t tap_tick_delay; |
1921 | int32_t tap_gate_delay; |
1922 | int32_t tap_display_time; |
1923 | } __ec_todo_packed; |
1924 | |
1925 | struct lightbar_params_v2_tap { |
1926 | /* Tap-for-battery params */ |
1927 | uint8_t tap_pct_red; |
1928 | uint8_t tap_pct_green; |
1929 | uint8_t tap_seg_min_on; |
1930 | uint8_t tap_seg_max_on; |
1931 | uint8_t tap_seg_osc; |
1932 | uint8_t tap_idx[3]; |
1933 | } __ec_todo_packed; |
1934 | |
1935 | struct lightbar_params_v2_oscillation { |
1936 | /* Oscillation */ |
1937 | uint8_t osc_min[2]; /* AC=0/1 */ |
1938 | uint8_t osc_max[2]; /* AC=0/1 */ |
1939 | uint8_t w_ofs[2]; /* AC=0/1 */ |
1940 | } __ec_todo_packed; |
1941 | |
1942 | struct lightbar_params_v2_brightness { |
1943 | /* Brightness limits based on the backlight and AC. */ |
1944 | uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ |
1945 | uint8_t bright_bl_on_min[2]; /* AC=0/1 */ |
1946 | uint8_t bright_bl_on_max[2]; /* AC=0/1 */ |
1947 | } __ec_todo_packed; |
1948 | |
1949 | struct lightbar_params_v2_thresholds { |
1950 | /* Battery level thresholds */ |
1951 | uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; |
1952 | } __ec_todo_packed; |
1953 | |
1954 | struct lightbar_params_v2_colors { |
1955 | /* Map [AC][battery_level] to color index */ |
1956 | uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ |
1957 | uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ |
1958 | |
1959 | /* s5: single color pulse on inhibited power-up */ |
1960 | uint8_t s5_idx; |
1961 | |
1962 | /* Color palette */ |
1963 | struct rgb_s color[8]; /* 0-3 are Google colors */ |
1964 | } __ec_todo_packed; |
1965 | |
1966 | /* Lightbar program. */ |
1967 | #define EC_LB_PROG_LEN 192 |
1968 | struct lightbar_program { |
1969 | uint8_t size; |
1970 | uint8_t data[EC_LB_PROG_LEN]; |
1971 | } __ec_todo_unpacked; |
1972 | |
1973 | struct ec_params_lightbar { |
1974 | uint8_t cmd; /* Command (see enum lightbar_command) */ |
1975 | union { |
1976 | /* |
1977 | * The following commands have no args: |
1978 | * |
1979 | * dump, off, on, init, get_seq, get_params_v0, get_params_v1, |
1980 | * version, get_brightness, get_demo, suspend, resume, |
1981 | * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, |
1982 | * get_params_v2_bright, get_params_v2_thlds, |
1983 | * get_params_v2_colors |
1984 | * |
1985 | * Don't use an empty struct, because C++ hates that. |
1986 | */ |
1987 | |
1988 | struct __ec_todo_unpacked { |
1989 | uint8_t num; |
1990 | } set_brightness, seq, demo; |
1991 | |
1992 | struct __ec_todo_unpacked { |
1993 | uint8_t ctrl, reg, value; |
1994 | } reg; |
1995 | |
1996 | struct __ec_todo_unpacked { |
1997 | uint8_t led, red, green, blue; |
1998 | } set_rgb; |
1999 | |
2000 | struct __ec_todo_unpacked { |
2001 | uint8_t led; |
2002 | } get_rgb; |
2003 | |
2004 | struct __ec_todo_unpacked { |
2005 | uint8_t enable; |
2006 | } manual_suspend_ctrl; |
2007 | |
2008 | struct lightbar_params_v0 set_params_v0; |
2009 | struct lightbar_params_v1 set_params_v1; |
2010 | |
2011 | struct lightbar_params_v2_timing set_v2par_timing; |
2012 | struct lightbar_params_v2_tap set_v2par_tap; |
2013 | struct lightbar_params_v2_oscillation set_v2par_osc; |
2014 | struct lightbar_params_v2_brightness set_v2par_bright; |
2015 | struct lightbar_params_v2_thresholds set_v2par_thlds; |
2016 | struct lightbar_params_v2_colors set_v2par_colors; |
2017 | |
2018 | struct lightbar_program set_program; |
2019 | }; |
2020 | } __ec_todo_packed; |
2021 | |
2022 | struct ec_response_lightbar { |
2023 | union { |
2024 | struct __ec_todo_unpacked { |
2025 | struct __ec_todo_unpacked { |
2026 | uint8_t reg; |
2027 | uint8_t ic0; |
2028 | uint8_t ic1; |
2029 | } vals[23]; |
2030 | } dump; |
2031 | |
2032 | struct __ec_todo_unpacked { |
2033 | uint8_t num; |
2034 | } get_seq, get_brightness, get_demo; |
2035 | |
2036 | struct lightbar_params_v0 get_params_v0; |
2037 | struct lightbar_params_v1 get_params_v1; |
2038 | |
2039 | |
2040 | struct lightbar_params_v2_timing get_params_v2_timing; |
2041 | struct lightbar_params_v2_tap get_params_v2_tap; |
2042 | struct lightbar_params_v2_oscillation get_params_v2_osc; |
2043 | struct lightbar_params_v2_brightness get_params_v2_bright; |
2044 | struct lightbar_params_v2_thresholds get_params_v2_thlds; |
2045 | struct lightbar_params_v2_colors get_params_v2_colors; |
2046 | |
2047 | struct __ec_todo_unpacked { |
2048 | uint32_t num; |
2049 | uint32_t flags; |
2050 | } version; |
2051 | |
2052 | struct __ec_todo_unpacked { |
2053 | uint8_t red, green, blue; |
2054 | } get_rgb; |
2055 | |
2056 | /* |
2057 | * The following commands have no response: |
2058 | * |
2059 | * off, on, init, set_brightness, seq, reg, set_rgb, demo, |
2060 | * set_params_v0, set_params_v1, set_program, |
2061 | * manual_suspend_ctrl, suspend, resume, set_v2par_timing, |
2062 | * set_v2par_tap, set_v2par_osc, set_v2par_bright, |
2063 | * set_v2par_thlds, set_v2par_colors |
2064 | */ |
2065 | }; |
2066 | } __ec_todo_packed; |
2067 | |
2068 | /* Lightbar commands */ |
2069 | enum lightbar_command { |
2070 | LIGHTBAR_CMD_DUMP = 0, |
2071 | LIGHTBAR_CMD_OFF = 1, |
2072 | LIGHTBAR_CMD_ON = 2, |
2073 | LIGHTBAR_CMD_INIT = 3, |
2074 | LIGHTBAR_CMD_SET_BRIGHTNESS = 4, |
2075 | LIGHTBAR_CMD_SEQ = 5, |
2076 | LIGHTBAR_CMD_REG = 6, |
2077 | LIGHTBAR_CMD_SET_RGB = 7, |
2078 | LIGHTBAR_CMD_GET_SEQ = 8, |
2079 | LIGHTBAR_CMD_DEMO = 9, |
2080 | LIGHTBAR_CMD_GET_PARAMS_V0 = 10, |
2081 | LIGHTBAR_CMD_SET_PARAMS_V0 = 11, |
2082 | LIGHTBAR_CMD_VERSION = 12, |
2083 | LIGHTBAR_CMD_GET_BRIGHTNESS = 13, |
2084 | LIGHTBAR_CMD_GET_RGB = 14, |
2085 | LIGHTBAR_CMD_GET_DEMO = 15, |
2086 | LIGHTBAR_CMD_GET_PARAMS_V1 = 16, |
2087 | LIGHTBAR_CMD_SET_PARAMS_V1 = 17, |
2088 | LIGHTBAR_CMD_SET_PROGRAM = 18, |
2089 | LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, |
2090 | LIGHTBAR_CMD_SUSPEND = 20, |
2091 | LIGHTBAR_CMD_RESUME = 21, |
2092 | LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, |
2093 | LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, |
2094 | LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, |
2095 | LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, |
2096 | LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, |
2097 | LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, |
2098 | LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, |
2099 | LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, |
2100 | LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, |
2101 | LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, |
2102 | LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, |
2103 | LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, |
2104 | LIGHTBAR_NUM_CMDS |
2105 | }; |
2106 | |
2107 | /*****************************************************************************/ |
2108 | /* LED control commands */ |
2109 | |
2110 | #define EC_CMD_LED_CONTROL 0x0029 |
2111 | |
2112 | enum ec_led_id { |
2113 | /* LED to indicate battery state of charge */ |
2114 | EC_LED_ID_BATTERY_LED = 0, |
2115 | /* |
2116 | * LED to indicate system power state (on or in suspend). |
2117 | * May be on power button or on C-panel. |
2118 | */ |
2119 | EC_LED_ID_POWER_LED, |
2120 | /* LED on power adapter or its plug */ |
2121 | EC_LED_ID_ADAPTER_LED, |
2122 | /* LED to indicate left side */ |
2123 | EC_LED_ID_LEFT_LED, |
2124 | /* LED to indicate right side */ |
2125 | EC_LED_ID_RIGHT_LED, |
2126 | /* LED to indicate recovery mode with HW_REINIT */ |
2127 | EC_LED_ID_RECOVERY_HW_REINIT_LED, |
2128 | /* LED to indicate sysrq debug mode. */ |
2129 | EC_LED_ID_SYSRQ_DEBUG_LED, |
2130 | |
2131 | EC_LED_ID_COUNT |
2132 | }; |
2133 | |
2134 | /* LED control flags */ |
2135 | #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ |
2136 | #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ |
2137 | |
2138 | enum ec_led_colors { |
2139 | EC_LED_COLOR_RED = 0, |
2140 | EC_LED_COLOR_GREEN, |
2141 | EC_LED_COLOR_BLUE, |
2142 | EC_LED_COLOR_YELLOW, |
2143 | EC_LED_COLOR_WHITE, |
2144 | EC_LED_COLOR_AMBER, |
2145 | |
2146 | EC_LED_COLOR_COUNT |
2147 | }; |
2148 | |
2149 | struct ec_params_led_control { |
2150 | uint8_t led_id; /* Which LED to control */ |
2151 | uint8_t flags; /* Control flags */ |
2152 | |
2153 | uint8_t brightness[EC_LED_COLOR_COUNT]; |
2154 | } __ec_align1; |
2155 | |
2156 | struct ec_response_led_control { |
2157 | /* |
2158 | * Available brightness value range. |
2159 | * |
2160 | * Range 0 means color channel not present. |
2161 | * Range 1 means on/off control. |
2162 | * Other values means the LED is control by PWM. |
2163 | */ |
2164 | uint8_t brightness_range[EC_LED_COLOR_COUNT]; |
2165 | } __ec_align1; |
2166 | |
2167 | /*****************************************************************************/ |
2168 | /* Verified boot commands */ |
2169 | |
2170 | /* |
2171 | * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be |
2172 | * reused for other purposes with version > 0. |
2173 | */ |
2174 | |
2175 | /* Verified boot hash command */ |
2176 | #define EC_CMD_VBOOT_HASH 0x002A |
2177 | |
2178 | struct ec_params_vboot_hash { |
2179 | uint8_t cmd; /* enum ec_vboot_hash_cmd */ |
2180 | uint8_t hash_type; /* enum ec_vboot_hash_type */ |
2181 | uint8_t nonce_size; /* Nonce size; may be 0 */ |
2182 | uint8_t reserved0; /* Reserved; set 0 */ |
2183 | uint32_t offset; /* Offset in flash to hash */ |
2184 | uint32_t size; /* Number of bytes to hash */ |
2185 | uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ |
2186 | } __ec_align4; |
2187 | |
2188 | struct ec_response_vboot_hash { |
2189 | uint8_t status; /* enum ec_vboot_hash_status */ |
2190 | uint8_t hash_type; /* enum ec_vboot_hash_type */ |
2191 | uint8_t digest_size; /* Size of hash digest in bytes */ |
2192 | uint8_t reserved0; /* Ignore; will be 0 */ |
2193 | uint32_t offset; /* Offset in flash which was hashed */ |
2194 | uint32_t size; /* Number of bytes hashed */ |
2195 | uint8_t hash_digest[64]; /* Hash digest data */ |
2196 | } __ec_align4; |
2197 | |
2198 | enum ec_vboot_hash_cmd { |
2199 | EC_VBOOT_HASH_GET = 0, /* Get current hash status */ |
2200 | EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ |
2201 | EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ |
2202 | EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ |
2203 | }; |
2204 | |
2205 | enum ec_vboot_hash_type { |
2206 | EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ |
2207 | }; |
2208 | |
2209 | enum ec_vboot_hash_status { |
2210 | EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ |
2211 | EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ |
2212 | EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ |
2213 | }; |
2214 | |
2215 | /* |
2216 | * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. |
2217 | * If one of these is specified, the EC will automatically update offset and |
2218 | * size to the correct values for the specified image (RO or RW). |
2219 | */ |
2220 | #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe |
2221 | #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd |
2222 | #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc |
2223 | |
2224 | /* |
2225 | * 'RW' is vague if there are multiple RW images; we mean the active one, |
2226 | * so the old constant is deprecated. |
2227 | */ |
2228 | #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE |
2229 | |
2230 | /*****************************************************************************/ |
2231 | /* |
2232 | * Motion sense commands. We'll make separate structs for sub-commands with |
2233 | * different input args, so that we know how much to expect. |
2234 | */ |
2235 | #define EC_CMD_MOTION_SENSE_CMD 0x002B |
2236 | |
2237 | /* Motion sense commands */ |
2238 | enum motionsense_command { |
2239 | /* |
2240 | * Dump command returns all motion sensor data including motion sense |
2241 | * module flags and individual sensor flags. |
2242 | */ |
2243 | MOTIONSENSE_CMD_DUMP = 0, |
2244 | |
2245 | /* |
2246 | * Info command returns data describing the details of a given sensor, |
2247 | * including enum motionsensor_type, enum motionsensor_location, and |
2248 | * enum motionsensor_chip. |
2249 | */ |
2250 | MOTIONSENSE_CMD_INFO = 1, |
2251 | |
2252 | /* |
2253 | * EC Rate command is a setter/getter command for the EC sampling rate |
2254 | * in milliseconds. |
2255 | * It is per sensor, the EC run sample task at the minimum of all |
2256 | * sensors EC_RATE. |
2257 | * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR |
2258 | * to collect all the sensor samples. |
2259 | * For sensor with hardware FIFO, EC_RATE is used as the maximal delay |
2260 | * to process of all motion sensors in milliseconds. |
2261 | */ |
2262 | MOTIONSENSE_CMD_EC_RATE = 2, |
2263 | |
2264 | /* |
2265 | * Sensor ODR command is a setter/getter command for the output data |
2266 | * rate of a specific motion sensor in millihertz. |
2267 | */ |
2268 | MOTIONSENSE_CMD_SENSOR_ODR = 3, |
2269 | |
2270 | /* |
2271 | * Sensor range command is a setter/getter command for the range of |
2272 | * a specified motion sensor in +/-G's or +/- deg/s. |
2273 | */ |
2274 | MOTIONSENSE_CMD_SENSOR_RANGE = 4, |
2275 | |
2276 | /* |
2277 | * Setter/getter command for the keyboard wake angle. When the lid |
2278 | * angle is greater than this value, keyboard wake is disabled in S3, |
2279 | * and when the lid angle goes less than this value, keyboard wake is |
2280 | * enabled. Note, the lid angle measurement is an approximate, |
2281 | * un-calibrated value, hence the wake angle isn't exact. |
2282 | */ |
2283 | MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, |
2284 | |
2285 | /* |
2286 | * Returns a single sensor data. |
2287 | */ |
2288 | MOTIONSENSE_CMD_DATA = 6, |
2289 | |
2290 | /* |
2291 | * Return sensor fifo info. |
2292 | */ |
2293 | MOTIONSENSE_CMD_FIFO_INFO = 7, |
2294 | |
2295 | /* |
2296 | * Insert a flush element in the fifo and return sensor fifo info. |
2297 | * The host can use that element to synchronize its operation. |
2298 | */ |
2299 | MOTIONSENSE_CMD_FIFO_FLUSH = 8, |
2300 | |
2301 | /* |
2302 | * Return a portion of the fifo. |
2303 | */ |
2304 | MOTIONSENSE_CMD_FIFO_READ = 9, |
2305 | |
2306 | /* |
2307 | * Perform low level calibration. |
2308 | * On sensors that support it, ask to do offset calibration. |
2309 | */ |
2310 | MOTIONSENSE_CMD_PERFORM_CALIB = 10, |
2311 | |
2312 | /* |
2313 | * Sensor Offset command is a setter/getter command for the offset |
2314 | * used for calibration. |
2315 | * The offsets can be calculated by the host, or via |
2316 | * PERFORM_CALIB command. |
2317 | */ |
2318 | MOTIONSENSE_CMD_SENSOR_OFFSET = 11, |
2319 | |
2320 | /* |
2321 | * List available activities for a MOTION sensor. |
2322 | * Indicates if they are enabled or disabled. |
2323 | */ |
2324 | MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, |
2325 | |
2326 | /* |
2327 | * Activity management |
2328 | * Enable/Disable activity recognition. |
2329 | */ |
2330 | MOTIONSENSE_CMD_SET_ACTIVITY = 13, |
2331 | |
2332 | /* |
2333 | * Lid Angle |
2334 | */ |
2335 | MOTIONSENSE_CMD_LID_ANGLE = 14, |
2336 | |
2337 | /* |
2338 | * Allow the FIFO to trigger interrupt via MKBP events. |
2339 | * By default the FIFO does not send interrupt to process the FIFO |
2340 | * until the AP is ready or it is coming from a wakeup sensor. |
2341 | */ |
2342 | MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, |
2343 | |
2344 | /* |
2345 | * Spoof the readings of the sensors. The spoofed readings can be set |
2346 | * to arbitrary values, or will lock to the last read actual values. |
2347 | */ |
2348 | MOTIONSENSE_CMD_SPOOF = 16, |
2349 | |
2350 | /* Set lid angle for tablet mode detection. */ |
2351 | MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, |
2352 | |
2353 | /* |
2354 | * Sensor Scale command is a setter/getter command for the calibration |
2355 | * scale. |
2356 | */ |
2357 | MOTIONSENSE_CMD_SENSOR_SCALE = 18, |
2358 | |
2359 | /* Number of motionsense sub-commands. */ |
2360 | MOTIONSENSE_NUM_CMDS |
2361 | }; |
2362 | |
2363 | /* List of motion sensor types. */ |
2364 | enum motionsensor_type { |
2365 | MOTIONSENSE_TYPE_ACCEL = 0, |
2366 | MOTIONSENSE_TYPE_GYRO = 1, |
2367 | MOTIONSENSE_TYPE_MAG = 2, |
2368 | MOTIONSENSE_TYPE_PROX = 3, |
2369 | MOTIONSENSE_TYPE_LIGHT = 4, |
2370 | MOTIONSENSE_TYPE_ACTIVITY = 5, |
2371 | MOTIONSENSE_TYPE_BARO = 6, |
2372 | MOTIONSENSE_TYPE_SYNC = 7, |
2373 | MOTIONSENSE_TYPE_MAX, |
2374 | }; |
2375 | |
2376 | /* List of motion sensor locations. */ |
2377 | enum motionsensor_location { |
2378 | MOTIONSENSE_LOC_BASE = 0, |
2379 | MOTIONSENSE_LOC_LID = 1, |
2380 | MOTIONSENSE_LOC_CAMERA = 2, |
2381 | MOTIONSENSE_LOC_MAX, |
2382 | }; |
2383 | |
2384 | /* List of motion sensor chips. */ |
2385 | enum motionsensor_chip { |
2386 | MOTIONSENSE_CHIP_KXCJ9 = 0, |
2387 | MOTIONSENSE_CHIP_LSM6DS0 = 1, |
2388 | MOTIONSENSE_CHIP_BMI160 = 2, |
2389 | MOTIONSENSE_CHIP_SI1141 = 3, |
2390 | MOTIONSENSE_CHIP_SI1142 = 4, |
2391 | MOTIONSENSE_CHIP_SI1143 = 5, |
2392 | MOTIONSENSE_CHIP_KX022 = 6, |
2393 | MOTIONSENSE_CHIP_L3GD20H = 7, |
2394 | MOTIONSENSE_CHIP_BMA255 = 8, |
2395 | MOTIONSENSE_CHIP_BMP280 = 9, |
2396 | MOTIONSENSE_CHIP_OPT3001 = 10, |
2397 | MOTIONSENSE_CHIP_BH1730 = 11, |
2398 | MOTIONSENSE_CHIP_GPIO = 12, |
2399 | MOTIONSENSE_CHIP_LIS2DH = 13, |
2400 | MOTIONSENSE_CHIP_LSM6DSM = 14, |
2401 | MOTIONSENSE_CHIP_LIS2DE = 15, |
2402 | MOTIONSENSE_CHIP_LIS2MDL = 16, |
2403 | MOTIONSENSE_CHIP_LSM6DS3 = 17, |
2404 | MOTIONSENSE_CHIP_LSM6DSO = 18, |
2405 | MOTIONSENSE_CHIP_LNG2DM = 19, |
2406 | MOTIONSENSE_CHIP_MAX, |
2407 | }; |
2408 | |
2409 | /* List of orientation positions */ |
2410 | enum motionsensor_orientation { |
2411 | MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, |
2412 | MOTIONSENSE_ORIENTATION_PORTRAIT = 1, |
2413 | MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, |
2414 | MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, |
2415 | MOTIONSENSE_ORIENTATION_UNKNOWN = 4, |
2416 | }; |
2417 | |
2418 | struct ec_response_motion_sensor_data { |
2419 | /* Flags for each sensor. */ |
2420 | uint8_t flags; |
2421 | /* Sensor number the data comes from. */ |
2422 | uint8_t sensor_num; |
2423 | /* Each sensor is up to 3-axis. */ |
2424 | union { |
2425 | int16_t data[3]; |
2426 | struct __ec_todo_packed { |
2427 | uint16_t reserved; |
2428 | uint32_t timestamp; |
2429 | }; |
2430 | struct __ec_todo_unpacked { |
2431 | uint8_t activity; /* motionsensor_activity */ |
2432 | uint8_t state; |
2433 | int16_t add_info[2]; |
2434 | }; |
2435 | }; |
2436 | } __ec_todo_packed; |
2437 | |
2438 | /* Note: used in ec_response_get_next_data */ |
2439 | struct ec_response_motion_sense_fifo_info { |
2440 | /* Size of the fifo */ |
2441 | uint16_t size; |
2442 | /* Amount of space used in the fifo */ |
2443 | uint16_t count; |
2444 | /* Timestamp recorded in us. |
2445 | * aka accurate timestamp when host event was triggered. |
2446 | */ |
2447 | uint32_t timestamp; |
2448 | /* Total amount of vector lost */ |
2449 | uint16_t total_lost; |
2450 | /* Lost events since the last fifo_info, per sensors */ |
2451 | uint16_t lost[]; |
2452 | } __ec_todo_packed; |
2453 | |
2454 | struct ec_response_motion_sense_fifo_data { |
2455 | uint32_t number_data; |
2456 | struct ec_response_motion_sensor_data data[]; |
2457 | } __ec_todo_packed; |
2458 | |
2459 | /* List supported activity recognition */ |
2460 | enum motionsensor_activity { |
2461 | MOTIONSENSE_ACTIVITY_RESERVED = 0, |
2462 | MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, |
2463 | MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, |
2464 | MOTIONSENSE_ACTIVITY_ORIENTATION = 3, |
2465 | }; |
2466 | |
2467 | struct ec_motion_sense_activity { |
2468 | uint8_t sensor_num; |
2469 | uint8_t activity; /* one of enum motionsensor_activity */ |
2470 | uint8_t enable; /* 1: enable, 0: disable */ |
2471 | uint8_t reserved; |
2472 | uint16_t parameters[3]; /* activity dependent parameters */ |
2473 | } __ec_todo_unpacked; |
2474 | |
2475 | /* Module flag masks used for the dump sub-command. */ |
2476 | #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) |
2477 | |
2478 | /* Sensor flag masks used for the dump sub-command. */ |
2479 | #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) |
2480 | |
2481 | /* |
2482 | * Flush entry for synchronization. |
2483 | * data contains time stamp |
2484 | */ |
2485 | #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) |
2486 | #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) |
2487 | #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) |
2488 | #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) |
2489 | #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) |
2490 | |
2491 | /* |
2492 | * Send this value for the data element to only perform a read. If you |
2493 | * send any other value, the EC will interpret it as data to set and will |
2494 | * return the actual value set. |
2495 | */ |
2496 | #define EC_MOTION_SENSE_NO_VALUE -1 |
2497 | |
2498 | #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 |
2499 | |
2500 | /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ |
2501 | /* Set Calibration information */ |
2502 | #define MOTION_SENSE_SET_OFFSET BIT(0) |
2503 | |
2504 | /* Default Scale value, factor 1. */ |
2505 | #define MOTION_SENSE_DEFAULT_SCALE BIT(15) |
2506 | |
2507 | #define LID_ANGLE_UNRELIABLE 500 |
2508 | |
2509 | enum motionsense_spoof_mode { |
2510 | /* Disable spoof mode. */ |
2511 | MOTIONSENSE_SPOOF_MODE_DISABLE = 0, |
2512 | |
2513 | /* Enable spoof mode, but use provided component values. */ |
2514 | MOTIONSENSE_SPOOF_MODE_CUSTOM, |
2515 | |
2516 | /* Enable spoof mode, but use the current sensor values. */ |
2517 | MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, |
2518 | |
2519 | /* Query the current spoof mode status for the sensor. */ |
2520 | MOTIONSENSE_SPOOF_MODE_QUERY, |
2521 | }; |
2522 | |
2523 | struct ec_params_motion_sense { |
2524 | uint8_t cmd; |
2525 | union { |
2526 | /* Used for MOTIONSENSE_CMD_DUMP. */ |
2527 | struct __ec_todo_unpacked { |
2528 | /* |
2529 | * Maximal number of sensor the host is expecting. |
2530 | * 0 means the host is only interested in the number |
2531 | * of sensors controlled by the EC. |
2532 | */ |
2533 | uint8_t max_sensor_count; |
2534 | } dump; |
2535 | |
2536 | /* |
2537 | * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. |
2538 | */ |
2539 | struct __ec_todo_unpacked { |
2540 | /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. |
2541 | * kb_wake_angle: angle to wakup AP. |
2542 | */ |
2543 | int16_t data; |
2544 | } kb_wake_angle; |
2545 | |
2546 | /* |
2547 | * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA |
2548 | * and MOTIONSENSE_CMD_PERFORM_CALIB. |
2549 | */ |
2550 | struct __ec_todo_unpacked { |
2551 | uint8_t sensor_num; |
2552 | } info, info_3, data, fifo_flush, perform_calib, |
2553 | list_activities; |
2554 | |
2555 | /* |
2556 | * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR |
2557 | * and MOTIONSENSE_CMD_SENSOR_RANGE. |
2558 | */ |
2559 | struct __ec_todo_unpacked { |
2560 | uint8_t sensor_num; |
2561 | |
2562 | /* Rounding flag, true for round-up, false for down. */ |
2563 | uint8_t roundup; |
2564 | |
2565 | uint16_t reserved; |
2566 | |
2567 | /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ |
2568 | int32_t data; |
2569 | } ec_rate, sensor_odr, sensor_range; |
2570 | |
2571 | /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ |
2572 | struct __ec_todo_packed { |
2573 | uint8_t sensor_num; |
2574 | |
2575 | /* |
2576 | * bit 0: If set (MOTION_SENSE_SET_OFFSET), set |
2577 | * the calibration information in the EC. |
2578 | * If unset, just retrieve calibration information. |
2579 | */ |
2580 | uint16_t flags; |
2581 | |
2582 | /* |
2583 | * Temperature at calibration, in units of 0.01 C |
2584 | * 0x8000: invalid / unknown. |
2585 | * 0x0: 0C |
2586 | * 0x7fff: +327.67C |
2587 | */ |
2588 | int16_t temp; |
2589 | |
2590 | /* |
2591 | * Offset for calibration. |
2592 | * Unit: |
2593 | * Accelerometer: 1/1024 g |
2594 | * Gyro: 1/1024 deg/s |
2595 | * Compass: 1/16 uT |
2596 | */ |
2597 | int16_t offset[3]; |
2598 | } sensor_offset; |
2599 | |
2600 | /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ |
2601 | struct __ec_todo_packed { |
2602 | uint8_t sensor_num; |
2603 | |
2604 | /* |
2605 | * bit 0: If set (MOTION_SENSE_SET_OFFSET), set |
2606 | * the calibration information in the EC. |
2607 | * If unset, just retrieve calibration information. |
2608 | */ |
2609 | uint16_t flags; |
2610 | |
2611 | /* |
2612 | * Temperature at calibration, in units of 0.01 C |
2613 | * 0x8000: invalid / unknown. |
2614 | * 0x0: 0C |
2615 | * 0x7fff: +327.67C |
2616 | */ |
2617 | int16_t temp; |
2618 | |
2619 | /* |
2620 | * Scale for calibration: |
2621 | * By default scale is 1, it is encoded on 16bits: |
2622 | * 1 = BIT(15) |
2623 | * ~2 = 0xFFFF |
2624 | * ~0 = 0. |
2625 | */ |
2626 | uint16_t scale[3]; |
2627 | } sensor_scale; |
2628 | |
2629 | |
2630 | /* Used for MOTIONSENSE_CMD_FIFO_INFO */ |
2631 | /* (no params) */ |
2632 | |
2633 | /* Used for MOTIONSENSE_CMD_FIFO_READ */ |
2634 | struct __ec_todo_unpacked { |
2635 | /* |
2636 | * Number of expected vector to return. |
2637 | * EC may return less or 0 if none available. |
2638 | */ |
2639 | uint32_t max_data_vector; |
2640 | } fifo_read; |
2641 | |
2642 | struct ec_motion_sense_activity set_activity; |
2643 | |
2644 | /* Used for MOTIONSENSE_CMD_LID_ANGLE */ |
2645 | /* (no params) */ |
2646 | |
2647 | /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ |
2648 | struct __ec_todo_unpacked { |
2649 | /* |
2650 | * 1: enable, 0 disable fifo, |
2651 | * EC_MOTION_SENSE_NO_VALUE return value. |
2652 | */ |
2653 | int8_t enable; |
2654 | } fifo_int_enable; |
2655 | |
2656 | /* Used for MOTIONSENSE_CMD_SPOOF */ |
2657 | struct __ec_todo_packed { |
2658 | uint8_t sensor_id; |
2659 | |
2660 | /* See enum motionsense_spoof_mode. */ |
2661 | uint8_t spoof_enable; |
2662 | |
2663 | /* Ignored, used for alignment. */ |
2664 | uint8_t reserved; |
2665 | |
2666 | /* Individual component values to spoof. */ |
2667 | int16_t components[3]; |
2668 | } spoof; |
2669 | |
2670 | /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ |
2671 | struct __ec_todo_unpacked { |
2672 | /* |
2673 | * Lid angle threshold for switching between tablet and |
2674 | * clamshell mode. |
2675 | */ |
2676 | int16_t lid_angle; |
2677 | |
2678 | /* |
2679 | * Hysteresis degree to prevent fluctuations between |
2680 | * clamshell and tablet mode if lid angle keeps |
2681 | * changing around the threshold. Lid motion driver will |
2682 | * use lid_angle + hys_degree to trigger tablet mode and |
2683 | * lid_angle - hys_degree to trigger clamshell mode. |
2684 | */ |
2685 | int16_t hys_degree; |
2686 | } tablet_mode_threshold; |
2687 | }; |
2688 | } __ec_todo_packed; |
2689 | |
2690 | struct ec_response_motion_sense { |
2691 | union { |
2692 | /* Used for MOTIONSENSE_CMD_DUMP */ |
2693 | struct __ec_todo_unpacked { |
2694 | /* Flags representing the motion sensor module. */ |
2695 | uint8_t module_flags; |
2696 | |
2697 | /* Number of sensors managed directly by the EC. */ |
2698 | uint8_t sensor_count; |
2699 | |
2700 | /* |
2701 | * Sensor data is truncated if response_max is too small |
2702 | * for holding all the data. |
2703 | */ |
2704 | DECLARE_FLEX_ARRAY(struct ec_response_motion_sensor_data, sensor); |
2705 | } dump; |
2706 | |
2707 | /* Used for MOTIONSENSE_CMD_INFO. */ |
2708 | struct __ec_todo_unpacked { |
2709 | /* Should be element of enum motionsensor_type. */ |
2710 | uint8_t type; |
2711 | |
2712 | /* Should be element of enum motionsensor_location. */ |
2713 | uint8_t location; |
2714 | |
2715 | /* Should be element of enum motionsensor_chip. */ |
2716 | uint8_t chip; |
2717 | } info; |
2718 | |
2719 | /* Used for MOTIONSENSE_CMD_INFO version 3 */ |
2720 | struct __ec_todo_unpacked { |
2721 | /* Should be element of enum motionsensor_type. */ |
2722 | uint8_t type; |
2723 | |
2724 | /* Should be element of enum motionsensor_location. */ |
2725 | uint8_t location; |
2726 | |
2727 | /* Should be element of enum motionsensor_chip. */ |
2728 | uint8_t chip; |
2729 | |
2730 | /* Minimum sensor sampling frequency */ |
2731 | uint32_t min_frequency; |
2732 | |
2733 | /* Maximum sensor sampling frequency */ |
2734 | uint32_t max_frequency; |
2735 | |
2736 | /* Max number of sensor events that could be in fifo */ |
2737 | uint32_t fifo_max_event_count; |
2738 | } info_3; |
2739 | |
2740 | /* Used for MOTIONSENSE_CMD_DATA */ |
2741 | struct ec_response_motion_sensor_data data; |
2742 | |
2743 | /* |
2744 | * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, |
2745 | * MOTIONSENSE_CMD_SENSOR_RANGE, |
2746 | * MOTIONSENSE_CMD_KB_WAKE_ANGLE, |
2747 | * MOTIONSENSE_CMD_FIFO_INT_ENABLE and |
2748 | * MOTIONSENSE_CMD_SPOOF. |
2749 | */ |
2750 | struct __ec_todo_unpacked { |
2751 | /* Current value of the parameter queried. */ |
2752 | int32_t ret; |
2753 | } ec_rate, sensor_odr, sensor_range, kb_wake_angle, |
2754 | fifo_int_enable, spoof; |
2755 | |
2756 | /* |
2757 | * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, |
2758 | * PERFORM_CALIB. |
2759 | */ |
2760 | struct __ec_todo_unpacked { |
2761 | int16_t temp; |
2762 | int16_t offset[3]; |
2763 | } sensor_offset, perform_calib; |
2764 | |
2765 | /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ |
2766 | struct __ec_todo_unpacked { |
2767 | int16_t temp; |
2768 | uint16_t scale[3]; |
2769 | } sensor_scale; |
2770 | |
2771 | struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; |
2772 | |
2773 | struct ec_response_motion_sense_fifo_data fifo_read; |
2774 | |
2775 | struct __ec_todo_packed { |
2776 | uint16_t reserved; |
2777 | uint32_t enabled; |
2778 | uint32_t disabled; |
2779 | } list_activities; |
2780 | |
2781 | /* No params for set activity */ |
2782 | |
2783 | /* Used for MOTIONSENSE_CMD_LID_ANGLE */ |
2784 | struct __ec_todo_unpacked { |
2785 | /* |
2786 | * Angle between 0 and 360 degree if available, |
2787 | * LID_ANGLE_UNRELIABLE otherwise. |
2788 | */ |
2789 | uint16_t value; |
2790 | } lid_angle; |
2791 | |
2792 | /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ |
2793 | struct __ec_todo_unpacked { |
2794 | /* |
2795 | * Lid angle threshold for switching between tablet and |
2796 | * clamshell mode. |
2797 | */ |
2798 | uint16_t lid_angle; |
2799 | |
2800 | /* Hysteresis degree. */ |
2801 | uint16_t hys_degree; |
2802 | } tablet_mode_threshold; |
2803 | |
2804 | }; |
2805 | } __ec_todo_packed; |
2806 | |
2807 | /*****************************************************************************/ |
2808 | /* Force lid open command */ |
2809 | |
2810 | /* Make lid event always open */ |
2811 | #define EC_CMD_FORCE_LID_OPEN 0x002C |
2812 | |
2813 | struct ec_params_force_lid_open { |
2814 | uint8_t enabled; |
2815 | } __ec_align1; |
2816 | |
2817 | /*****************************************************************************/ |
2818 | /* Configure the behavior of the power button */ |
2819 | #define EC_CMD_CONFIG_POWER_BUTTON 0x002D |
2820 | |
2821 | enum ec_config_power_button_flags { |
2822 | /* Enable/Disable power button pulses for x86 devices */ |
2823 | EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), |
2824 | }; |
2825 | |
2826 | struct ec_params_config_power_button { |
2827 | /* See enum ec_config_power_button_flags */ |
2828 | uint8_t flags; |
2829 | } __ec_align1; |
2830 | |
2831 | /*****************************************************************************/ |
2832 | /* USB charging control commands */ |
2833 | |
2834 | /* Set USB port charging mode */ |
2835 | #define EC_CMD_USB_CHARGE_SET_MODE 0x0030 |
2836 | |
2837 | struct ec_params_usb_charge_set_mode { |
2838 | uint8_t usb_port_id; |
2839 | uint8_t mode:7; |
2840 | uint8_t inhibit_charge:1; |
2841 | } __ec_align1; |
2842 | |
2843 | /*****************************************************************************/ |
2844 | /* Persistent storage for host */ |
2845 | |
2846 | /* Maximum bytes that can be read/written in a single command */ |
2847 | #define EC_PSTORE_SIZE_MAX 64 |
2848 | |
2849 | /* Get persistent storage info */ |
2850 | #define EC_CMD_PSTORE_INFO 0x0040 |
2851 | |
2852 | struct ec_response_pstore_info { |
2853 | /* Persistent storage size, in bytes */ |
2854 | uint32_t pstore_size; |
2855 | /* Access size; read/write offset and size must be a multiple of this */ |
2856 | uint32_t access_size; |
2857 | } __ec_align4; |
2858 | |
2859 | /* |
2860 | * Read persistent storage |
2861 | * |
2862 | * Response is params.size bytes of data. |
2863 | */ |
2864 | #define EC_CMD_PSTORE_READ 0x0041 |
2865 | |
2866 | struct ec_params_pstore_read { |
2867 | uint32_t offset; /* Byte offset to read */ |
2868 | uint32_t size; /* Size to read in bytes */ |
2869 | } __ec_align4; |
2870 | |
2871 | /* Write persistent storage */ |
2872 | #define EC_CMD_PSTORE_WRITE 0x0042 |
2873 | |
2874 | struct ec_params_pstore_write { |
2875 | uint32_t offset; /* Byte offset to write */ |
2876 | uint32_t size; /* Size to write in bytes */ |
2877 | uint8_t data[EC_PSTORE_SIZE_MAX]; |
2878 | } __ec_align4; |
2879 | |
2880 | /*****************************************************************************/ |
2881 | /* Real-time clock */ |
2882 | |
2883 | /* RTC params and response structures */ |
2884 | struct ec_params_rtc { |
2885 | uint32_t time; |
2886 | } __ec_align4; |
2887 | |
2888 | struct ec_response_rtc { |
2889 | uint32_t time; |
2890 | } __ec_align4; |
2891 | |
2892 | /* These use ec_response_rtc */ |
2893 | #define EC_CMD_RTC_GET_VALUE 0x0044 |
2894 | #define EC_CMD_RTC_GET_ALARM 0x0045 |
2895 | |
2896 | /* These all use ec_params_rtc */ |
2897 | #define EC_CMD_RTC_SET_VALUE 0x0046 |
2898 | #define EC_CMD_RTC_SET_ALARM 0x0047 |
2899 | |
2900 | /* Pass as time param to SET_ALARM to clear the current alarm */ |
2901 | #define EC_RTC_ALARM_CLEAR 0 |
2902 | |
2903 | /*****************************************************************************/ |
2904 | /* Port80 log access */ |
2905 | |
2906 | /* Maximum entries that can be read/written in a single command */ |
2907 | #define EC_PORT80_SIZE_MAX 32 |
2908 | |
2909 | /* Get last port80 code from previous boot */ |
2910 | #define EC_CMD_PORT80_LAST_BOOT 0x0048 |
2911 | #define EC_CMD_PORT80_READ 0x0048 |
2912 | |
2913 | enum ec_port80_subcmd { |
2914 | EC_PORT80_GET_INFO = 0, |
2915 | EC_PORT80_READ_BUFFER, |
2916 | }; |
2917 | |
2918 | struct ec_params_port80_read { |
2919 | uint16_t subcmd; |
2920 | union { |
2921 | struct __ec_todo_unpacked { |
2922 | uint32_t offset; |
2923 | uint32_t num_entries; |
2924 | } read_buffer; |
2925 | }; |
2926 | } __ec_todo_packed; |
2927 | |
2928 | struct ec_response_port80_read { |
2929 | union { |
2930 | struct __ec_todo_unpacked { |
2931 | uint32_t writes; |
2932 | uint32_t history_size; |
2933 | uint32_t last_boot; |
2934 | } get_info; |
2935 | struct __ec_todo_unpacked { |
2936 | uint16_t codes[EC_PORT80_SIZE_MAX]; |
2937 | } data; |
2938 | }; |
2939 | } __ec_todo_packed; |
2940 | |
2941 | struct ec_response_port80_last_boot { |
2942 | uint16_t code; |
2943 | } __ec_align2; |
2944 | |
2945 | /*****************************************************************************/ |
2946 | /* Temporary secure storage for host verified boot use */ |
2947 | |
2948 | /* Number of bytes in a vstore slot */ |
2949 | #define EC_VSTORE_SLOT_SIZE 64 |
2950 | |
2951 | /* Maximum number of vstore slots */ |
2952 | #define EC_VSTORE_SLOT_MAX 32 |
2953 | |
2954 | /* Get persistent storage info */ |
2955 | #define EC_CMD_VSTORE_INFO 0x0049 |
2956 | struct ec_response_vstore_info { |
2957 | /* Indicates which slots are locked */ |
2958 | uint32_t slot_locked; |
2959 | /* Total number of slots available */ |
2960 | uint8_t slot_count; |
2961 | } __ec_align_size1; |
2962 | |
2963 | /* |
2964 | * Read temporary secure storage |
2965 | * |
2966 | * Response is EC_VSTORE_SLOT_SIZE bytes of data. |
2967 | */ |
2968 | #define EC_CMD_VSTORE_READ 0x004A |
2969 | |
2970 | struct ec_params_vstore_read { |
2971 | uint8_t slot; /* Slot to read from */ |
2972 | } __ec_align1; |
2973 | |
2974 | struct ec_response_vstore_read { |
2975 | uint8_t data[EC_VSTORE_SLOT_SIZE]; |
2976 | } __ec_align1; |
2977 | |
2978 | /* |
2979 | * Write temporary secure storage and lock it. |
2980 | */ |
2981 | #define EC_CMD_VSTORE_WRITE 0x004B |
2982 | |
2983 | struct ec_params_vstore_write { |
2984 | uint8_t slot; /* Slot to write to */ |
2985 | uint8_t data[EC_VSTORE_SLOT_SIZE]; |
2986 | } __ec_align1; |
2987 | |
2988 | /*****************************************************************************/ |
2989 | /* Thermal engine commands. Note that there are two implementations. We'll |
2990 | * reuse the command number, but the data and behavior is incompatible. |
2991 | * Version 0 is what originally shipped on Link. |
2992 | * Version 1 separates the CPU thermal limits from the fan control. |
2993 | */ |
2994 | |
2995 | #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 |
2996 | #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 |
2997 | |
2998 | /* The version 0 structs are opaque. You have to know what they are for |
2999 | * the get/set commands to make any sense. |
3000 | */ |
3001 | |
3002 | /* Version 0 - set */ |
3003 | struct ec_params_thermal_set_threshold { |
3004 | uint8_t sensor_type; |
3005 | uint8_t threshold_id; |
3006 | uint16_t value; |
3007 | } __ec_align2; |
3008 | |
3009 | /* Version 0 - get */ |
3010 | struct ec_params_thermal_get_threshold { |
3011 | uint8_t sensor_type; |
3012 | uint8_t threshold_id; |
3013 | } __ec_align1; |
3014 | |
3015 | struct ec_response_thermal_get_threshold { |
3016 | uint16_t value; |
3017 | } __ec_align2; |
3018 | |
3019 | |
3020 | /* The version 1 structs are visible. */ |
3021 | enum ec_temp_thresholds { |
3022 | EC_TEMP_THRESH_WARN = 0, |
3023 | EC_TEMP_THRESH_HIGH, |
3024 | EC_TEMP_THRESH_HALT, |
3025 | |
3026 | EC_TEMP_THRESH_COUNT |
3027 | }; |
3028 | |
3029 | /* |
3030 | * Thermal configuration for one temperature sensor. Temps are in degrees K. |
3031 | * Zero values will be silently ignored by the thermal task. |
3032 | * |
3033 | * Set 'temp_host' value allows thermal task to trigger some event with 1 degree |
3034 | * hysteresis. |
3035 | * For example, |
3036 | * temp_host[EC_TEMP_THRESH_HIGH] = 300 K |
3037 | * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K |
3038 | * EC will throttle ap when temperature >= 301 K, and release throttling when |
3039 | * temperature <= 299 K. |
3040 | * |
3041 | * Set 'temp_host_release' value allows thermal task has a custom hysteresis. |
3042 | * For example, |
3043 | * temp_host[EC_TEMP_THRESH_HIGH] = 300 K |
3044 | * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K |
3045 | * EC will throttle ap when temperature >= 301 K, and release throttling when |
3046 | * temperature <= 294 K. |
3047 | * |
3048 | * Note that this structure is a sub-structure of |
3049 | * ec_params_thermal_set_threshold_v1, but maintains its alignment there. |
3050 | */ |
3051 | struct ec_thermal_config { |
3052 | uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ |
3053 | uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ |
3054 | uint32_t temp_fan_off; /* no active cooling needed */ |
3055 | uint32_t temp_fan_max; /* max active cooling needed */ |
3056 | } __ec_align4; |
3057 | |
3058 | /* Version 1 - get config for one sensor. */ |
3059 | struct ec_params_thermal_get_threshold_v1 { |
3060 | uint32_t sensor_num; |
3061 | } __ec_align4; |
3062 | /* This returns a struct ec_thermal_config */ |
3063 | |
3064 | /* |
3065 | * Version 1 - set config for one sensor. |
3066 | * Use read-modify-write for best results! |
3067 | */ |
3068 | struct ec_params_thermal_set_threshold_v1 { |
3069 | uint32_t sensor_num; |
3070 | struct ec_thermal_config cfg; |
3071 | } __ec_align4; |
3072 | /* This returns no data */ |
3073 | |
3074 | /****************************************************************************/ |
3075 | |
3076 | /* Toggle automatic fan control */ |
3077 | #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 |
3078 | |
3079 | /* Version 1 of input params */ |
3080 | struct ec_params_auto_fan_ctrl_v1 { |
3081 | uint8_t fan_idx; |
3082 | } __ec_align1; |
3083 | |
3084 | /* Get/Set TMP006 calibration data */ |
3085 | #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 |
3086 | #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 |
3087 | |
3088 | /* |
3089 | * The original TMP006 calibration only needed four params, but now we need |
3090 | * more. Since the algorithm is nothing but magic numbers anyway, we'll leave |
3091 | * the params opaque. The v1 "get" response will include the algorithm number |
3092 | * and how many params it requires. That way we can change the EC code without |
3093 | * needing to update this file. We can also use a different algorithm on each |
3094 | * sensor. |
3095 | */ |
3096 | |
3097 | /* This is the same struct for both v0 and v1. */ |
3098 | struct ec_params_tmp006_get_calibration { |
3099 | uint8_t index; |
3100 | } __ec_align1; |
3101 | |
3102 | /* Version 0 */ |
3103 | struct ec_response_tmp006_get_calibration_v0 { |
3104 | float s0; |
3105 | float b0; |
3106 | float b1; |
3107 | float b2; |
3108 | } __ec_align4; |
3109 | |
3110 | struct ec_params_tmp006_set_calibration_v0 { |
3111 | uint8_t index; |
3112 | uint8_t reserved[3]; |
3113 | float s0; |
3114 | float b0; |
3115 | float b1; |
3116 | float b2; |
3117 | } __ec_align4; |
3118 | |
3119 | /* Version 1 */ |
3120 | struct ec_response_tmp006_get_calibration_v1 { |
3121 | uint8_t algorithm; |
3122 | uint8_t num_params; |
3123 | uint8_t reserved[2]; |
3124 | float val[]; |
3125 | } __ec_align4; |
3126 | |
3127 | struct ec_params_tmp006_set_calibration_v1 { |
3128 | uint8_t index; |
3129 | uint8_t algorithm; |
3130 | uint8_t num_params; |
3131 | uint8_t reserved; |
3132 | float val[]; |
3133 | } __ec_align4; |
3134 | |
3135 | |
3136 | /* Read raw TMP006 data */ |
3137 | #define EC_CMD_TMP006_GET_RAW 0x0055 |
3138 | |
3139 | struct ec_params_tmp006_get_raw { |
3140 | uint8_t index; |
3141 | } __ec_align1; |
3142 | |
3143 | struct ec_response_tmp006_get_raw { |
3144 | int32_t t; /* In 1/100 K */ |
3145 | int32_t v; /* In nV */ |
3146 | } __ec_align4; |
3147 | |
3148 | /*****************************************************************************/ |
3149 | /* MKBP - Matrix KeyBoard Protocol */ |
3150 | |
3151 | /* |
3152 | * Read key state |
3153 | * |
3154 | * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for |
3155 | * expected response size. |
3156 | * |
3157 | * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish |
3158 | * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type |
3159 | * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. |
3160 | */ |
3161 | #define EC_CMD_MKBP_STATE 0x0060 |
3162 | |
3163 | /* |
3164 | * Provide information about various MKBP things. See enum ec_mkbp_info_type. |
3165 | */ |
3166 | #define EC_CMD_MKBP_INFO 0x0061 |
3167 | |
3168 | struct ec_response_mkbp_info { |
3169 | uint32_t rows; |
3170 | uint32_t cols; |
3171 | /* Formerly "switches", which was 0. */ |
3172 | uint8_t reserved; |
3173 | } __ec_align_size1; |
3174 | |
3175 | struct ec_params_mkbp_info { |
3176 | uint8_t info_type; |
3177 | uint8_t event_type; |
3178 | } __ec_align1; |
3179 | |
3180 | enum ec_mkbp_info_type { |
3181 | /* |
3182 | * Info about the keyboard matrix: number of rows and columns. |
3183 | * |
3184 | * Returns struct ec_response_mkbp_info. |
3185 | */ |
3186 | EC_MKBP_INFO_KBD = 0, |
3187 | |
3188 | /* |
3189 | * For buttons and switches, info about which specifically are |
3190 | * supported. event_type must be set to one of the values in enum |
3191 | * ec_mkbp_event. |
3192 | * |
3193 | * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte |
3194 | * bitmask indicating which buttons or switches are present. See the |
3195 | * bit inidices below. |
3196 | */ |
3197 | EC_MKBP_INFO_SUPPORTED = 1, |
3198 | |
3199 | /* |
3200 | * Instantaneous state of buttons and switches. |
3201 | * |
3202 | * event_type must be set to one of the values in enum ec_mkbp_event. |
3203 | * |
3204 | * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] |
3205 | * indicating the current state of the keyboard matrix. |
3206 | * |
3207 | * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw |
3208 | * event state. |
3209 | * |
3210 | * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the |
3211 | * state of supported buttons. |
3212 | * |
3213 | * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the |
3214 | * state of supported switches. |
3215 | */ |
3216 | EC_MKBP_INFO_CURRENT = 2, |
3217 | }; |
3218 | |
3219 | /* Simulate key press */ |
3220 | #define EC_CMD_MKBP_SIMULATE_KEY 0x0062 |
3221 | |
3222 | struct ec_params_mkbp_simulate_key { |
3223 | uint8_t col; |
3224 | uint8_t row; |
3225 | uint8_t pressed; |
3226 | } __ec_align1; |
3227 | |
3228 | #define EC_CMD_GET_KEYBOARD_ID 0x0063 |
3229 | |
3230 | struct ec_response_keyboard_id { |
3231 | uint32_t keyboard_id; |
3232 | } __ec_align4; |
3233 | |
3234 | enum keyboard_id { |
3235 | KEYBOARD_ID_UNSUPPORTED = 0, |
3236 | KEYBOARD_ID_UNREADABLE = 0xffffffff, |
3237 | }; |
3238 | |
3239 | /* Configure keyboard scanning */ |
3240 | #define EC_CMD_MKBP_SET_CONFIG 0x0064 |
3241 | #define EC_CMD_MKBP_GET_CONFIG 0x0065 |
3242 | |
3243 | /* flags */ |
3244 | enum mkbp_config_flags { |
3245 | EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ |
3246 | }; |
3247 | |
3248 | enum mkbp_config_valid { |
3249 | EC_MKBP_VALID_SCAN_PERIOD = BIT(0), |
3250 | EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), |
3251 | EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), |
3252 | EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), |
3253 | EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), |
3254 | EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), |
3255 | EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), |
3256 | }; |
3257 | |
3258 | /* |
3259 | * Configuration for our key scanning algorithm. |
3260 | * |
3261 | * Note that this is used as a sub-structure of |
3262 | * ec_{params/response}_mkbp_get_config. |
3263 | */ |
3264 | struct ec_mkbp_config { |
3265 | uint32_t valid_mask; /* valid fields */ |
3266 | uint8_t flags; /* some flags (enum mkbp_config_flags) */ |
3267 | uint8_t valid_flags; /* which flags are valid */ |
3268 | uint16_t scan_period_us; /* period between start of scans */ |
3269 | /* revert to interrupt mode after no activity for this long */ |
3270 | uint32_t poll_timeout_us; |
3271 | /* |
3272 | * minimum post-scan relax time. Once we finish a scan we check |
3273 | * the time until we are due to start the next one. If this time is |
3274 | * shorter this field, we use this instead. |
3275 | */ |
3276 | uint16_t min_post_scan_delay_us; |
3277 | /* delay between setting up output and waiting for it to settle */ |
3278 | uint16_t output_settle_us; |
3279 | uint16_t debounce_down_us; /* time for debounce on key down */ |
3280 | uint16_t debounce_up_us; /* time for debounce on key up */ |
3281 | /* maximum depth to allow for fifo (0 = no keyscan output) */ |
3282 | uint8_t fifo_max_depth; |
3283 | } __ec_align_size1; |
3284 | |
3285 | struct ec_params_mkbp_set_config { |
3286 | struct ec_mkbp_config config; |
3287 | } __ec_align_size1; |
3288 | |
3289 | struct ec_response_mkbp_get_config { |
3290 | struct ec_mkbp_config config; |
3291 | } __ec_align_size1; |
3292 | |
3293 | /* Run the key scan emulation */ |
3294 | #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 |
3295 | |
3296 | enum ec_keyscan_seq_cmd { |
3297 | EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ |
3298 | EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ |
3299 | EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ |
3300 | EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ |
3301 | EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ |
3302 | }; |
3303 | |
3304 | enum ec_collect_flags { |
3305 | /* |
3306 | * Indicates this scan was processed by the EC. Due to timing, some |
3307 | * scans may be skipped. |
3308 | */ |
3309 | EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), |
3310 | }; |
3311 | |
3312 | struct ec_collect_item { |
3313 | uint8_t flags; /* some flags (enum ec_collect_flags) */ |
3314 | } __ec_align1; |
3315 | |
3316 | struct ec_params_keyscan_seq_ctrl { |
3317 | uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ |
3318 | union { |
3319 | struct __ec_align1 { |
3320 | uint8_t active; /* still active */ |
3321 | uint8_t num_items; /* number of items */ |
3322 | /* Current item being presented */ |
3323 | uint8_t cur_item; |
3324 | } status; |
3325 | struct __ec_todo_unpacked { |
3326 | /* |
3327 | * Absolute time for this scan, measured from the |
3328 | * start of the sequence. |
3329 | */ |
3330 | uint32_t time_us; |
3331 | uint8_t scan[0]; /* keyscan data */ |
3332 | } add; |
3333 | struct __ec_align1 { |
3334 | uint8_t start_item; /* First item to return */ |
3335 | uint8_t num_items; /* Number of items to return */ |
3336 | } collect; |
3337 | }; |
3338 | } __ec_todo_packed; |
3339 | |
3340 | struct ec_result_keyscan_seq_ctrl { |
3341 | union { |
3342 | struct __ec_todo_unpacked { |
3343 | uint8_t num_items; /* Number of items */ |
3344 | /* Data for each item */ |
3345 | struct ec_collect_item item[0]; |
3346 | } collect; |
3347 | }; |
3348 | } __ec_todo_packed; |
3349 | |
3350 | /* |
3351 | * Get the next pending MKBP event. |
3352 | * |
3353 | * Returns EC_RES_UNAVAILABLE if there is no event pending. |
3354 | */ |
3355 | #define EC_CMD_GET_NEXT_EVENT 0x0067 |
3356 | |
3357 | #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 |
3358 | |
3359 | /* |
3360 | * We use the most significant bit of the event type to indicate to the host |
3361 | * that the EC has more MKBP events available to provide. |
3362 | */ |
3363 | #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) |
3364 | |
3365 | /* The mask to apply to get the raw event type */ |
3366 | #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) |
3367 | |
3368 | enum ec_mkbp_event { |
3369 | /* Keyboard matrix changed. The event data is the new matrix state. */ |
3370 | EC_MKBP_EVENT_KEY_MATRIX = 0, |
3371 | |
3372 | /* New host event. The event data is 4 bytes of host event flags. */ |
3373 | EC_MKBP_EVENT_HOST_EVENT = 1, |
3374 | |
3375 | /* New Sensor FIFO data. The event data is fifo_info structure. */ |
3376 | EC_MKBP_EVENT_SENSOR_FIFO = 2, |
3377 | |
3378 | /* The state of the non-matrixed buttons have changed. */ |
3379 | EC_MKBP_EVENT_BUTTON = 3, |
3380 | |
3381 | /* The state of the switches have changed. */ |
3382 | EC_MKBP_EVENT_SWITCH = 4, |
3383 | |
3384 | /* New Fingerprint sensor event, the event data is fp_events bitmap. */ |
3385 | EC_MKBP_EVENT_FINGERPRINT = 5, |
3386 | |
3387 | /* |
3388 | * Sysrq event: send emulated sysrq. The event data is sysrq, |
3389 | * corresponding to the key to be pressed. |
3390 | */ |
3391 | EC_MKBP_EVENT_SYSRQ = 6, |
3392 | |
3393 | /* |
3394 | * New 64-bit host event. |
3395 | * The event data is 8 bytes of host event flags. |
3396 | */ |
3397 | EC_MKBP_EVENT_HOST_EVENT64 = 7, |
3398 | |
3399 | /* Notify the AP that something happened on CEC */ |
3400 | EC_MKBP_EVENT_CEC_EVENT = 8, |
3401 | |
3402 | /* Send an incoming CEC message to the AP */ |
3403 | EC_MKBP_EVENT_CEC_MESSAGE = 9, |
3404 | |
3405 | /* Peripheral device charger event */ |
3406 | EC_MKBP_EVENT_PCHG = 12, |
3407 | |
3408 | /* Number of MKBP events */ |
3409 | EC_MKBP_EVENT_COUNT, |
3410 | }; |
3411 | BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); |
3412 | |
3413 | union __ec_align_offset1 ec_response_get_next_data { |
3414 | uint8_t key_matrix[13]; |
3415 | |
3416 | /* Unaligned */ |
3417 | uint32_t host_event; |
3418 | uint64_t host_event64; |
3419 | |
3420 | struct __ec_todo_unpacked { |
3421 | /* For aligning the fifo_info */ |
3422 | uint8_t reserved[3]; |
3423 | struct ec_response_motion_sense_fifo_info info; |
3424 | } sensor_fifo; |
3425 | |
3426 | uint32_t buttons; |
3427 | |
3428 | uint32_t switches; |
3429 | |
3430 | uint32_t fp_events; |
3431 | |
3432 | uint32_t sysrq; |
3433 | |
3434 | /* CEC events from enum mkbp_cec_event */ |
3435 | uint32_t cec_events; |
3436 | }; |
3437 | |
3438 | union __ec_align_offset1 ec_response_get_next_data_v1 { |
3439 | uint8_t key_matrix[16]; |
3440 | |
3441 | /* Unaligned */ |
3442 | uint32_t host_event; |
3443 | uint64_t host_event64; |
3444 | |
3445 | struct __ec_todo_unpacked { |
3446 | /* For aligning the fifo_info */ |
3447 | uint8_t reserved[3]; |
3448 | struct ec_response_motion_sense_fifo_info info; |
3449 | } sensor_fifo; |
3450 | |
3451 | uint32_t buttons; |
3452 | |
3453 | uint32_t switches; |
3454 | |
3455 | uint32_t fp_events; |
3456 | |
3457 | uint32_t sysrq; |
3458 | |
3459 | /* CEC events from enum mkbp_cec_event */ |
3460 | uint32_t cec_events; |
3461 | |
3462 | uint8_t cec_message[16]; |
3463 | }; |
3464 | BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); |
3465 | |
3466 | struct ec_response_get_next_event { |
3467 | uint8_t event_type; |
3468 | /* Followed by event data if any */ |
3469 | union ec_response_get_next_data data; |
3470 | } __ec_align1; |
3471 | |
3472 | struct ec_response_get_next_event_v1 { |
3473 | uint8_t event_type; |
3474 | /* Followed by event data if any */ |
3475 | union ec_response_get_next_data_v1 data; |
3476 | } __ec_align1; |
3477 | |
3478 | /* Bit indices for buttons and switches.*/ |
3479 | /* Buttons */ |
3480 | #define EC_MKBP_POWER_BUTTON 0 |
3481 | #define EC_MKBP_VOL_UP 1 |
3482 | #define EC_MKBP_VOL_DOWN 2 |
3483 | #define EC_MKBP_RECOVERY 3 |
3484 | #define EC_MKBP_BRI_UP 4 |
3485 | #define EC_MKBP_BRI_DOWN 5 |
3486 | #define EC_MKBP_SCREEN_LOCK 6 |
3487 | |
3488 | /* Switches */ |
3489 | #define EC_MKBP_LID_OPEN 0 |
3490 | #define EC_MKBP_TABLET_MODE 1 |
3491 | #define EC_MKBP_BASE_ATTACHED 2 |
3492 | #define EC_MKBP_FRONT_PROXIMITY 3 |
3493 | |
3494 | /* Run keyboard factory test scanning */ |
3495 | #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 |
3496 | |
3497 | struct ec_response_keyboard_factory_test { |
3498 | uint16_t shorted; /* Keyboard pins are shorted */ |
3499 | } __ec_align2; |
3500 | |
3501 | /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ |
3502 | #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) |
3503 | #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) |
3504 | #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 |
3505 | #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ |
3506 | >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) |
3507 | #define EC_MKBP_FP_MATCH_IDX_OFFSET 12 |
3508 | #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 |
3509 | #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ |
3510 | >> EC_MKBP_FP_MATCH_IDX_OFFSET) |
3511 | #define EC_MKBP_FP_ENROLL BIT(27) |
3512 | #define EC_MKBP_FP_MATCH BIT(28) |
3513 | #define EC_MKBP_FP_FINGER_DOWN BIT(29) |
3514 | #define EC_MKBP_FP_FINGER_UP BIT(30) |
3515 | #define EC_MKBP_FP_IMAGE_READY BIT(31) |
3516 | /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ |
3517 | #define EC_MKBP_FP_ERR_ENROLL_OK 0 |
3518 | #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 |
3519 | #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 |
3520 | #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 |
3521 | #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 |
3522 | /* Can be used to detect if image was usable for enrollment or not. */ |
3523 | #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 |
3524 | /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ |
3525 | #define EC_MKBP_FP_ERR_MATCH_NO 0 |
3526 | #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 |
3527 | #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 |
3528 | #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 |
3529 | #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 |
3530 | #define EC_MKBP_FP_ERR_MATCH_YES 1 |
3531 | #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 |
3532 | #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 |
3533 | |
3534 | |
3535 | /*****************************************************************************/ |
3536 | /* Temperature sensor commands */ |
3537 | |
3538 | /* Read temperature sensor info */ |
3539 | #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 |
3540 | |
3541 | struct ec_params_temp_sensor_get_info { |
3542 | uint8_t id; |
3543 | } __ec_align1; |
3544 | |
3545 | struct ec_response_temp_sensor_get_info { |
3546 | char sensor_name[32]; |
3547 | uint8_t sensor_type; |
3548 | } __ec_align1; |
3549 | |
3550 | /*****************************************************************************/ |
3551 | |
3552 | /* |
3553 | * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI |
3554 | * commands accidentally sent to the wrong interface. See the ACPI section |
3555 | * below. |
3556 | */ |
3557 | |
3558 | /*****************************************************************************/ |
3559 | /* Host event commands */ |
3560 | |
3561 | |
3562 | /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ |
3563 | /* |
3564 | * Host event mask params and response structures, shared by all of the host |
3565 | * event commands below. |
3566 | */ |
3567 | struct ec_params_host_event_mask { |
3568 | uint32_t mask; |
3569 | } __ec_align4; |
3570 | |
3571 | struct ec_response_host_event_mask { |
3572 | uint32_t mask; |
3573 | } __ec_align4; |
3574 | |
3575 | /* These all use ec_response_host_event_mask */ |
3576 | #define EC_CMD_HOST_EVENT_GET_B 0x0087 |
3577 | #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 |
3578 | #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 |
3579 | #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D |
3580 | |
3581 | /* These all use ec_params_host_event_mask */ |
3582 | #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A |
3583 | #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B |
3584 | #define EC_CMD_HOST_EVENT_CLEAR 0x008C |
3585 | #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E |
3586 | #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F |
3587 | |
3588 | /* |
3589 | * Unified host event programming interface - Should be used by newer versions |
3590 | * of BIOS/OS to program host events and masks |
3591 | */ |
3592 | |
3593 | struct ec_params_host_event { |
3594 | |
3595 | /* Action requested by host - one of enum ec_host_event_action. */ |
3596 | uint8_t action; |
3597 | |
3598 | /* |
3599 | * Mask type that the host requested the action on - one of |
3600 | * enum ec_host_event_mask_type. |
3601 | */ |
3602 | uint8_t mask_type; |
3603 | |
3604 | /* Set to 0, ignore on read */ |
3605 | uint16_t reserved; |
3606 | |
3607 | /* Value to be used in case of set operations. */ |
3608 | uint64_t value; |
3609 | } __ec_align4; |
3610 | |
3611 | /* |
3612 | * Response structure returned by EC_CMD_HOST_EVENT. |
3613 | * Update the value on a GET request. Set to 0 on GET/CLEAR |
3614 | */ |
3615 | |
3616 | struct ec_response_host_event { |
3617 | |
3618 | /* Mask value in case of get operation */ |
3619 | uint64_t value; |
3620 | } __ec_align4; |
3621 | |
3622 | enum ec_host_event_action { |
3623 | /* |
3624 | * params.value is ignored. Value of mask_type populated |
3625 | * in response.value |
3626 | */ |
3627 | EC_HOST_EVENT_GET, |
3628 | |
3629 | /* Bits in params.value are set */ |
3630 | EC_HOST_EVENT_SET, |
3631 | |
3632 | /* Bits in params.value are cleared */ |
3633 | EC_HOST_EVENT_CLEAR, |
3634 | }; |
3635 | |
3636 | enum ec_host_event_mask_type { |
3637 | |
3638 | /* Main host event copy */ |
3639 | EC_HOST_EVENT_MAIN, |
3640 | |
3641 | /* Copy B of host events */ |
3642 | EC_HOST_EVENT_B, |
3643 | |
3644 | /* SCI Mask */ |
3645 | EC_HOST_EVENT_SCI_MASK, |
3646 | |
3647 | /* SMI Mask */ |
3648 | EC_HOST_EVENT_SMI_MASK, |
3649 | |
3650 | /* Mask of events that should be always reported in hostevents */ |
3651 | EC_HOST_EVENT_ALWAYS_REPORT_MASK, |
3652 | |
3653 | /* Active wake mask */ |
3654 | EC_HOST_EVENT_ACTIVE_WAKE_MASK, |
3655 | |
3656 | /* Lazy wake mask for S0ix */ |
3657 | EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, |
3658 | |
3659 | /* Lazy wake mask for S3 */ |
3660 | EC_HOST_EVENT_LAZY_WAKE_MASK_S3, |
3661 | |
3662 | /* Lazy wake mask for S5 */ |
3663 | EC_HOST_EVENT_LAZY_WAKE_MASK_S5, |
3664 | }; |
3665 | |
3666 | #define EC_CMD_HOST_EVENT 0x00A4 |
3667 | |
3668 | /*****************************************************************************/ |
3669 | /* Switch commands */ |
3670 | |
3671 | /* Enable/disable LCD backlight */ |
3672 | #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 |
3673 | |
3674 | struct ec_params_switch_enable_backlight { |
3675 | uint8_t enabled; |
3676 | } __ec_align1; |
3677 | |
3678 | /* Enable/disable WLAN/Bluetooth */ |
3679 | #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 |
3680 | #define EC_VER_SWITCH_ENABLE_WIRELESS 1 |
3681 | |
3682 | /* Version 0 params; no response */ |
3683 | struct ec_params_switch_enable_wireless_v0 { |
3684 | uint8_t enabled; |
3685 | } __ec_align1; |
3686 | |
3687 | /* Version 1 params */ |
3688 | struct ec_params_switch_enable_wireless_v1 { |
3689 | /* Flags to enable now */ |
3690 | uint8_t now_flags; |
3691 | |
3692 | /* Which flags to copy from now_flags */ |
3693 | uint8_t now_mask; |
3694 | |
3695 | /* |
3696 | * Flags to leave enabled in S3, if they're on at the S0->S3 |
3697 | * transition. (Other flags will be disabled by the S0->S3 |
3698 | * transition.) |
3699 | */ |
3700 | uint8_t suspend_flags; |
3701 | |
3702 | /* Which flags to copy from suspend_flags */ |
3703 | uint8_t suspend_mask; |
3704 | } __ec_align1; |
3705 | |
3706 | /* Version 1 response */ |
3707 | struct ec_response_switch_enable_wireless_v1 { |
3708 | /* Flags to enable now */ |
3709 | uint8_t now_flags; |
3710 | |
3711 | /* Flags to leave enabled in S3 */ |
3712 | uint8_t suspend_flags; |
3713 | } __ec_align1; |
3714 | |
3715 | /*****************************************************************************/ |
3716 | /* GPIO commands. Only available on EC if write protect has been disabled. */ |
3717 | |
3718 | /* Set GPIO output value */ |
3719 | #define EC_CMD_GPIO_SET 0x0092 |
3720 | |
3721 | struct ec_params_gpio_set { |
3722 | char name[32]; |
3723 | uint8_t val; |
3724 | } __ec_align1; |
3725 | |
3726 | /* Get GPIO value */ |
3727 | #define EC_CMD_GPIO_GET 0x0093 |
3728 | |
3729 | /* Version 0 of input params and response */ |
3730 | struct ec_params_gpio_get { |
3731 | char name[32]; |
3732 | } __ec_align1; |
3733 | |
3734 | struct ec_response_gpio_get { |
3735 | uint8_t val; |
3736 | } __ec_align1; |
3737 | |
3738 | /* Version 1 of input params and response */ |
3739 | struct ec_params_gpio_get_v1 { |
3740 | uint8_t subcmd; |
3741 | union { |
3742 | struct __ec_align1 { |
3743 | char name[32]; |
3744 | } get_value_by_name; |
3745 | struct __ec_align1 { |
3746 | uint8_t index; |
3747 | } get_info; |
3748 | }; |
3749 | } __ec_align1; |
3750 | |
3751 | struct ec_response_gpio_get_v1 { |
3752 | union { |
3753 | struct __ec_align1 { |
3754 | uint8_t val; |
3755 | } get_value_by_name, get_count; |
3756 | struct __ec_todo_unpacked { |
3757 | uint8_t val; |
3758 | char name[32]; |
3759 | uint32_t flags; |
3760 | } get_info; |
3761 | }; |
3762 | } __ec_todo_packed; |
3763 | |
3764 | enum gpio_get_subcmd { |
3765 | EC_GPIO_GET_BY_NAME = 0, |
3766 | EC_GPIO_GET_COUNT = 1, |
3767 | EC_GPIO_GET_INFO = 2, |
3768 | }; |
3769 | |
3770 | /*****************************************************************************/ |
3771 | /* I2C commands. Only available when flash write protect is unlocked. */ |
3772 | |
3773 | /* |
3774 | * CAUTION: These commands are deprecated, and are not supported anymore in EC |
3775 | * builds >= 8398.0.0 (see crosbug.com/p/23570). |
3776 | * |
3777 | * Use EC_CMD_I2C_PASSTHRU instead. |
3778 | */ |
3779 | |
3780 | /* Read I2C bus */ |
3781 | #define EC_CMD_I2C_READ 0x0094 |
3782 | |
3783 | struct ec_params_i2c_read { |
3784 | uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ |
3785 | uint8_t read_size; /* Either 8 or 16. */ |
3786 | uint8_t port; |
3787 | uint8_t offset; |
3788 | } __ec_align_size1; |
3789 | |
3790 | struct ec_response_i2c_read { |
3791 | uint16_t data; |
3792 | } __ec_align2; |
3793 | |
3794 | /* Write I2C bus */ |
3795 | #define EC_CMD_I2C_WRITE 0x0095 |
3796 | |
3797 | struct ec_params_i2c_write { |
3798 | uint16_t data; |
3799 | uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ |
3800 | uint8_t write_size; /* Either 8 or 16. */ |
3801 | uint8_t port; |
3802 | uint8_t offset; |
3803 | } __ec_align_size1; |
3804 | |
3805 | /*****************************************************************************/ |
3806 | /* Charge state commands. Only available when flash write protect unlocked. */ |
3807 | |
3808 | /* Force charge state machine to stop charging the battery or force it to |
3809 | * discharge the battery. |
3810 | */ |
3811 | #define EC_CMD_CHARGE_CONTROL 0x0096 |
3812 | #define EC_VER_CHARGE_CONTROL 1 |
3813 | |
3814 | enum ec_charge_control_mode { |
3815 | CHARGE_CONTROL_NORMAL = 0, |
3816 | CHARGE_CONTROL_IDLE, |
3817 | CHARGE_CONTROL_DISCHARGE, |
3818 | }; |
3819 | |
3820 | struct ec_params_charge_control { |
3821 | uint32_t mode; /* enum charge_control_mode */ |
3822 | } __ec_align4; |
3823 | |
3824 | /*****************************************************************************/ |
3825 | |
3826 | /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ |
3827 | #define EC_CMD_CONSOLE_SNAPSHOT 0x0097 |
3828 | |
3829 | /* |
3830 | * Read data from the saved snapshot. If the subcmd parameter is |
3831 | * CONSOLE_READ_NEXT, this will return data starting from the beginning of |
3832 | * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the |
3833 | * end of the previous snapshot. |
3834 | * |
3835 | * The params are only looked at in version >= 1 of this command. Prior |
3836 | * versions will just default to CONSOLE_READ_NEXT behavior. |
3837 | * |
3838 | * Response is null-terminated string. Empty string, if there is no more |
3839 | * remaining output. |
3840 | */ |
3841 | #define EC_CMD_CONSOLE_READ 0x0098 |
3842 | |
3843 | enum ec_console_read_subcmd { |
3844 | CONSOLE_READ_NEXT = 0, |
3845 | CONSOLE_READ_RECENT |
3846 | }; |
3847 | |
3848 | struct ec_params_console_read_v1 { |
3849 | uint8_t subcmd; /* enum ec_console_read_subcmd */ |
3850 | } __ec_align1; |
3851 | |
3852 | /*****************************************************************************/ |
3853 | |
3854 | /* |
3855 | * Cut off battery power immediately or after the host has shut down. |
3856 | * |
3857 | * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. |
3858 | * EC_RES_SUCCESS if the command was successful. |
3859 | * EC_RES_ERROR if the cut off command failed. |
3860 | */ |
3861 | #define EC_CMD_BATTERY_CUT_OFF 0x0099 |
3862 | |
3863 | #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) |
3864 | |
3865 | struct ec_params_battery_cutoff { |
3866 | uint8_t flags; |
3867 | } __ec_align1; |
3868 | |
3869 | /*****************************************************************************/ |
3870 | /* USB port mux control. */ |
3871 | |
3872 | /* |
3873 | * Switch USB mux or return to automatic switching. |
3874 | */ |
3875 | #define EC_CMD_USB_MUX 0x009A |
3876 | |
3877 | struct ec_params_usb_mux { |
3878 | uint8_t mux; |
3879 | } __ec_align1; |
3880 | |
3881 | /*****************************************************************************/ |
3882 | /* LDOs / FETs control. */ |
3883 | |
3884 | enum ec_ldo_state { |
3885 | EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ |
3886 | EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ |
3887 | }; |
3888 | |
3889 | /* |
3890 | * Switch on/off a LDO. |
3891 | */ |
3892 | #define EC_CMD_LDO_SET 0x009B |
3893 | |
3894 | struct ec_params_ldo_set { |
3895 | uint8_t index; |
3896 | uint8_t state; |
3897 | } __ec_align1; |
3898 | |
3899 | /* |
3900 | * Get LDO state. |
3901 | */ |
3902 | #define EC_CMD_LDO_GET 0x009C |
3903 | |
3904 | struct ec_params_ldo_get { |
3905 | uint8_t index; |
3906 | } __ec_align1; |
3907 | |
3908 | struct ec_response_ldo_get { |
3909 | uint8_t state; |
3910 | } __ec_align1; |
3911 | |
3912 | /*****************************************************************************/ |
3913 | /* Power info. */ |
3914 | |
3915 | /* |
3916 | * Get power info. |
3917 | */ |
3918 | #define EC_CMD_POWER_INFO 0x009D |
3919 | |
3920 | struct ec_response_power_info { |
3921 | uint32_t usb_dev_type; |
3922 | uint16_t voltage_ac; |
3923 | uint16_t voltage_system; |
3924 | uint16_t current_system; |
3925 | uint16_t usb_current_limit; |
3926 | } __ec_align4; |
3927 | |
3928 | /*****************************************************************************/ |
3929 | /* I2C passthru command */ |
3930 | |
3931 | #define EC_CMD_I2C_PASSTHRU 0x009E |
3932 | |
3933 | /* Read data; if not present, message is a write */ |
3934 | #define EC_I2C_FLAG_READ BIT(15) |
3935 | |
3936 | /* Mask for address */ |
3937 | #define EC_I2C_ADDR_MASK 0x3ff |
3938 | |
3939 | #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ |
3940 | #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ |
3941 | |
3942 | /* Any error */ |
3943 | #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) |
3944 | |
3945 | struct ec_params_i2c_passthru_msg { |
3946 | uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ |
3947 | uint16_t len; /* Number of bytes to read or write */ |
3948 | } __ec_align2; |
3949 | |
3950 | struct ec_params_i2c_passthru { |
3951 | uint8_t port; /* I2C port number */ |
3952 | uint8_t num_msgs; /* Number of messages */ |
3953 | struct ec_params_i2c_passthru_msg msg[]; |
3954 | /* Data to write for all messages is concatenated here */ |
3955 | } __ec_align2; |
3956 | |
3957 | struct ec_response_i2c_passthru { |
3958 | uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ |
3959 | uint8_t num_msgs; /* Number of messages processed */ |
3960 | uint8_t data[]; /* Data read by messages concatenated here */ |
3961 | } __ec_align1; |
3962 | |
3963 | /*****************************************************************************/ |
3964 | /* Power button hang detect */ |
3965 | |
3966 | #define EC_CMD_HANG_DETECT 0x009F |
3967 | |
3968 | /* Reasons to start hang detection timer */ |
3969 | /* Power button pressed */ |
3970 | #define EC_HANG_START_ON_POWER_PRESS BIT(0) |
3971 | |
3972 | /* Lid closed */ |
3973 | #define EC_HANG_START_ON_LID_CLOSE BIT(1) |
3974 | |
3975 | /* Lid opened */ |
3976 | #define EC_HANG_START_ON_LID_OPEN BIT(2) |
3977 | |
3978 | /* Start of AP S3->S0 transition (booting or resuming from suspend) */ |
3979 | #define EC_HANG_START_ON_RESUME BIT(3) |
3980 | |
3981 | /* Reasons to cancel hang detection */ |
3982 | |
3983 | /* Power button released */ |
3984 | #define EC_HANG_STOP_ON_POWER_RELEASE BIT(8) |
3985 | |
3986 | /* Any host command from AP received */ |
3987 | #define EC_HANG_STOP_ON_HOST_COMMAND BIT(9) |
3988 | |
3989 | /* Stop on end of AP S0->S3 transition (suspending or shutting down) */ |
3990 | #define EC_HANG_STOP_ON_SUSPEND BIT(10) |
3991 | |
3992 | /* |
3993 | * If this flag is set, all the other fields are ignored, and the hang detect |
3994 | * timer is started. This provides the AP a way to start the hang timer |
3995 | * without reconfiguring any of the other hang detect settings. Note that |
3996 | * you must previously have configured the timeouts. |
3997 | */ |
3998 | #define EC_HANG_START_NOW BIT(30) |
3999 | |
4000 | /* |
4001 | * If this flag is set, all the other fields are ignored (including |
4002 | * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer |
4003 | * without reconfiguring any of the other hang detect settings. |
4004 | */ |
4005 | #define EC_HANG_STOP_NOW BIT(31) |
4006 | |
4007 | struct ec_params_hang_detect { |
4008 | /* Flags; see EC_HANG_* */ |
4009 | uint32_t flags; |
4010 | |
4011 | /* Timeout in msec before generating host event, if enabled */ |
4012 | uint16_t host_event_timeout_msec; |
4013 | |
4014 | /* Timeout in msec before generating warm reboot, if enabled */ |
4015 | uint16_t warm_reboot_timeout_msec; |
4016 | } __ec_align4; |
4017 | |
4018 | /*****************************************************************************/ |
4019 | /* Commands for battery charging */ |
4020 | |
4021 | /* |
4022 | * This is the single catch-all host command to exchange data regarding the |
4023 | * charge state machine (v2 and up). |
4024 | */ |
4025 | #define EC_CMD_CHARGE_STATE 0x00A0 |
4026 | |
4027 | /* Subcommands for this host command */ |
4028 | enum charge_state_command { |
4029 | CHARGE_STATE_CMD_GET_STATE, |
4030 | CHARGE_STATE_CMD_GET_PARAM, |
4031 | CHARGE_STATE_CMD_SET_PARAM, |
4032 | CHARGE_STATE_NUM_CMDS |
4033 | }; |
4034 | |
4035 | /* |
4036 | * Known param numbers are defined here. Ranges are reserved for board-specific |
4037 | * params, which are handled by the particular implementations. |
4038 | */ |
4039 | enum charge_state_params { |
4040 | CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ |
4041 | CS_PARAM_CHG_CURRENT, /* charger current limit */ |
4042 | CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ |
4043 | CS_PARAM_CHG_STATUS, /* charger-specific status */ |
4044 | CS_PARAM_CHG_OPTION, /* charger-specific options */ |
4045 | CS_PARAM_LIMIT_POWER, /* |
4046 | * Check if power is limited due to |
4047 | * low battery and / or a weak external |
4048 | * charger. READ ONLY. |
4049 | */ |
4050 | /* How many so far? */ |
4051 | CS_NUM_BASE_PARAMS, |
4052 | |
4053 | /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ |
4054 | CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, |
4055 | CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, |
4056 | |
4057 | /* Range for CONFIG_CHARGE_STATE_DEBUG params */ |
4058 | CS_PARAM_DEBUG_MIN = 0x20000, |
4059 | CS_PARAM_DEBUG_CTL_MODE = 0x20000, |
4060 | CS_PARAM_DEBUG_MANUAL_MODE, |
4061 | CS_PARAM_DEBUG_SEEMS_DEAD, |
4062 | CS_PARAM_DEBUG_SEEMS_DISCONNECTED, |
4063 | CS_PARAM_DEBUG_BATT_REMOVED, |
4064 | CS_PARAM_DEBUG_MANUAL_CURRENT, |
4065 | CS_PARAM_DEBUG_MANUAL_VOLTAGE, |
4066 | CS_PARAM_DEBUG_MAX = 0x2ffff, |
4067 | |
4068 | /* Other custom param ranges go here... */ |
4069 | }; |
4070 | |
4071 | struct ec_params_charge_state { |
4072 | uint8_t cmd; /* enum charge_state_command */ |
4073 | union { |
4074 | /* get_state has no args */ |
4075 | |
4076 | struct __ec_todo_unpacked { |
4077 | uint32_t param; /* enum charge_state_param */ |
4078 | } get_param; |
4079 | |
4080 | struct __ec_todo_unpacked { |
4081 | uint32_t param; /* param to set */ |
4082 | uint32_t value; /* value to set */ |
4083 | } set_param; |
4084 | }; |
4085 | } __ec_todo_packed; |
4086 | |
4087 | struct ec_response_charge_state { |
4088 | union { |
4089 | struct __ec_align4 { |
4090 | int ac; |
4091 | int chg_voltage; |
4092 | int chg_current; |
4093 | int chg_input_current; |
4094 | int batt_state_of_charge; |
4095 | } get_state; |
4096 | |
4097 | struct __ec_align4 { |
4098 | uint32_t value; |
4099 | } get_param; |
4100 | |
4101 | /* set_param returns no args */ |
4102 | }; |
4103 | } __ec_align4; |
4104 | |
4105 | |
4106 | /* |
4107 | * Set maximum battery charging current. |
4108 | */ |
4109 | #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 |
4110 | |
4111 | struct ec_params_current_limit { |
4112 | uint32_t limit; /* in mA */ |
4113 | } __ec_align4; |
4114 | |
4115 | /* |
4116 | * Set maximum external voltage / current. |
4117 | */ |
4118 | #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 |
4119 | |
4120 | /* Command v0 is used only on Spring and is obsolete + unsupported */ |
4121 | struct ec_params_external_power_limit_v1 { |
4122 | uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ |
4123 | uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ |
4124 | } __ec_align2; |
4125 | |
4126 | #define EC_POWER_LIMIT_NONE 0xffff |
4127 | |
4128 | /* |
4129 | * Set maximum voltage & current of a dedicated charge port |
4130 | */ |
4131 | #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 |
4132 | |
4133 | struct ec_params_dedicated_charger_limit { |
4134 | uint16_t current_lim; /* in mA */ |
4135 | uint16_t voltage_lim; /* in mV */ |
4136 | } __ec_align2; |
4137 | |
4138 | /*****************************************************************************/ |
4139 | /* Hibernate/Deep Sleep Commands */ |
4140 | |
4141 | /* Set the delay before going into hibernation. */ |
4142 | #define EC_CMD_HIBERNATION_DELAY 0x00A8 |
4143 | |
4144 | struct ec_params_hibernation_delay { |
4145 | /* |
4146 | * Seconds to wait in G3 before hibernate. Pass in 0 to read the |
4147 | * current settings without changing them. |
4148 | */ |
4149 | uint32_t seconds; |
4150 | } __ec_align4; |
4151 | |
4152 | struct ec_response_hibernation_delay { |
4153 | /* |
4154 | * The current time in seconds in which the system has been in the G3 |
4155 | * state. This value is reset if the EC transitions out of G3. |
4156 | */ |
4157 | uint32_t time_g3; |
4158 | |
4159 | /* |
4160 | * The current time remaining in seconds until the EC should hibernate. |
4161 | * This value is also reset if the EC transitions out of G3. |
4162 | */ |
4163 | uint32_t time_remaining; |
4164 | |
4165 | /* |
4166 | * The current time in seconds that the EC should wait in G3 before |
4167 | * hibernating. |
4168 | */ |
4169 | uint32_t hibernate_delay; |
4170 | } __ec_align4; |
4171 | |
4172 | /* Inform the EC when entering a sleep state */ |
4173 | #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 |
4174 | |
4175 | enum host_sleep_event { |
4176 | HOST_SLEEP_EVENT_S3_SUSPEND = 1, |
4177 | HOST_SLEEP_EVENT_S3_RESUME = 2, |
4178 | HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, |
4179 | HOST_SLEEP_EVENT_S0IX_RESUME = 4, |
4180 | /* S3 suspend with additional enabled wake sources */ |
4181 | HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5, |
4182 | }; |
4183 | |
4184 | struct ec_params_host_sleep_event { |
4185 | uint8_t sleep_event; |
4186 | } __ec_align1; |
4187 | |
4188 | /* |
4189 | * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep |
4190 | * transition failures |
4191 | */ |
4192 | #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0 |
4193 | |
4194 | /* Disable timeout detection for this sleep transition */ |
4195 | #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF |
4196 | |
4197 | struct ec_params_host_sleep_event_v1 { |
4198 | /* The type of sleep being entered or exited. */ |
4199 | uint8_t sleep_event; |
4200 | |
4201 | /* Padding */ |
4202 | uint8_t reserved; |
4203 | union { |
4204 | /* Parameters that apply for suspend messages. */ |
4205 | struct { |
4206 | /* |
4207 | * The timeout in milliseconds between when this message |
4208 | * is received and when the EC will declare sleep |
4209 | * transition failure if the sleep signal is not |
4210 | * asserted. |
4211 | */ |
4212 | uint16_t sleep_timeout_ms; |
4213 | } suspend_params; |
4214 | |
4215 | /* No parameters for non-suspend messages. */ |
4216 | }; |
4217 | } __ec_align2; |
4218 | |
4219 | /* A timeout occurred when this bit is set */ |
4220 | #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 |
4221 | |
4222 | /* |
4223 | * The mask defining which bits correspond to the number of sleep transitions, |
4224 | * as well as the maximum number of suspend line transitions that will be |
4225 | * reported back to the host. |
4226 | */ |
4227 | #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF |
4228 | |
4229 | struct ec_response_host_sleep_event_v1 { |
4230 | union { |
4231 | /* Response fields that apply for resume messages. */ |
4232 | struct { |
4233 | /* |
4234 | * The number of sleep power signal transitions that |
4235 | * occurred since the suspend message. The high bit |
4236 | * indicates a timeout occurred. |
4237 | */ |
4238 | uint32_t sleep_transitions; |
4239 | } resume_response; |
4240 | |
4241 | /* No response fields for non-resume messages. */ |
4242 | }; |
4243 | } __ec_align4; |
4244 | |
4245 | /*****************************************************************************/ |
4246 | /* Device events */ |
4247 | #define EC_CMD_DEVICE_EVENT 0x00AA |
4248 | |
4249 | enum ec_device_event { |
4250 | EC_DEVICE_EVENT_TRACKPAD, |
4251 | EC_DEVICE_EVENT_DSP, |
4252 | EC_DEVICE_EVENT_WIFI, |
4253 | EC_DEVICE_EVENT_WLC, |
4254 | }; |
4255 | |
4256 | enum ec_device_event_param { |
4257 | /* Get and clear pending device events */ |
4258 | EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, |
4259 | /* Get device event mask */ |
4260 | EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, |
4261 | /* Set device event mask */ |
4262 | EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, |
4263 | }; |
4264 | |
4265 | #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32) |
4266 | |
4267 | struct ec_params_device_event { |
4268 | uint32_t event_mask; |
4269 | uint8_t param; |
4270 | } __ec_align_size1; |
4271 | |
4272 | struct ec_response_device_event { |
4273 | uint32_t event_mask; |
4274 | } __ec_align4; |
4275 | |
4276 | /*****************************************************************************/ |
4277 | /* Smart battery pass-through */ |
4278 | |
4279 | /* Get / Set 16-bit smart battery registers */ |
4280 | #define EC_CMD_SB_READ_WORD 0x00B0 |
4281 | #define EC_CMD_SB_WRITE_WORD 0x00B1 |
4282 | |
4283 | /* Get / Set string smart battery parameters |
4284 | * formatted as SMBUS "block". |
4285 | */ |
4286 | #define EC_CMD_SB_READ_BLOCK 0x00B2 |
4287 | #define EC_CMD_SB_WRITE_BLOCK 0x00B3 |
4288 | |
4289 | struct ec_params_sb_rd { |
4290 | uint8_t reg; |
4291 | } __ec_align1; |
4292 | |
4293 | struct ec_response_sb_rd_word { |
4294 | uint16_t value; |
4295 | } __ec_align2; |
4296 | |
4297 | struct ec_params_sb_wr_word { |
4298 | uint8_t reg; |
4299 | uint16_t value; |
4300 | } __ec_align1; |
4301 | |
4302 | struct ec_response_sb_rd_block { |
4303 | uint8_t data[32]; |
4304 | } __ec_align1; |
4305 | |
4306 | struct ec_params_sb_wr_block { |
4307 | uint8_t reg; |
4308 | uint16_t data[32]; |
4309 | } __ec_align1; |
4310 | |
4311 | /*****************************************************************************/ |
4312 | /* Battery vendor parameters |
4313 | * |
4314 | * Get or set vendor-specific parameters in the battery. Implementations may |
4315 | * differ between boards or batteries. On a set operation, the response |
4316 | * contains the actual value set, which may be rounded or clipped from the |
4317 | * requested value. |
4318 | */ |
4319 | |
4320 | #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 |
4321 | |
4322 | enum ec_battery_vendor_param_mode { |
4323 | BATTERY_VENDOR_PARAM_MODE_GET = 0, |
4324 | BATTERY_VENDOR_PARAM_MODE_SET, |
4325 | }; |
4326 | |
4327 | struct ec_params_battery_vendor_param { |
4328 | uint32_t param; |
4329 | uint32_t value; |
4330 | uint8_t mode; |
4331 | } __ec_align_size1; |
4332 | |
4333 | struct ec_response_battery_vendor_param { |
4334 | uint32_t value; |
4335 | } __ec_align4; |
4336 | |
4337 | /*****************************************************************************/ |
4338 | /* |
4339 | * Smart Battery Firmware Update Commands |
4340 | */ |
4341 | #define EC_CMD_SB_FW_UPDATE 0x00B5 |
4342 | |
4343 | enum ec_sb_fw_update_subcmd { |
4344 | EC_SB_FW_UPDATE_PREPARE = 0x0, |
4345 | EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ |
4346 | EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ |
4347 | EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ |
4348 | EC_SB_FW_UPDATE_END = 0x4, |
4349 | EC_SB_FW_UPDATE_STATUS = 0x5, |
4350 | EC_SB_FW_UPDATE_PROTECT = 0x6, |
4351 | EC_SB_FW_UPDATE_MAX = 0x7, |
4352 | }; |
4353 | |
4354 | #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 |
4355 | #define SB_FW_UPDATE_CMD_STATUS_SIZE 2 |
4356 | #define SB_FW_UPDATE_CMD_INFO_SIZE 8 |
4357 | |
4358 | struct { |
4359 | uint16_t ; /* enum ec_sb_fw_update_subcmd */ |
4360 | uint16_t ; /* firmware id */ |
4361 | } __ec_align4; |
4362 | |
4363 | struct ec_params_sb_fw_update { |
4364 | struct ec_sb_fw_update_header hdr; |
4365 | union { |
4366 | /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ |
4367 | /* EC_SB_FW_UPDATE_INFO = 0x1 */ |
4368 | /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ |
4369 | /* EC_SB_FW_UPDATE_END = 0x4 */ |
4370 | /* EC_SB_FW_UPDATE_STATUS = 0x5 */ |
4371 | /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ |
4372 | /* Those have no args */ |
4373 | |
4374 | /* EC_SB_FW_UPDATE_WRITE = 0x3 */ |
4375 | struct __ec_align4 { |
4376 | uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; |
4377 | } write; |
4378 | }; |
4379 | } __ec_align4; |
4380 | |
4381 | struct ec_response_sb_fw_update { |
4382 | union { |
4383 | /* EC_SB_FW_UPDATE_INFO = 0x1 */ |
4384 | struct __ec_align1 { |
4385 | uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; |
4386 | } info; |
4387 | |
4388 | /* EC_SB_FW_UPDATE_STATUS = 0x5 */ |
4389 | struct __ec_align1 { |
4390 | uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; |
4391 | } status; |
4392 | }; |
4393 | } __ec_align1; |
4394 | |
4395 | /* |
4396 | * Entering Verified Boot Mode Command |
4397 | * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. |
4398 | * Valid Modes are: normal, developer, and recovery. |
4399 | */ |
4400 | #define EC_CMD_ENTERING_MODE 0x00B6 |
4401 | |
4402 | struct ec_params_entering_mode { |
4403 | int vboot_mode; |
4404 | } __ec_align4; |
4405 | |
4406 | #define VBOOT_MODE_NORMAL 0 |
4407 | #define VBOOT_MODE_DEVELOPER 1 |
4408 | #define VBOOT_MODE_RECOVERY 2 |
4409 | |
4410 | /*****************************************************************************/ |
4411 | /* |
4412 | * I2C passthru protection command: Protects I2C tunnels against access on |
4413 | * certain addresses (board-specific). |
4414 | */ |
4415 | #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 |
4416 | |
4417 | enum ec_i2c_passthru_protect_subcmd { |
4418 | EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, |
4419 | EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, |
4420 | }; |
4421 | |
4422 | struct ec_params_i2c_passthru_protect { |
4423 | uint8_t subcmd; |
4424 | uint8_t port; /* I2C port number */ |
4425 | } __ec_align1; |
4426 | |
4427 | struct ec_response_i2c_passthru_protect { |
4428 | uint8_t status; /* Status flags (0: unlocked, 1: locked) */ |
4429 | } __ec_align1; |
4430 | |
4431 | |
4432 | /*****************************************************************************/ |
4433 | /* |
4434 | * HDMI CEC commands |
4435 | * |
4436 | * These commands are for sending and receiving message via HDMI CEC |
4437 | */ |
4438 | |
4439 | #define EC_CEC_MAX_PORTS 16 |
4440 | |
4441 | #define MAX_CEC_MSG_LEN 16 |
4442 | |
4443 | /* |
4444 | * Helper macros for packing/unpacking cec_events. |
4445 | * bits[27:0] : bitmask of events from enum mkbp_cec_event |
4446 | * bits[31:28]: port number |
4447 | */ |
4448 | #define EC_MKBP_EVENT_CEC_PACK(events, port) \ |
4449 | (((events) & GENMASK(27, 0)) | (((port) & 0xf) << 28)) |
4450 | #define EC_MKBP_EVENT_CEC_GET_EVENTS(event) ((event) & GENMASK(27, 0)) |
4451 | #define EC_MKBP_EVENT_CEC_GET_PORT(event) (((event) >> 28) & 0xf) |
4452 | |
4453 | /* CEC message from the AP to be written on the CEC bus */ |
4454 | #define EC_CMD_CEC_WRITE_MSG 0x00B8 |
4455 | |
4456 | /** |
4457 | * struct ec_params_cec_write - Message to write to the CEC bus |
4458 | * @msg: message content to write to the CEC bus |
4459 | */ |
4460 | struct ec_params_cec_write { |
4461 | uint8_t msg[MAX_CEC_MSG_LEN]; |
4462 | } __ec_align1; |
4463 | |
4464 | /** |
4465 | * struct ec_params_cec_write_v1 - Message to write to the CEC bus |
4466 | * @port: CEC port to write the message on |
4467 | * @msg_len: length of msg in bytes |
4468 | * @msg: message content to write to the CEC bus |
4469 | */ |
4470 | struct ec_params_cec_write_v1 { |
4471 | uint8_t port; |
4472 | uint8_t msg_len; |
4473 | uint8_t msg[MAX_CEC_MSG_LEN]; |
4474 | } __ec_align1; |
4475 | |
4476 | /* CEC message read from a CEC bus reported back to the AP */ |
4477 | #define EC_CMD_CEC_READ_MSG 0x00B9 |
4478 | |
4479 | /** |
4480 | * struct ec_params_cec_read - Read a message from the CEC bus |
4481 | * @port: CEC port to read a message on |
4482 | */ |
4483 | struct ec_params_cec_read { |
4484 | uint8_t port; |
4485 | } __ec_align1; |
4486 | |
4487 | /** |
4488 | * struct ec_response_cec_read - Message read from the CEC bus |
4489 | * @msg_len: length of msg in bytes |
4490 | * @msg: message content read from the CEC bus |
4491 | */ |
4492 | struct ec_response_cec_read { |
4493 | uint8_t msg_len; |
4494 | uint8_t msg[MAX_CEC_MSG_LEN]; |
4495 | } __ec_align1; |
4496 | |
4497 | /* Set various CEC parameters */ |
4498 | #define EC_CMD_CEC_SET 0x00BA |
4499 | |
4500 | /** |
4501 | * struct ec_params_cec_set - CEC parameters set |
4502 | * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS |
4503 | * @port: CEC port to set the parameter on |
4504 | * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC |
4505 | * or 1 to enable CEC functionality, in case cmd is |
4506 | * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical |
4507 | * address between 0 and 15 or 0xff to unregister |
4508 | */ |
4509 | struct ec_params_cec_set { |
4510 | uint8_t cmd : 4; /* enum cec_command */ |
4511 | uint8_t port : 4; |
4512 | uint8_t val; |
4513 | } __ec_align1; |
4514 | |
4515 | /* Read various CEC parameters */ |
4516 | #define EC_CMD_CEC_GET 0x00BB |
4517 | |
4518 | /** |
4519 | * struct ec_params_cec_get - CEC parameters get |
4520 | * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS |
4521 | * @port: CEC port to get the parameter on |
4522 | */ |
4523 | struct ec_params_cec_get { |
4524 | uint8_t cmd : 4; /* enum cec_command */ |
4525 | uint8_t port : 4; |
4526 | } __ec_align1; |
4527 | |
4528 | /** |
4529 | * struct ec_response_cec_get - CEC parameters get response |
4530 | * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is |
4531 | * disabled or 1 if CEC functionality is enabled, |
4532 | * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the |
4533 | * configured logical address between 0 and 15 or 0xff if unregistered |
4534 | */ |
4535 | struct ec_response_cec_get { |
4536 | uint8_t val; |
4537 | } __ec_align1; |
4538 | |
4539 | /* Get the number of CEC ports */ |
4540 | #define EC_CMD_CEC_PORT_COUNT 0x00C1 |
4541 | |
4542 | /** |
4543 | * struct ec_response_cec_port_count - CEC port count response |
4544 | * @port_count: number of CEC ports |
4545 | */ |
4546 | struct ec_response_cec_port_count { |
4547 | uint8_t port_count; |
4548 | } __ec_align1; |
4549 | |
4550 | /* CEC parameters command */ |
4551 | enum cec_command { |
4552 | /* CEC reading, writing and events enable */ |
4553 | CEC_CMD_ENABLE, |
4554 | /* CEC logical address */ |
4555 | CEC_CMD_LOGICAL_ADDRESS, |
4556 | }; |
4557 | |
4558 | /* Events from CEC to AP */ |
4559 | enum mkbp_cec_event { |
4560 | /* Outgoing message was acknowledged by a follower */ |
4561 | EC_MKBP_CEC_SEND_OK = BIT(0), |
4562 | /* Outgoing message was not acknowledged */ |
4563 | EC_MKBP_CEC_SEND_FAILED = BIT(1), |
4564 | /* Incoming message can be read out by AP */ |
4565 | EC_MKBP_CEC_HAVE_DATA = BIT(2), |
4566 | }; |
4567 | |
4568 | /*****************************************************************************/ |
4569 | |
4570 | /* Commands for audio codec. */ |
4571 | #define EC_CMD_EC_CODEC 0x00BC |
4572 | |
4573 | enum ec_codec_subcmd { |
4574 | EC_CODEC_GET_CAPABILITIES = 0x0, |
4575 | EC_CODEC_GET_SHM_ADDR = 0x1, |
4576 | EC_CODEC_SET_SHM_ADDR = 0x2, |
4577 | EC_CODEC_SUBCMD_COUNT, |
4578 | }; |
4579 | |
4580 | enum ec_codec_cap { |
4581 | EC_CODEC_CAP_WOV_AUDIO_SHM = 0, |
4582 | EC_CODEC_CAP_WOV_LANG_SHM = 1, |
4583 | EC_CODEC_CAP_LAST = 32, |
4584 | }; |
4585 | |
4586 | enum ec_codec_shm_id { |
4587 | EC_CODEC_SHM_ID_WOV_AUDIO = 0x0, |
4588 | EC_CODEC_SHM_ID_WOV_LANG = 0x1, |
4589 | EC_CODEC_SHM_ID_LAST, |
4590 | }; |
4591 | |
4592 | enum ec_codec_shm_type { |
4593 | EC_CODEC_SHM_TYPE_EC_RAM = 0x0, |
4594 | EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1, |
4595 | }; |
4596 | |
4597 | struct __ec_align1 ec_param_ec_codec_get_shm_addr { |
4598 | uint8_t shm_id; |
4599 | uint8_t reserved[3]; |
4600 | }; |
4601 | |
4602 | struct __ec_align4 ec_param_ec_codec_set_shm_addr { |
4603 | uint64_t phys_addr; |
4604 | uint32_t len; |
4605 | uint8_t shm_id; |
4606 | uint8_t reserved[3]; |
4607 | }; |
4608 | |
4609 | struct __ec_align4 ec_param_ec_codec { |
4610 | uint8_t cmd; /* enum ec_codec_subcmd */ |
4611 | uint8_t reserved[3]; |
4612 | |
4613 | union { |
4614 | struct ec_param_ec_codec_get_shm_addr |
4615 | get_shm_addr_param; |
4616 | struct ec_param_ec_codec_set_shm_addr |
4617 | set_shm_addr_param; |
4618 | }; |
4619 | }; |
4620 | |
4621 | struct __ec_align4 ec_response_ec_codec_get_capabilities { |
4622 | uint32_t capabilities; |
4623 | }; |
4624 | |
4625 | struct __ec_align4 ec_response_ec_codec_get_shm_addr { |
4626 | uint64_t phys_addr; |
4627 | uint32_t len; |
4628 | uint8_t type; |
4629 | uint8_t reserved[3]; |
4630 | }; |
4631 | |
4632 | /*****************************************************************************/ |
4633 | |
4634 | /* Commands for DMIC on audio codec. */ |
4635 | #define EC_CMD_EC_CODEC_DMIC 0x00BD |
4636 | |
4637 | enum ec_codec_dmic_subcmd { |
4638 | EC_CODEC_DMIC_GET_MAX_GAIN = 0x0, |
4639 | EC_CODEC_DMIC_SET_GAIN_IDX = 0x1, |
4640 | EC_CODEC_DMIC_GET_GAIN_IDX = 0x2, |
4641 | EC_CODEC_DMIC_SUBCMD_COUNT, |
4642 | }; |
4643 | |
4644 | enum ec_codec_dmic_channel { |
4645 | EC_CODEC_DMIC_CHANNEL_0 = 0x0, |
4646 | EC_CODEC_DMIC_CHANNEL_1 = 0x1, |
4647 | EC_CODEC_DMIC_CHANNEL_2 = 0x2, |
4648 | EC_CODEC_DMIC_CHANNEL_3 = 0x3, |
4649 | EC_CODEC_DMIC_CHANNEL_4 = 0x4, |
4650 | EC_CODEC_DMIC_CHANNEL_5 = 0x5, |
4651 | EC_CODEC_DMIC_CHANNEL_6 = 0x6, |
4652 | EC_CODEC_DMIC_CHANNEL_7 = 0x7, |
4653 | EC_CODEC_DMIC_CHANNEL_COUNT, |
4654 | }; |
4655 | |
4656 | struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx { |
4657 | uint8_t channel; /* enum ec_codec_dmic_channel */ |
4658 | uint8_t gain; |
4659 | uint8_t reserved[2]; |
4660 | }; |
4661 | |
4662 | struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx { |
4663 | uint8_t channel; /* enum ec_codec_dmic_channel */ |
4664 | uint8_t reserved[3]; |
4665 | }; |
4666 | |
4667 | struct __ec_align4 ec_param_ec_codec_dmic { |
4668 | uint8_t cmd; /* enum ec_codec_dmic_subcmd */ |
4669 | uint8_t reserved[3]; |
4670 | |
4671 | union { |
4672 | struct ec_param_ec_codec_dmic_set_gain_idx |
4673 | set_gain_idx_param; |
4674 | struct ec_param_ec_codec_dmic_get_gain_idx |
4675 | get_gain_idx_param; |
4676 | }; |
4677 | }; |
4678 | |
4679 | struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain { |
4680 | uint8_t max_gain; |
4681 | }; |
4682 | |
4683 | struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx { |
4684 | uint8_t gain; |
4685 | }; |
4686 | |
4687 | /*****************************************************************************/ |
4688 | |
4689 | /* Commands for I2S RX on audio codec. */ |
4690 | |
4691 | #define EC_CMD_EC_CODEC_I2S_RX 0x00BE |
4692 | |
4693 | enum ec_codec_i2s_rx_subcmd { |
4694 | EC_CODEC_I2S_RX_ENABLE = 0x0, |
4695 | EC_CODEC_I2S_RX_DISABLE = 0x1, |
4696 | EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2, |
4697 | EC_CODEC_I2S_RX_SET_DAIFMT = 0x3, |
4698 | EC_CODEC_I2S_RX_SET_BCLK = 0x4, |
4699 | EC_CODEC_I2S_RX_RESET = 0x5, |
4700 | EC_CODEC_I2S_RX_SUBCMD_COUNT, |
4701 | }; |
4702 | |
4703 | enum ec_codec_i2s_rx_sample_depth { |
4704 | EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0, |
4705 | EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1, |
4706 | EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT, |
4707 | }; |
4708 | |
4709 | enum ec_codec_i2s_rx_daifmt { |
4710 | EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0, |
4711 | EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1, |
4712 | EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2, |
4713 | EC_CODEC_I2S_RX_DAIFMT_COUNT, |
4714 | }; |
4715 | |
4716 | struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth { |
4717 | uint8_t depth; |
4718 | uint8_t reserved[3]; |
4719 | }; |
4720 | |
4721 | struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain { |
4722 | uint8_t left; |
4723 | uint8_t right; |
4724 | uint8_t reserved[2]; |
4725 | }; |
4726 | |
4727 | struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt { |
4728 | uint8_t daifmt; |
4729 | uint8_t reserved[3]; |
4730 | }; |
4731 | |
4732 | struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk { |
4733 | uint32_t bclk; |
4734 | }; |
4735 | |
4736 | struct __ec_align4 ec_param_ec_codec_i2s_rx { |
4737 | uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */ |
4738 | uint8_t reserved[3]; |
4739 | |
4740 | union { |
4741 | struct ec_param_ec_codec_i2s_rx_set_sample_depth |
4742 | set_sample_depth_param; |
4743 | struct ec_param_ec_codec_i2s_rx_set_daifmt |
4744 | set_daifmt_param; |
4745 | struct ec_param_ec_codec_i2s_rx_set_bclk |
4746 | set_bclk_param; |
4747 | }; |
4748 | }; |
4749 | |
4750 | /*****************************************************************************/ |
4751 | /* Commands for WoV on audio codec. */ |
4752 | |
4753 | #define EC_CMD_EC_CODEC_WOV 0x00BF |
4754 | |
4755 | enum ec_codec_wov_subcmd { |
4756 | EC_CODEC_WOV_SET_LANG = 0x0, |
4757 | EC_CODEC_WOV_SET_LANG_SHM = 0x1, |
4758 | EC_CODEC_WOV_GET_LANG = 0x2, |
4759 | EC_CODEC_WOV_ENABLE = 0x3, |
4760 | EC_CODEC_WOV_DISABLE = 0x4, |
4761 | EC_CODEC_WOV_READ_AUDIO = 0x5, |
4762 | EC_CODEC_WOV_READ_AUDIO_SHM = 0x6, |
4763 | EC_CODEC_WOV_SUBCMD_COUNT, |
4764 | }; |
4765 | |
4766 | /* |
4767 | * @hash is SHA256 of the whole language model. |
4768 | * @total_len indicates the length of whole language model. |
4769 | * @offset is the cursor from the beginning of the model. |
4770 | * @buf is the packet buffer. |
4771 | * @len denotes how many bytes in the buf. |
4772 | */ |
4773 | struct __ec_align4 ec_param_ec_codec_wov_set_lang { |
4774 | uint8_t hash[32]; |
4775 | uint32_t total_len; |
4776 | uint32_t offset; |
4777 | uint8_t buf[128]; |
4778 | uint32_t len; |
4779 | }; |
4780 | |
4781 | struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm { |
4782 | uint8_t hash[32]; |
4783 | uint32_t total_len; |
4784 | }; |
4785 | |
4786 | struct __ec_align4 ec_param_ec_codec_wov { |
4787 | uint8_t cmd; /* enum ec_codec_wov_subcmd */ |
4788 | uint8_t reserved[3]; |
4789 | |
4790 | union { |
4791 | struct ec_param_ec_codec_wov_set_lang |
4792 | set_lang_param; |
4793 | struct ec_param_ec_codec_wov_set_lang_shm |
4794 | set_lang_shm_param; |
4795 | }; |
4796 | }; |
4797 | |
4798 | struct __ec_align4 ec_response_ec_codec_wov_get_lang { |
4799 | uint8_t hash[32]; |
4800 | }; |
4801 | |
4802 | struct __ec_align4 ec_response_ec_codec_wov_read_audio { |
4803 | uint8_t buf[128]; |
4804 | uint32_t len; |
4805 | }; |
4806 | |
4807 | struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm { |
4808 | uint32_t offset; |
4809 | uint32_t len; |
4810 | }; |
4811 | |
4812 | /*****************************************************************************/ |
4813 | /* System commands */ |
4814 | |
4815 | /* |
4816 | * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't |
4817 | * necessarily reboot the EC. Rename to "image" or something similar? |
4818 | */ |
4819 | #define EC_CMD_REBOOT_EC 0x00D2 |
4820 | |
4821 | /* Command */ |
4822 | enum ec_reboot_cmd { |
4823 | EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ |
4824 | EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ |
4825 | EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ |
4826 | /* (command 3 was jump to RW-B) */ |
4827 | EC_REBOOT_COLD = 4, /* Cold-reboot */ |
4828 | EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ |
4829 | EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ |
4830 | EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ |
4831 | EC_REBOOT_COLD_AP_OFF = 8, /* Cold-reboot and don't boot AP */ |
4832 | }; |
4833 | |
4834 | /* Flags for ec_params_reboot_ec.reboot_flags */ |
4835 | #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ |
4836 | #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ |
4837 | #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */ |
4838 | |
4839 | struct ec_params_reboot_ec { |
4840 | uint8_t cmd; /* enum ec_reboot_cmd */ |
4841 | uint8_t flags; /* See EC_REBOOT_FLAG_* */ |
4842 | } __ec_align1; |
4843 | |
4844 | /* |
4845 | * Get information on last EC panic. |
4846 | * |
4847 | * Returns variable-length platform-dependent panic information. See panic.h |
4848 | * for details. |
4849 | */ |
4850 | #define EC_CMD_GET_PANIC_INFO 0x00D3 |
4851 | |
4852 | /*****************************************************************************/ |
4853 | /* |
4854 | * Special commands |
4855 | * |
4856 | * These do not follow the normal rules for commands. See each command for |
4857 | * details. |
4858 | */ |
4859 | |
4860 | /* |
4861 | * Reboot NOW |
4862 | * |
4863 | * This command will work even when the EC LPC interface is busy, because the |
4864 | * reboot command is processed at interrupt level. Note that when the EC |
4865 | * reboots, the host will reboot too, so there is no response to this command. |
4866 | * |
4867 | * Use EC_CMD_REBOOT_EC to reboot the EC more politely. |
4868 | */ |
4869 | #define EC_CMD_REBOOT 0x00D1 /* Think "die" */ |
4870 | |
4871 | /* |
4872 | * Resend last response (not supported on LPC). |
4873 | * |
4874 | * Returns EC_RES_UNAVAILABLE if there is no response available - for example, |
4875 | * there was no previous command, or the previous command's response was too |
4876 | * big to save. |
4877 | */ |
4878 | #define EC_CMD_RESEND_RESPONSE 0x00DB |
4879 | |
4880 | /* |
4881 | * This header byte on a command indicate version 0. Any header byte less |
4882 | * than this means that we are talking to an old EC which doesn't support |
4883 | * versioning. In that case, we assume version 0. |
4884 | * |
4885 | * Header bytes greater than this indicate a later version. For example, |
4886 | * EC_CMD_VERSION0 + 1 means we are using version 1. |
4887 | * |
4888 | * The old EC interface must not use commands 0xdc or higher. |
4889 | */ |
4890 | #define EC_CMD_VERSION0 0x00DC |
4891 | |
4892 | /*****************************************************************************/ |
4893 | /* |
4894 | * PD commands |
4895 | * |
4896 | * These commands are for PD MCU communication. |
4897 | */ |
4898 | |
4899 | /* EC to PD MCU exchange status command */ |
4900 | #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 |
4901 | #define EC_VER_PD_EXCHANGE_STATUS 2 |
4902 | |
4903 | enum pd_charge_state { |
4904 | PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ |
4905 | PD_CHARGE_NONE, /* No charging allowed */ |
4906 | PD_CHARGE_5V, /* 5V charging only */ |
4907 | PD_CHARGE_MAX /* Charge at max voltage */ |
4908 | }; |
4909 | |
4910 | /* Status of EC being sent to PD */ |
4911 | #define EC_STATUS_HIBERNATING BIT(0) |
4912 | |
4913 | struct ec_params_pd_status { |
4914 | uint8_t status; /* EC status */ |
4915 | int8_t batt_soc; /* battery state of charge */ |
4916 | uint8_t charge_state; /* charging state (from enum pd_charge_state) */ |
4917 | } __ec_align1; |
4918 | |
4919 | /* Status of PD being sent back to EC */ |
4920 | #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ |
4921 | #define PD_STATUS_IN_RW BIT(1) /* Running RW image */ |
4922 | #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ |
4923 | #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ |
4924 | #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ |
4925 | #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ |
4926 | #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ |
4927 | #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ |
4928 | PD_STATUS_TCPC_ALERT_1 | \ |
4929 | PD_STATUS_HOST_EVENT) |
4930 | struct ec_response_pd_status { |
4931 | uint32_t curr_lim_ma; /* input current limit */ |
4932 | uint16_t status; /* PD MCU status */ |
4933 | int8_t active_charge_port; /* active charging port */ |
4934 | } __ec_align_size1; |
4935 | |
4936 | /* AP to PD MCU host event status command, cleared on read */ |
4937 | #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 |
4938 | |
4939 | /* PD MCU host event status bits */ |
4940 | #define PD_EVENT_UPDATE_DEVICE BIT(0) |
4941 | #define PD_EVENT_POWER_CHANGE BIT(1) |
4942 | #define PD_EVENT_IDENTITY_RECEIVED BIT(2) |
4943 | #define PD_EVENT_DATA_SWAP BIT(3) |
4944 | struct ec_response_host_event_status { |
4945 | uint32_t status; /* PD MCU host event status */ |
4946 | } __ec_align4; |
4947 | |
4948 | /* Set USB type-C port role and muxes */ |
4949 | #define EC_CMD_USB_PD_CONTROL 0x0101 |
4950 | |
4951 | enum usb_pd_control_role { |
4952 | USB_PD_CTRL_ROLE_NO_CHANGE = 0, |
4953 | USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ |
4954 | USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, |
4955 | USB_PD_CTRL_ROLE_FORCE_SINK = 3, |
4956 | USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, |
4957 | USB_PD_CTRL_ROLE_FREEZE = 5, |
4958 | USB_PD_CTRL_ROLE_COUNT |
4959 | }; |
4960 | |
4961 | enum usb_pd_control_mux { |
4962 | USB_PD_CTRL_MUX_NO_CHANGE = 0, |
4963 | USB_PD_CTRL_MUX_NONE = 1, |
4964 | USB_PD_CTRL_MUX_USB = 2, |
4965 | USB_PD_CTRL_MUX_DP = 3, |
4966 | USB_PD_CTRL_MUX_DOCK = 4, |
4967 | USB_PD_CTRL_MUX_AUTO = 5, |
4968 | USB_PD_CTRL_MUX_COUNT |
4969 | }; |
4970 | |
4971 | enum usb_pd_control_swap { |
4972 | USB_PD_CTRL_SWAP_NONE = 0, |
4973 | USB_PD_CTRL_SWAP_DATA = 1, |
4974 | USB_PD_CTRL_SWAP_POWER = 2, |
4975 | USB_PD_CTRL_SWAP_VCONN = 3, |
4976 | USB_PD_CTRL_SWAP_COUNT |
4977 | }; |
4978 | |
4979 | struct ec_params_usb_pd_control { |
4980 | uint8_t port; |
4981 | uint8_t role; |
4982 | uint8_t mux; |
4983 | uint8_t swap; |
4984 | } __ec_align1; |
4985 | |
4986 | #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ |
4987 | #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ |
4988 | #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ |
4989 | |
4990 | #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ |
4991 | #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ |
4992 | #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */ |
4993 | #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */ |
4994 | #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */ |
4995 | #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ |
4996 | #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ |
4997 | |
4998 | struct ec_response_usb_pd_control { |
4999 | uint8_t enabled; |
5000 | uint8_t role; |
5001 | uint8_t polarity; |
5002 | uint8_t state; |
5003 | } __ec_align1; |
5004 | |
5005 | struct ec_response_usb_pd_control_v1 { |
5006 | uint8_t enabled; |
5007 | uint8_t role; |
5008 | uint8_t polarity; |
5009 | char state[32]; |
5010 | } __ec_align1; |
5011 | |
5012 | /* Values representing usbc PD CC state */ |
5013 | #define USBC_PD_CC_NONE 0 /* No accessory connected */ |
5014 | #define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ |
5015 | #define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ |
5016 | #define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ |
5017 | #define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ |
5018 | #define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ |
5019 | |
5020 | /* Active/Passive Cable */ |
5021 | #define USB_PD_CTRL_ACTIVE_CABLE BIT(0) |
5022 | /* Optical/Non-optical cable */ |
5023 | #define USB_PD_CTRL_OPTICAL_CABLE BIT(1) |
5024 | /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */ |
5025 | #define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2) |
5026 | /* Active Link Uni-Direction */ |
5027 | #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3) |
5028 | |
5029 | struct ec_response_usb_pd_control_v2 { |
5030 | uint8_t enabled; |
5031 | uint8_t role; |
5032 | uint8_t polarity; |
5033 | char state[32]; |
5034 | uint8_t cc_state; /* enum pd_cc_states representing cc state */ |
5035 | uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ |
5036 | uint8_t reserved; /* Reserved for future use */ |
5037 | uint8_t control_flags; /* USB_PD_CTRL_*flags */ |
5038 | uint8_t cable_speed; /* TBT_SS_* cable speed */ |
5039 | uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */ |
5040 | } __ec_align1; |
5041 | |
5042 | #define EC_CMD_USB_PD_PORTS 0x0102 |
5043 | |
5044 | /* Maximum number of PD ports on a device, num_ports will be <= this */ |
5045 | #define EC_USB_PD_MAX_PORTS 8 |
5046 | |
5047 | struct ec_response_usb_pd_ports { |
5048 | uint8_t num_ports; |
5049 | } __ec_align1; |
5050 | |
5051 | #define EC_CMD_USB_PD_POWER_INFO 0x0103 |
5052 | |
5053 | #define PD_POWER_CHARGING_PORT 0xff |
5054 | struct ec_params_usb_pd_power_info { |
5055 | uint8_t port; |
5056 | } __ec_align1; |
5057 | |
5058 | enum usb_chg_type { |
5059 | USB_CHG_TYPE_NONE, |
5060 | USB_CHG_TYPE_PD, |
5061 | USB_CHG_TYPE_C, |
5062 | USB_CHG_TYPE_PROPRIETARY, |
5063 | USB_CHG_TYPE_BC12_DCP, |
5064 | USB_CHG_TYPE_BC12_CDP, |
5065 | USB_CHG_TYPE_BC12_SDP, |
5066 | USB_CHG_TYPE_OTHER, |
5067 | USB_CHG_TYPE_VBUS, |
5068 | USB_CHG_TYPE_UNKNOWN, |
5069 | USB_CHG_TYPE_DEDICATED, |
5070 | }; |
5071 | enum usb_power_roles { |
5072 | USB_PD_PORT_POWER_DISCONNECTED, |
5073 | USB_PD_PORT_POWER_SOURCE, |
5074 | USB_PD_PORT_POWER_SINK, |
5075 | USB_PD_PORT_POWER_SINK_NOT_CHARGING, |
5076 | }; |
5077 | |
5078 | struct usb_chg_measures { |
5079 | uint16_t voltage_max; |
5080 | uint16_t voltage_now; |
5081 | uint16_t current_max; |
5082 | uint16_t current_lim; |
5083 | } __ec_align2; |
5084 | |
5085 | struct ec_response_usb_pd_power_info { |
5086 | uint8_t role; |
5087 | uint8_t type; |
5088 | uint8_t dualrole; |
5089 | uint8_t reserved1; |
5090 | struct usb_chg_measures meas; |
5091 | uint32_t max_power; |
5092 | } __ec_align4; |
5093 | |
5094 | |
5095 | /* |
5096 | * This command will return the number of USB PD charge port + the number |
5097 | * of dedicated port present. |
5098 | * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports |
5099 | */ |
5100 | #define EC_CMD_CHARGE_PORT_COUNT 0x0105 |
5101 | struct ec_response_charge_port_count { |
5102 | uint8_t port_count; |
5103 | } __ec_align1; |
5104 | |
5105 | /* Write USB-PD device FW */ |
5106 | #define EC_CMD_USB_PD_FW_UPDATE 0x0110 |
5107 | |
5108 | enum usb_pd_fw_update_cmds { |
5109 | USB_PD_FW_REBOOT, |
5110 | USB_PD_FW_FLASH_ERASE, |
5111 | USB_PD_FW_FLASH_WRITE, |
5112 | USB_PD_FW_ERASE_SIG, |
5113 | }; |
5114 | |
5115 | struct ec_params_usb_pd_fw_update { |
5116 | uint16_t dev_id; |
5117 | uint8_t cmd; |
5118 | uint8_t port; |
5119 | uint32_t size; /* Size to write in bytes */ |
5120 | /* Followed by data to write */ |
5121 | } __ec_align4; |
5122 | |
5123 | /* Write USB-PD Accessory RW_HASH table entry */ |
5124 | #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 |
5125 | /* RW hash is first 20 bytes of SHA-256 of RW section */ |
5126 | #define PD_RW_HASH_SIZE 20 |
5127 | struct ec_params_usb_pd_rw_hash_entry { |
5128 | uint16_t dev_id; |
5129 | uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; |
5130 | uint8_t reserved; /* |
5131 | * For alignment of current_image |
5132 | * TODO(rspangler) but it's not aligned! |
5133 | * Should have been reserved[2]. |
5134 | */ |
5135 | uint32_t current_image; /* One of ec_current_image */ |
5136 | } __ec_align1; |
5137 | |
5138 | /* Read USB-PD Accessory info */ |
5139 | #define EC_CMD_USB_PD_DEV_INFO 0x0112 |
5140 | |
5141 | struct ec_params_usb_pd_info_request { |
5142 | uint8_t port; |
5143 | } __ec_align1; |
5144 | |
5145 | /* Read USB-PD Device discovery info */ |
5146 | #define EC_CMD_USB_PD_DISCOVERY 0x0113 |
5147 | struct ec_params_usb_pd_discovery_entry { |
5148 | uint16_t vid; /* USB-IF VID */ |
5149 | uint16_t pid; /* USB-IF PID */ |
5150 | uint8_t ptype; /* product type (hub,periph,cable,ama) */ |
5151 | } __ec_align_size1; |
5152 | |
5153 | /* Override default charge behavior */ |
5154 | #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 |
5155 | |
5156 | /* Negative port parameters have special meaning */ |
5157 | enum usb_pd_override_ports { |
5158 | OVERRIDE_DONT_CHARGE = -2, |
5159 | OVERRIDE_OFF = -1, |
5160 | /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ |
5161 | }; |
5162 | |
5163 | struct ec_params_charge_port_override { |
5164 | int16_t override_port; /* Override port# */ |
5165 | } __ec_align2; |
5166 | |
5167 | /* |
5168 | * Read (and delete) one entry of PD event log. |
5169 | * TODO(crbug.com/751742): Make this host command more generic to accommodate |
5170 | * future non-PD logs that use the same internal EC event_log. |
5171 | */ |
5172 | #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 |
5173 | |
5174 | struct ec_response_pd_log { |
5175 | uint32_t timestamp; /* relative timestamp in milliseconds */ |
5176 | uint8_t type; /* event type : see PD_EVENT_xx below */ |
5177 | uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ |
5178 | uint16_t data; /* type-defined data payload */ |
5179 | uint8_t payload[]; /* optional additional data payload: 0..16 bytes */ |
5180 | } __ec_align4; |
5181 | |
5182 | /* The timestamp is the microsecond counter shifted to get about a ms. */ |
5183 | #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ |
5184 | |
5185 | #define PD_LOG_SIZE_MASK 0x1f |
5186 | #define PD_LOG_PORT_MASK 0xe0 |
5187 | #define PD_LOG_PORT_SHIFT 5 |
5188 | #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ |
5189 | ((size) & PD_LOG_SIZE_MASK)) |
5190 | #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) |
5191 | #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) |
5192 | |
5193 | /* PD event log : entry types */ |
5194 | /* PD MCU events */ |
5195 | #define PD_EVENT_MCU_BASE 0x00 |
5196 | #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) |
5197 | #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) |
5198 | /* Reserved for custom board event */ |
5199 | #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) |
5200 | /* PD generic accessory events */ |
5201 | #define PD_EVENT_ACC_BASE 0x20 |
5202 | #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) |
5203 | #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) |
5204 | /* PD power supply events */ |
5205 | #define PD_EVENT_PS_BASE 0x40 |
5206 | #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) |
5207 | /* PD video dongles events */ |
5208 | #define PD_EVENT_VIDEO_BASE 0x60 |
5209 | #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) |
5210 | #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) |
5211 | /* Returned in the "type" field, when there is no entry available */ |
5212 | #define PD_EVENT_NO_ENTRY 0xff |
5213 | |
5214 | /* |
5215 | * PD_EVENT_MCU_CHARGE event definition : |
5216 | * the payload is "struct usb_chg_measures" |
5217 | * the data field contains the port state flags as defined below : |
5218 | */ |
5219 | /* Port partner is a dual role device */ |
5220 | #define CHARGE_FLAGS_DUAL_ROLE BIT(15) |
5221 | /* Port is the pending override port */ |
5222 | #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14) |
5223 | /* Port is the override port */ |
5224 | #define CHARGE_FLAGS_OVERRIDE BIT(13) |
5225 | /* Charger type */ |
5226 | #define CHARGE_FLAGS_TYPE_SHIFT 3 |
5227 | #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) |
5228 | /* Power delivery role */ |
5229 | #define CHARGE_FLAGS_ROLE_MASK (7 << 0) |
5230 | |
5231 | /* |
5232 | * PD_EVENT_PS_FAULT data field flags definition : |
5233 | */ |
5234 | #define PS_FAULT_OCP 1 |
5235 | #define PS_FAULT_FAST_OCP 2 |
5236 | #define PS_FAULT_OVP 3 |
5237 | #define PS_FAULT_DISCH 4 |
5238 | |
5239 | /* |
5240 | * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". |
5241 | */ |
5242 | struct mcdp_version { |
5243 | uint8_t major; |
5244 | uint8_t minor; |
5245 | uint16_t build; |
5246 | } __ec_align4; |
5247 | |
5248 | struct mcdp_info { |
5249 | uint8_t family[2]; |
5250 | uint8_t chipid[2]; |
5251 | struct mcdp_version irom; |
5252 | struct mcdp_version fw; |
5253 | } __ec_align4; |
5254 | |
5255 | /* struct mcdp_info field decoding */ |
5256 | #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) |
5257 | #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) |
5258 | |
5259 | /* Get/Set USB-PD Alternate mode info */ |
5260 | #define EC_CMD_USB_PD_GET_AMODE 0x0116 |
5261 | struct ec_params_usb_pd_get_mode_request { |
5262 | uint16_t svid_idx; /* SVID index to get */ |
5263 | uint8_t port; /* port */ |
5264 | } __ec_align_size1; |
5265 | |
5266 | struct ec_params_usb_pd_get_mode_response { |
5267 | uint16_t svid; /* SVID */ |
5268 | uint16_t opos; /* Object Position */ |
5269 | uint32_t vdo[6]; /* Mode VDOs */ |
5270 | } __ec_align4; |
5271 | |
5272 | #define EC_CMD_USB_PD_SET_AMODE 0x0117 |
5273 | |
5274 | enum pd_mode_cmd { |
5275 | PD_EXIT_MODE = 0, |
5276 | PD_ENTER_MODE = 1, |
5277 | /* Not a command. Do NOT remove. */ |
5278 | PD_MODE_CMD_COUNT, |
5279 | }; |
5280 | |
5281 | struct ec_params_usb_pd_set_mode_request { |
5282 | uint32_t cmd; /* enum pd_mode_cmd */ |
5283 | uint16_t svid; /* SVID to set */ |
5284 | uint8_t opos; /* Object Position */ |
5285 | uint8_t port; /* port */ |
5286 | } __ec_align4; |
5287 | |
5288 | /* Ask the PD MCU to record a log of a requested type */ |
5289 | #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 |
5290 | |
5291 | struct ec_params_pd_write_log_entry { |
5292 | uint8_t type; /* event type : see PD_EVENT_xx above */ |
5293 | uint8_t port; /* port#, or 0 for events unrelated to a given port */ |
5294 | } __ec_align1; |
5295 | |
5296 | |
5297 | /* Control USB-PD chip */ |
5298 | #define EC_CMD_PD_CONTROL 0x0119 |
5299 | |
5300 | enum ec_pd_control_cmd { |
5301 | PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ |
5302 | PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ |
5303 | PD_RESET, /* Force reset the PD chip */ |
5304 | PD_CONTROL_DISABLE, /* Disable further calls to this command */ |
5305 | PD_CHIP_ON, /* Power on the PD chip */ |
5306 | }; |
5307 | |
5308 | struct ec_params_pd_control { |
5309 | uint8_t chip; /* chip id */ |
5310 | uint8_t subcmd; |
5311 | } __ec_align1; |
5312 | |
5313 | /* Get info about USB-C SS muxes */ |
5314 | #define EC_CMD_USB_PD_MUX_INFO 0x011A |
5315 | |
5316 | struct ec_params_usb_pd_mux_info { |
5317 | uint8_t port; /* USB-C port number */ |
5318 | } __ec_align1; |
5319 | |
5320 | /* Flags representing mux state */ |
5321 | #define USB_PD_MUX_NONE 0 /* Open switch */ |
5322 | #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ |
5323 | #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ |
5324 | #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ |
5325 | #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ |
5326 | #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ |
5327 | #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */ |
5328 | #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */ |
5329 | #define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */ |
5330 | |
5331 | struct ec_response_usb_pd_mux_info { |
5332 | uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ |
5333 | } __ec_align1; |
5334 | |
5335 | #define EC_CMD_PD_CHIP_INFO 0x011B |
5336 | |
5337 | struct ec_params_pd_chip_info { |
5338 | uint8_t port; /* USB-C port number */ |
5339 | uint8_t renew; /* Force renewal */ |
5340 | } __ec_align1; |
5341 | |
5342 | struct ec_response_pd_chip_info { |
5343 | uint16_t vendor_id; |
5344 | uint16_t product_id; |
5345 | uint16_t device_id; |
5346 | union { |
5347 | uint8_t fw_version_string[8]; |
5348 | uint64_t fw_version_number; |
5349 | }; |
5350 | } __ec_align2; |
5351 | |
5352 | struct ec_response_pd_chip_info_v1 { |
5353 | uint16_t vendor_id; |
5354 | uint16_t product_id; |
5355 | uint16_t device_id; |
5356 | union { |
5357 | uint8_t fw_version_string[8]; |
5358 | uint64_t fw_version_number; |
5359 | }; |
5360 | union { |
5361 | uint8_t min_req_fw_version_string[8]; |
5362 | uint64_t min_req_fw_version_number; |
5363 | }; |
5364 | } __ec_align2; |
5365 | |
5366 | /* Run RW signature verification and get status */ |
5367 | #define EC_CMD_RWSIG_CHECK_STATUS 0x011C |
5368 | |
5369 | struct ec_response_rwsig_check_status { |
5370 | uint32_t status; |
5371 | } __ec_align4; |
5372 | |
5373 | /* For controlling RWSIG task */ |
5374 | #define EC_CMD_RWSIG_ACTION 0x011D |
5375 | |
5376 | enum rwsig_action { |
5377 | RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ |
5378 | RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ |
5379 | }; |
5380 | |
5381 | struct ec_params_rwsig_action { |
5382 | uint32_t action; |
5383 | } __ec_align4; |
5384 | |
5385 | /* Run verification on a slot */ |
5386 | #define EC_CMD_EFS_VERIFY 0x011E |
5387 | |
5388 | struct ec_params_efs_verify { |
5389 | uint8_t region; /* enum ec_flash_region */ |
5390 | } __ec_align1; |
5391 | |
5392 | /* |
5393 | * Retrieve info from Cros Board Info store. Response is based on the data |
5394 | * type. Integers return a uint32. Strings return a string, using the response |
5395 | * size to determine how big it is. |
5396 | */ |
5397 | #define EC_CMD_GET_CROS_BOARD_INFO 0x011F |
5398 | /* |
5399 | * Write info into Cros Board Info on EEPROM. Write fails if the board has |
5400 | * hardware write-protect enabled. |
5401 | */ |
5402 | #define EC_CMD_SET_CROS_BOARD_INFO 0x0120 |
5403 | |
5404 | enum cbi_data_tag { |
5405 | CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */ |
5406 | CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */ |
5407 | CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */ |
5408 | CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ |
5409 | CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ |
5410 | CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ |
5411 | CBI_TAG_COUNT, |
5412 | }; |
5413 | |
5414 | /* |
5415 | * Flags to control read operation |
5416 | * |
5417 | * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify |
5418 | * write was successful without reboot. |
5419 | */ |
5420 | #define CBI_GET_RELOAD BIT(0) |
5421 | |
5422 | struct ec_params_get_cbi { |
5423 | uint32_t tag; /* enum cbi_data_tag */ |
5424 | uint32_t flag; /* CBI_GET_* */ |
5425 | } __ec_align4; |
5426 | |
5427 | /* |
5428 | * Flags to control write behavior. |
5429 | * |
5430 | * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's |
5431 | * useful when writing multiple fields in a row. |
5432 | * INIT: Need to be set when creating a new CBI from scratch. All fields |
5433 | * will be initialized to zero first. |
5434 | */ |
5435 | #define CBI_SET_NO_SYNC BIT(0) |
5436 | #define CBI_SET_INIT BIT(1) |
5437 | |
5438 | struct ec_params_set_cbi { |
5439 | uint32_t tag; /* enum cbi_data_tag */ |
5440 | uint32_t flag; /* CBI_SET_* */ |
5441 | uint32_t size; /* Data size */ |
5442 | uint8_t data[]; /* For string and raw data */ |
5443 | } __ec_align1; |
5444 | |
5445 | /* |
5446 | * Information about resets of the AP by the EC and the EC's own uptime. |
5447 | */ |
5448 | #define EC_CMD_GET_UPTIME_INFO 0x0121 |
5449 | |
5450 | struct ec_response_uptime_info { |
5451 | /* |
5452 | * Number of milliseconds since the last EC boot. Sysjump resets |
5453 | * typically do not restart the EC's time_since_boot epoch. |
5454 | * |
5455 | * WARNING: The EC's sense of time is much less accurate than the AP's |
5456 | * sense of time, in both phase and frequency. This timebase is similar |
5457 | * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error. |
5458 | */ |
5459 | uint32_t time_since_ec_boot_ms; |
5460 | |
5461 | /* |
5462 | * Number of times the AP was reset by the EC since the last EC boot. |
5463 | * Note that the AP may be held in reset by the EC during the initial |
5464 | * boot sequence, such that the very first AP boot may count as more |
5465 | * than one here. |
5466 | */ |
5467 | uint32_t ap_resets_since_ec_boot; |
5468 | |
5469 | /* |
5470 | * The set of flags which describe the EC's most recent reset. See |
5471 | * include/system.h RESET_FLAG_* for details. |
5472 | */ |
5473 | uint32_t ec_reset_flags; |
5474 | |
5475 | /* Empty log entries have both the cause and timestamp set to zero. */ |
5476 | struct ap_reset_log_entry { |
5477 | /* |
5478 | * See include/chipset.h: enum chipset_{reset,shutdown}_reason |
5479 | * for details. |
5480 | */ |
5481 | uint16_t reset_cause; |
5482 | |
5483 | /* Reserved for protocol growth. */ |
5484 | uint16_t reserved; |
5485 | |
5486 | /* |
5487 | * The time of the reset's assertion, in milliseconds since the |
5488 | * last EC boot, in the same epoch as time_since_ec_boot_ms. |
5489 | * Set to zero if the log entry is empty. |
5490 | */ |
5491 | uint32_t reset_time_ms; |
5492 | } recent_ap_reset[4]; |
5493 | } __ec_align4; |
5494 | |
5495 | /* |
5496 | * Add entropy to the device secret (stored in the rollback region). |
5497 | * |
5498 | * Depending on the chip, the operation may take a long time (e.g. to erase |
5499 | * flash), so the commands are asynchronous. |
5500 | */ |
5501 | #define EC_CMD_ADD_ENTROPY 0x0122 |
5502 | |
5503 | enum add_entropy_action { |
5504 | /* Add entropy to the current secret. */ |
5505 | ADD_ENTROPY_ASYNC = 0, |
5506 | /* |
5507 | * Add entropy, and also make sure that the previous secret is erased. |
5508 | * (this can be implemented by adding entropy multiple times until |
5509 | * all rolback blocks have been overwritten). |
5510 | */ |
5511 | ADD_ENTROPY_RESET_ASYNC = 1, |
5512 | /* Read back result from the previous operation. */ |
5513 | ADD_ENTROPY_GET_RESULT = 2, |
5514 | }; |
5515 | |
5516 | struct ec_params_rollback_add_entropy { |
5517 | uint8_t action; |
5518 | } __ec_align1; |
5519 | |
5520 | /* |
5521 | * Perform a single read of a given ADC channel. |
5522 | */ |
5523 | #define EC_CMD_ADC_READ 0x0123 |
5524 | |
5525 | struct ec_params_adc_read { |
5526 | uint8_t adc_channel; |
5527 | } __ec_align1; |
5528 | |
5529 | struct ec_response_adc_read { |
5530 | int32_t adc_value; |
5531 | } __ec_align4; |
5532 | |
5533 | /* |
5534 | * Read back rollback info |
5535 | */ |
5536 | #define EC_CMD_ROLLBACK_INFO 0x0124 |
5537 | |
5538 | struct ec_response_rollback_info { |
5539 | int32_t id; /* Incrementing number to indicate which region to use. */ |
5540 | int32_t rollback_min_version; |
5541 | int32_t rw_rollback_version; |
5542 | } __ec_align4; |
5543 | |
5544 | |
5545 | /* Issue AP reset */ |
5546 | #define EC_CMD_AP_RESET 0x0125 |
5547 | |
5548 | /* |
5549 | * Get the number of peripheral charge ports |
5550 | */ |
5551 | #define EC_CMD_PCHG_COUNT 0x0134 |
5552 | |
5553 | #define EC_PCHG_MAX_PORTS 8 |
5554 | |
5555 | struct ec_response_pchg_count { |
5556 | uint8_t port_count; |
5557 | } __ec_align1; |
5558 | |
5559 | /* |
5560 | * Get the status of a peripheral charge port |
5561 | */ |
5562 | #define EC_CMD_PCHG 0x0135 |
5563 | |
5564 | struct ec_params_pchg { |
5565 | uint8_t port; |
5566 | } __ec_align1; |
5567 | |
5568 | struct ec_response_pchg { |
5569 | uint32_t error; /* enum pchg_error */ |
5570 | uint8_t state; /* enum pchg_state state */ |
5571 | uint8_t battery_percentage; |
5572 | uint8_t unused0; |
5573 | uint8_t unused1; |
5574 | /* Fields added in version 1 */ |
5575 | uint32_t fw_version; |
5576 | uint32_t dropped_event_count; |
5577 | } __ec_align2; |
5578 | |
5579 | enum pchg_state { |
5580 | /* Charger is reset and not initialized. */ |
5581 | PCHG_STATE_RESET = 0, |
5582 | /* Charger is initialized or disabled. */ |
5583 | PCHG_STATE_INITIALIZED, |
5584 | /* Charger is enabled and ready to detect a device. */ |
5585 | PCHG_STATE_ENABLED, |
5586 | /* Device is in proximity. */ |
5587 | PCHG_STATE_DETECTED, |
5588 | /* Device is being charged. */ |
5589 | PCHG_STATE_CHARGING, |
5590 | /* Device is fully charged. It implies DETECTED (& not charging). */ |
5591 | PCHG_STATE_FULL, |
5592 | /* In download (a.k.a. firmware update) mode */ |
5593 | PCHG_STATE_DOWNLOAD, |
5594 | /* In download mode. Ready for receiving data. */ |
5595 | PCHG_STATE_DOWNLOADING, |
5596 | /* Device is ready for data communication. */ |
5597 | PCHG_STATE_CONNECTED, |
5598 | /* Put no more entry below */ |
5599 | PCHG_STATE_COUNT, |
5600 | }; |
5601 | |
5602 | #define EC_PCHG_STATE_TEXT { \ |
5603 | [PCHG_STATE_RESET] = "RESET", \ |
5604 | [PCHG_STATE_INITIALIZED] = "INITIALIZED", \ |
5605 | [PCHG_STATE_ENABLED] = "ENABLED", \ |
5606 | [PCHG_STATE_DETECTED] = "DETECTED", \ |
5607 | [PCHG_STATE_CHARGING] = "CHARGING", \ |
5608 | [PCHG_STATE_FULL] = "FULL", \ |
5609 | [PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \ |
5610 | [PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \ |
5611 | [PCHG_STATE_CONNECTED] = "CONNECTED", \ |
5612 | } |
5613 | |
5614 | /* |
5615 | * Update firmware of peripheral chip |
5616 | */ |
5617 | #define EC_CMD_PCHG_UPDATE 0x0136 |
5618 | |
5619 | /* Port number is encoded in bit[28:31]. */ |
5620 | #define EC_MKBP_PCHG_PORT_SHIFT 28 |
5621 | /* Utility macro for converting MKBP event to port number. */ |
5622 | #define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf) |
5623 | /* Utility macro for extracting event bits. */ |
5624 | #define EC_MKBP_PCHG_EVENT_MASK(e) ((e) \ |
5625 | & GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0)) |
5626 | |
5627 | #define EC_MKBP_PCHG_UPDATE_OPENED BIT(0) |
5628 | #define EC_MKBP_PCHG_WRITE_COMPLETE BIT(1) |
5629 | #define EC_MKBP_PCHG_UPDATE_CLOSED BIT(2) |
5630 | #define EC_MKBP_PCHG_UPDATE_ERROR BIT(3) |
5631 | #define EC_MKBP_PCHG_DEVICE_EVENT BIT(4) |
5632 | |
5633 | enum ec_pchg_update_cmd { |
5634 | /* Reset chip to normal mode. */ |
5635 | EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL = 0, |
5636 | /* Reset and put a chip in update (a.k.a. download) mode. */ |
5637 | EC_PCHG_UPDATE_CMD_OPEN, |
5638 | /* Write a block of data containing FW image. */ |
5639 | EC_PCHG_UPDATE_CMD_WRITE, |
5640 | /* Close update session. */ |
5641 | EC_PCHG_UPDATE_CMD_CLOSE, |
5642 | /* End of commands */ |
5643 | EC_PCHG_UPDATE_CMD_COUNT, |
5644 | }; |
5645 | |
5646 | struct ec_params_pchg_update { |
5647 | /* PCHG port number */ |
5648 | uint8_t port; |
5649 | /* enum ec_pchg_update_cmd */ |
5650 | uint8_t cmd; |
5651 | /* Padding */ |
5652 | uint8_t reserved0; |
5653 | uint8_t reserved1; |
5654 | /* Version of new firmware */ |
5655 | uint32_t version; |
5656 | /* CRC32 of new firmware */ |
5657 | uint32_t crc32; |
5658 | /* Address in chip memory where <data> is written to */ |
5659 | uint32_t addr; |
5660 | /* Size of <data> */ |
5661 | uint32_t size; |
5662 | /* Partial data of new firmware */ |
5663 | uint8_t data[]; |
5664 | } __ec_align4; |
5665 | |
5666 | BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT |
5667 | < BIT(sizeof(((struct ec_params_pchg_update *)0)->cmd)*8)); |
5668 | |
5669 | struct ec_response_pchg_update { |
5670 | /* Block size */ |
5671 | uint32_t block_size; |
5672 | } __ec_align4; |
5673 | |
5674 | |
5675 | /*****************************************************************************/ |
5676 | /* Voltage regulator controls */ |
5677 | |
5678 | /* |
5679 | * Get basic info of voltage regulator for given index. |
5680 | * |
5681 | * Returns the regulator name and supported voltage list in mV. |
5682 | */ |
5683 | #define EC_CMD_REGULATOR_GET_INFO 0x012C |
5684 | |
5685 | /* Maximum length of regulator name */ |
5686 | #define EC_REGULATOR_NAME_MAX_LEN 16 |
5687 | |
5688 | /* Maximum length of the supported voltage list. */ |
5689 | #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16 |
5690 | |
5691 | struct ec_params_regulator_get_info { |
5692 | uint32_t index; |
5693 | } __ec_align4; |
5694 | |
5695 | struct ec_response_regulator_get_info { |
5696 | char name[EC_REGULATOR_NAME_MAX_LEN]; |
5697 | uint16_t num_voltages; |
5698 | uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT]; |
5699 | } __ec_align2; |
5700 | |
5701 | /* |
5702 | * Configure the regulator as enabled / disabled. |
5703 | */ |
5704 | #define EC_CMD_REGULATOR_ENABLE 0x012D |
5705 | |
5706 | struct ec_params_regulator_enable { |
5707 | uint32_t index; |
5708 | uint8_t enable; |
5709 | } __ec_align4; |
5710 | |
5711 | /* |
5712 | * Query if the regulator is enabled. |
5713 | * |
5714 | * Returns 1 if the regulator is enabled, 0 if not. |
5715 | */ |
5716 | #define EC_CMD_REGULATOR_IS_ENABLED 0x012E |
5717 | |
5718 | struct ec_params_regulator_is_enabled { |
5719 | uint32_t index; |
5720 | } __ec_align4; |
5721 | |
5722 | struct ec_response_regulator_is_enabled { |
5723 | uint8_t enabled; |
5724 | } __ec_align1; |
5725 | |
5726 | /* |
5727 | * Set voltage for the voltage regulator within the range specified. |
5728 | * |
5729 | * The driver should select the voltage in range closest to min_mv. |
5730 | * |
5731 | * Also note that this might be called before the regulator is enabled, and the |
5732 | * setting should be in effect after the regulator is enabled. |
5733 | */ |
5734 | #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F |
5735 | |
5736 | struct ec_params_regulator_set_voltage { |
5737 | uint32_t index; |
5738 | uint32_t min_mv; |
5739 | uint32_t max_mv; |
5740 | } __ec_align4; |
5741 | |
5742 | /* |
5743 | * Get the currently configured voltage for the voltage regulator. |
5744 | * |
5745 | * Note that this might be called before the regulator is enabled, and this |
5746 | * should return the configured output voltage if the regulator is enabled. |
5747 | */ |
5748 | #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130 |
5749 | |
5750 | struct ec_params_regulator_get_voltage { |
5751 | uint32_t index; |
5752 | } __ec_align4; |
5753 | |
5754 | struct ec_response_regulator_get_voltage { |
5755 | uint32_t voltage_mv; |
5756 | } __ec_align4; |
5757 | |
5758 | /* |
5759 | * Gather all discovery information for the given port and partner type. |
5760 | * |
5761 | * Note that if discovery has not yet completed, only the currently completed |
5762 | * responses will be filled in. If the discovery data structures are changed |
5763 | * in the process of the command running, BUSY will be returned. |
5764 | * |
5765 | * VDO field sizes are set to the maximum possible number of VDOs a VDM may |
5766 | * contain, while the number of SVIDs here is selected to fit within the PROTO2 |
5767 | * maximum parameter size. |
5768 | */ |
5769 | #define EC_CMD_TYPEC_DISCOVERY 0x0131 |
5770 | |
5771 | enum typec_partner_type { |
5772 | TYPEC_PARTNER_SOP = 0, |
5773 | TYPEC_PARTNER_SOP_PRIME = 1, |
5774 | }; |
5775 | |
5776 | struct ec_params_typec_discovery { |
5777 | uint8_t port; |
5778 | uint8_t partner_type; /* enum typec_partner_type */ |
5779 | } __ec_align1; |
5780 | |
5781 | struct svid_mode_info { |
5782 | uint16_t svid; |
5783 | uint16_t mode_count; /* Number of modes partner sent */ |
5784 | uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ |
5785 | }; |
5786 | |
5787 | struct ec_response_typec_discovery { |
5788 | uint8_t identity_count; /* Number of identity VDOs partner sent */ |
5789 | uint8_t svid_count; /* Number of SVIDs partner sent */ |
5790 | uint16_t reserved; |
5791 | uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ |
5792 | struct svid_mode_info svids[]; |
5793 | } __ec_align1; |
5794 | |
5795 | /* USB Type-C commands for AP-controlled device policy. */ |
5796 | #define EC_CMD_TYPEC_CONTROL 0x0132 |
5797 | |
5798 | enum typec_control_command { |
5799 | TYPEC_CONTROL_COMMAND_EXIT_MODES, |
5800 | TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, |
5801 | TYPEC_CONTROL_COMMAND_ENTER_MODE, |
5802 | TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY, |
5803 | TYPEC_CONTROL_COMMAND_USB_MUX_SET, |
5804 | TYPEC_CONTROL_COMMAND_BIST_SHARE_MODE, |
5805 | TYPEC_CONTROL_COMMAND_SEND_VDM_REQ, |
5806 | }; |
5807 | |
5808 | /* Replies the AP may specify to the TBT EnterMode command as a UFP */ |
5809 | enum typec_tbt_ufp_reply { |
5810 | TYPEC_TBT_UFP_REPLY_NAK, |
5811 | TYPEC_TBT_UFP_REPLY_ACK, |
5812 | }; |
5813 | |
5814 | struct typec_usb_mux_set { |
5815 | uint8_t mux_index; /* Index of the mux to set in the chain */ |
5816 | uint8_t mux_flags; /* USB_PD_MUX_*-encoded USB mux state to set */ |
5817 | } __ec_align1; |
5818 | |
5819 | #define VDO_MAX_SIZE 7 |
5820 | |
5821 | struct typec_vdm_req { |
5822 | /* VDM data, including VDM header */ |
5823 | uint32_t vdm_data[VDO_MAX_SIZE]; |
5824 | /* Number of 32-bit fields filled in */ |
5825 | uint8_t vdm_data_objects; |
5826 | /* Partner to address - see enum typec_partner_type */ |
5827 | uint8_t partner_type; |
5828 | } __ec_align1; |
5829 | |
5830 | struct ec_params_typec_control { |
5831 | uint8_t port; |
5832 | uint8_t command; /* enum typec_control_command */ |
5833 | uint16_t reserved; |
5834 | |
5835 | /* |
5836 | * This section will be interpreted based on |command|. Define a |
5837 | * placeholder structure to avoid having to increase the size and bump |
5838 | * the command version when adding new sub-commands. |
5839 | */ |
5840 | union { |
5841 | uint32_t clear_events_mask; |
5842 | uint8_t mode_to_enter; /* enum typec_mode */ |
5843 | uint8_t tbt_ufp_reply; /* enum typec_tbt_ufp_reply */ |
5844 | struct typec_usb_mux_set mux_params; |
5845 | /* Used for VMD_REQ */ |
5846 | struct typec_vdm_req vdm_req_params; |
5847 | uint8_t placeholder[128]; |
5848 | }; |
5849 | } __ec_align1; |
5850 | |
5851 | /* |
5852 | * Gather all status information for a port. |
5853 | * |
5854 | * Note: this covers many of the return fields from the deprecated |
5855 | * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the |
5856 | * discovery data. The "enum pd_cc_states" is defined with the deprecated |
5857 | * EC_CMD_USB_PD_CONTROL command. |
5858 | * |
5859 | * This also combines in the EC_CMD_USB_PD_MUX_INFO flags. |
5860 | */ |
5861 | #define EC_CMD_TYPEC_STATUS 0x0133 |
5862 | |
5863 | /* |
5864 | * Power role. |
5865 | * |
5866 | * Note this is also used for PD header creation, and values align to those in |
5867 | * the Power Delivery Specification Revision 3.0 (See |
5868 | * 6.2.1.1.4 Port Power Role). |
5869 | */ |
5870 | enum pd_power_role { |
5871 | PD_ROLE_SINK = 0, |
5872 | PD_ROLE_SOURCE = 1 |
5873 | }; |
5874 | |
5875 | /* |
5876 | * Data role. |
5877 | * |
5878 | * Note this is also used for PD header creation, and the first two values |
5879 | * align to those in the Power Delivery Specification Revision 3.0 (See |
5880 | * 6.2.1.1.6 Port Data Role). |
5881 | */ |
5882 | enum pd_data_role { |
5883 | PD_ROLE_UFP = 0, |
5884 | PD_ROLE_DFP = 1, |
5885 | PD_ROLE_DISCONNECTED = 2, |
5886 | }; |
5887 | |
5888 | enum pd_vconn_role { |
5889 | PD_ROLE_VCONN_OFF = 0, |
5890 | PD_ROLE_VCONN_SRC = 1, |
5891 | }; |
5892 | |
5893 | /* |
5894 | * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2, |
5895 | * regardless of whether a debug accessory is connected. |
5896 | */ |
5897 | enum tcpc_cc_polarity { |
5898 | /* |
5899 | * _CCx: is used to indicate the polarity while not connected to |
5900 | * a Debug Accessory. Only one CC line will assert a resistor and |
5901 | * the other will be open. |
5902 | */ |
5903 | POLARITY_CC1 = 0, |
5904 | POLARITY_CC2 = 1, |
5905 | |
5906 | /* |
5907 | * _CCx_DTS is used to indicate the polarity while connected to a |
5908 | * SRC Debug Accessory. Assert resistors on both lines. |
5909 | */ |
5910 | POLARITY_CC1_DTS = 2, |
5911 | POLARITY_CC2_DTS = 3, |
5912 | |
5913 | /* |
5914 | * The current TCPC code relies on these specific POLARITY values. |
5915 | * Adding in a check to verify if the list grows for any reason |
5916 | * that this will give a hint that other places need to be |
5917 | * adjusted. |
5918 | */ |
5919 | POLARITY_COUNT |
5920 | }; |
5921 | |
5922 | #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) |
5923 | #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) |
5924 | #define PD_STATUS_EVENT_HARD_RESET BIT(2) |
5925 | #define PD_STATUS_EVENT_DISCONNECTED BIT(3) |
5926 | #define PD_STATUS_EVENT_MUX_0_SET_DONE BIT(4) |
5927 | #define PD_STATUS_EVENT_MUX_1_SET_DONE BIT(5) |
5928 | #define PD_STATUS_EVENT_VDM_REQ_REPLY BIT(6) |
5929 | #define PD_STATUS_EVENT_VDM_REQ_FAILED BIT(7) |
5930 | #define PD_STATUS_EVENT_VDM_ATTENTION BIT(8) |
5931 | |
5932 | struct ec_params_typec_status { |
5933 | uint8_t port; |
5934 | } __ec_align1; |
5935 | |
5936 | struct ec_response_typec_status { |
5937 | uint8_t pd_enabled; /* PD communication enabled - bool */ |
5938 | uint8_t dev_connected; /* Device connected - bool */ |
5939 | uint8_t sop_connected; /* Device is SOP PD capable - bool */ |
5940 | uint8_t source_cap_count; /* Number of Source Cap PDOs */ |
5941 | |
5942 | uint8_t power_role; /* enum pd_power_role */ |
5943 | uint8_t data_role; /* enum pd_data_role */ |
5944 | uint8_t vconn_role; /* enum pd_vconn_role */ |
5945 | uint8_t sink_cap_count; /* Number of Sink Cap PDOs */ |
5946 | |
5947 | uint8_t polarity; /* enum tcpc_cc_polarity */ |
5948 | uint8_t cc_state; /* enum pd_cc_states */ |
5949 | uint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */ |
5950 | uint8_t mux_state; /* USB_PD_MUX* - encoded mux state */ |
5951 | |
5952 | char tc_state[32]; /* TC state name */ |
5953 | |
5954 | uint32_t events; /* PD_STATUS_EVENT bitmask */ |
5955 | |
5956 | /* |
5957 | * BCD PD revisions for partners |
5958 | * |
5959 | * The format has the PD major reversion in the upper nibble, and PD |
5960 | * minor version in the next nibble. Following two nibbles are |
5961 | * currently 0. |
5962 | * ex. PD 3.2 would map to 0x3200 |
5963 | * |
5964 | * PD major/minor will be 0 if no PD device is connected. |
5965 | */ |
5966 | uint16_t sop_revision; |
5967 | uint16_t sop_prime_revision; |
5968 | |
5969 | uint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */ |
5970 | |
5971 | uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */ |
5972 | } __ec_align1; |
5973 | |
5974 | /* |
5975 | * Gather the response to the most recent VDM REQ from the AP, as well |
5976 | * as popping the oldest VDM:Attention from the DPM queue |
5977 | */ |
5978 | #define EC_CMD_TYPEC_VDM_RESPONSE 0x013C |
5979 | |
5980 | struct ec_params_typec_vdm_response { |
5981 | uint8_t port; |
5982 | } __ec_align1; |
5983 | |
5984 | struct ec_response_typec_vdm_response { |
5985 | /* Number of 32-bit fields filled in */ |
5986 | uint8_t vdm_data_objects; |
5987 | /* Partner to address - see enum typec_partner_type */ |
5988 | uint8_t partner_type; |
5989 | /* enum ec_status describing VDM response */ |
5990 | uint16_t vdm_response_err; |
5991 | /* VDM data, including VDM header */ |
5992 | uint32_t vdm_response[VDO_MAX_SIZE]; |
5993 | /* Number of 32-bit Attention fields filled in */ |
5994 | uint8_t vdm_attention_objects; |
5995 | /* Number of remaining messages to consume */ |
5996 | uint8_t vdm_attention_left; |
5997 | /* Reserved */ |
5998 | uint16_t reserved1; |
5999 | /* VDM:Attention contents */ |
6000 | uint32_t vdm_attention[2]; |
6001 | } __ec_align1; |
6002 | |
6003 | #undef VDO_MAX_SIZE |
6004 | |
6005 | /*****************************************************************************/ |
6006 | /* The command range 0x200-0x2FF is reserved for Rotor. */ |
6007 | |
6008 | /*****************************************************************************/ |
6009 | /* |
6010 | * Reserve a range of host commands for the CR51 firmware. |
6011 | */ |
6012 | #define EC_CMD_CR51_BASE 0x0300 |
6013 | #define EC_CMD_CR51_LAST 0x03FF |
6014 | |
6015 | /*****************************************************************************/ |
6016 | /* Fingerprint MCU commands: range 0x0400-0x040x */ |
6017 | |
6018 | /* Fingerprint SPI sensor passthru command: prototyping ONLY */ |
6019 | #define EC_CMD_FP_PASSTHRU 0x0400 |
6020 | |
6021 | #define EC_FP_FLAG_NOT_COMPLETE 0x1 |
6022 | |
6023 | struct ec_params_fp_passthru { |
6024 | uint16_t len; /* Number of bytes to write then read */ |
6025 | uint16_t flags; /* EC_FP_FLAG_xxx */ |
6026 | uint8_t data[]; /* Data to send */ |
6027 | } __ec_align2; |
6028 | |
6029 | /* Configure the Fingerprint MCU behavior */ |
6030 | #define EC_CMD_FP_MODE 0x0402 |
6031 | |
6032 | /* Put the sensor in its lowest power mode */ |
6033 | #define FP_MODE_DEEPSLEEP BIT(0) |
6034 | /* Wait to see a finger on the sensor */ |
6035 | #define FP_MODE_FINGER_DOWN BIT(1) |
6036 | /* Poll until the finger has left the sensor */ |
6037 | #define FP_MODE_FINGER_UP BIT(2) |
6038 | /* Capture the current finger image */ |
6039 | #define FP_MODE_CAPTURE BIT(3) |
6040 | /* Finger enrollment session on-going */ |
6041 | #define FP_MODE_ENROLL_SESSION BIT(4) |
6042 | /* Enroll the current finger image */ |
6043 | #define FP_MODE_ENROLL_IMAGE BIT(5) |
6044 | /* Try to match the current finger image */ |
6045 | #define FP_MODE_MATCH BIT(6) |
6046 | /* Reset and re-initialize the sensor. */ |
6047 | #define FP_MODE_RESET_SENSOR BIT(7) |
6048 | /* special value: don't change anything just read back current mode */ |
6049 | #define FP_MODE_DONT_CHANGE BIT(31) |
6050 | |
6051 | #define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \ |
6052 | FP_MODE_FINGER_DOWN | \ |
6053 | FP_MODE_FINGER_UP | \ |
6054 | FP_MODE_CAPTURE | \ |
6055 | FP_MODE_ENROLL_SESSION | \ |
6056 | FP_MODE_ENROLL_IMAGE | \ |
6057 | FP_MODE_MATCH | \ |
6058 | FP_MODE_RESET_SENSOR | \ |
6059 | FP_MODE_DONT_CHANGE) |
6060 | |
6061 | /* Capture types defined in bits [30..28] */ |
6062 | #define FP_MODE_CAPTURE_TYPE_SHIFT 28 |
6063 | #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT) |
6064 | /* |
6065 | * This enum must remain ordered, if you add new values you must ensure that |
6066 | * FP_CAPTURE_TYPE_MAX is still the last one. |
6067 | */ |
6068 | enum fp_capture_type { |
6069 | /* Full blown vendor-defined capture (produces 'frame_size' bytes) */ |
6070 | FP_CAPTURE_VENDOR_FORMAT = 0, |
6071 | /* Simple raw image capture (produces width x height x bpp bits) */ |
6072 | FP_CAPTURE_SIMPLE_IMAGE = 1, |
6073 | /* Self test pattern (e.g. checkerboard) */ |
6074 | FP_CAPTURE_PATTERN0 = 2, |
6075 | /* Self test pattern (e.g. inverted checkerboard) */ |
6076 | FP_CAPTURE_PATTERN1 = 3, |
6077 | /* Capture for Quality test with fixed contrast */ |
6078 | FP_CAPTURE_QUALITY_TEST = 4, |
6079 | /* Capture for pixel reset value test */ |
6080 | FP_CAPTURE_RESET_TEST = 5, |
6081 | FP_CAPTURE_TYPE_MAX, |
6082 | }; |
6083 | /* Extracts the capture type from the sensor 'mode' word */ |
6084 | #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \ |
6085 | >> FP_MODE_CAPTURE_TYPE_SHIFT) |
6086 | |
6087 | struct ec_params_fp_mode { |
6088 | uint32_t mode; /* as defined by FP_MODE_ constants */ |
6089 | } __ec_align4; |
6090 | |
6091 | struct ec_response_fp_mode { |
6092 | uint32_t mode; /* as defined by FP_MODE_ constants */ |
6093 | } __ec_align4; |
6094 | |
6095 | /* Retrieve Fingerprint sensor information */ |
6096 | #define EC_CMD_FP_INFO 0x0403 |
6097 | |
6098 | /* Number of dead pixels detected on the last maintenance */ |
6099 | #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF) |
6100 | /* Unknown number of dead pixels detected on the last maintenance */ |
6101 | #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF) |
6102 | /* No interrupt from the sensor */ |
6103 | #define FP_ERROR_NO_IRQ BIT(12) |
6104 | /* SPI communication error */ |
6105 | #define FP_ERROR_SPI_COMM BIT(13) |
6106 | /* Invalid sensor Hardware ID */ |
6107 | #define FP_ERROR_BAD_HWID BIT(14) |
6108 | /* Sensor initialization failed */ |
6109 | #define FP_ERROR_INIT_FAIL BIT(15) |
6110 | |
6111 | struct ec_response_fp_info_v0 { |
6112 | /* Sensor identification */ |
6113 | uint32_t vendor_id; |
6114 | uint32_t product_id; |
6115 | uint32_t model_id; |
6116 | uint32_t version; |
6117 | /* Image frame characteristics */ |
6118 | uint32_t frame_size; |
6119 | uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ |
6120 | uint16_t width; |
6121 | uint16_t height; |
6122 | uint16_t bpp; |
6123 | uint16_t errors; /* see FP_ERROR_ flags above */ |
6124 | } __ec_align4; |
6125 | |
6126 | struct ec_response_fp_info { |
6127 | /* Sensor identification */ |
6128 | uint32_t vendor_id; |
6129 | uint32_t product_id; |
6130 | uint32_t model_id; |
6131 | uint32_t version; |
6132 | /* Image frame characteristics */ |
6133 | uint32_t frame_size; |
6134 | uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ |
6135 | uint16_t width; |
6136 | uint16_t height; |
6137 | uint16_t bpp; |
6138 | uint16_t errors; /* see FP_ERROR_ flags above */ |
6139 | /* Template/finger current information */ |
6140 | uint32_t template_size; /* max template size in bytes */ |
6141 | uint16_t template_max; /* maximum number of fingers/templates */ |
6142 | uint16_t template_valid; /* number of valid fingers/templates */ |
6143 | uint32_t template_dirty; /* bitmap of templates with MCU side changes */ |
6144 | uint32_t template_version; /* version of the template format */ |
6145 | } __ec_align4; |
6146 | |
6147 | /* Get the last captured finger frame or a template content */ |
6148 | #define EC_CMD_FP_FRAME 0x0404 |
6149 | |
6150 | /* constants defining the 'offset' field which also contains the frame index */ |
6151 | #define FP_FRAME_INDEX_SHIFT 28 |
6152 | /* Frame buffer where the captured image is stored */ |
6153 | #define FP_FRAME_INDEX_RAW_IMAGE 0 |
6154 | /* First frame buffer holding a template */ |
6155 | #define FP_FRAME_INDEX_TEMPLATE 1 |
6156 | #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT) |
6157 | #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF |
6158 | |
6159 | /* Version of the format of the encrypted templates. */ |
6160 | #define FP_TEMPLATE_FORMAT_VERSION 3 |
6161 | |
6162 | /* Constants for encryption parameters */ |
6163 | #define FP_CONTEXT_NONCE_BYTES 12 |
6164 | #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) |
6165 | #define FP_CONTEXT_TAG_BYTES 16 |
6166 | #define FP_CONTEXT_SALT_BYTES 16 |
6167 | #define FP_CONTEXT_TPM_BYTES 32 |
6168 | |
6169 | struct ec_fp_template_encryption_metadata { |
6170 | /* |
6171 | * Version of the structure format (N=3). |
6172 | */ |
6173 | uint16_t struct_version; |
6174 | /* Reserved bytes, set to 0. */ |
6175 | uint16_t reserved; |
6176 | /* |
6177 | * The salt is *only* ever used for key derivation. The nonce is unique, |
6178 | * a different one is used for every message. |
6179 | */ |
6180 | uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; |
6181 | uint8_t salt[FP_CONTEXT_SALT_BYTES]; |
6182 | uint8_t tag[FP_CONTEXT_TAG_BYTES]; |
6183 | }; |
6184 | |
6185 | struct ec_params_fp_frame { |
6186 | /* |
6187 | * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE |
6188 | * in the high nibble, and the real offset within the frame in |
6189 | * FP_FRAME_OFFSET_MASK. |
6190 | */ |
6191 | uint32_t offset; |
6192 | uint32_t size; |
6193 | } __ec_align4; |
6194 | |
6195 | /* Load a template into the MCU */ |
6196 | #define EC_CMD_FP_TEMPLATE 0x0405 |
6197 | |
6198 | /* Flag in the 'size' field indicating that the full template has been sent */ |
6199 | #define FP_TEMPLATE_COMMIT 0x80000000 |
6200 | |
6201 | struct ec_params_fp_template { |
6202 | uint32_t offset; |
6203 | uint32_t size; |
6204 | uint8_t data[]; |
6205 | } __ec_align4; |
6206 | |
6207 | /* Clear the current fingerprint user context and set a new one */ |
6208 | #define EC_CMD_FP_CONTEXT 0x0406 |
6209 | |
6210 | struct ec_params_fp_context { |
6211 | uint32_t userid[FP_CONTEXT_USERID_WORDS]; |
6212 | } __ec_align4; |
6213 | |
6214 | #define EC_CMD_FP_STATS 0x0407 |
6215 | |
6216 | #define FPSTATS_CAPTURE_INV BIT(0) |
6217 | #define FPSTATS_MATCHING_INV BIT(1) |
6218 | |
6219 | struct ec_response_fp_stats { |
6220 | uint32_t capture_time_us; |
6221 | uint32_t matching_time_us; |
6222 | uint32_t overall_time_us; |
6223 | struct { |
6224 | uint32_t lo; |
6225 | uint32_t hi; |
6226 | } overall_t0; |
6227 | uint8_t timestamps_invalid; |
6228 | int8_t template_matched; |
6229 | } __ec_align2; |
6230 | |
6231 | #define EC_CMD_FP_SEED 0x0408 |
6232 | struct ec_params_fp_seed { |
6233 | /* |
6234 | * Version of the structure format (N=3). |
6235 | */ |
6236 | uint16_t struct_version; |
6237 | /* Reserved bytes, set to 0. */ |
6238 | uint16_t reserved; |
6239 | /* Seed from the TPM. */ |
6240 | uint8_t seed[FP_CONTEXT_TPM_BYTES]; |
6241 | } __ec_align4; |
6242 | |
6243 | #define EC_CMD_FP_ENC_STATUS 0x0409 |
6244 | |
6245 | /* FP TPM seed has been set or not */ |
6246 | #define FP_ENC_STATUS_SEED_SET BIT(0) |
6247 | |
6248 | struct ec_response_fp_encryption_status { |
6249 | /* Used bits in encryption engine status */ |
6250 | uint32_t valid_flags; |
6251 | /* Encryption engine status */ |
6252 | uint32_t status; |
6253 | } __ec_align4; |
6254 | |
6255 | /*****************************************************************************/ |
6256 | /* Touchpad MCU commands: range 0x0500-0x05FF */ |
6257 | |
6258 | /* Perform touchpad self test */ |
6259 | #define EC_CMD_TP_SELF_TEST 0x0500 |
6260 | |
6261 | /* Get number of frame types, and the size of each type */ |
6262 | #define EC_CMD_TP_FRAME_INFO 0x0501 |
6263 | |
6264 | struct ec_response_tp_frame_info { |
6265 | uint32_t n_frames; |
6266 | uint32_t frame_sizes[]; |
6267 | } __ec_align4; |
6268 | |
6269 | /* Create a snapshot of current frame readings */ |
6270 | #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 |
6271 | |
6272 | /* Read the frame */ |
6273 | #define EC_CMD_TP_FRAME_GET 0x0503 |
6274 | |
6275 | struct ec_params_tp_frame_get { |
6276 | uint32_t frame_index; |
6277 | uint32_t offset; |
6278 | uint32_t size; |
6279 | } __ec_align4; |
6280 | |
6281 | /*****************************************************************************/ |
6282 | /* EC-EC communication commands: range 0x0600-0x06FF */ |
6283 | |
6284 | #define EC_COMM_TEXT_MAX 8 |
6285 | |
6286 | /* |
6287 | * Get battery static information, i.e. information that never changes, or |
6288 | * very infrequently. |
6289 | */ |
6290 | #define EC_CMD_BATTERY_GET_STATIC 0x0600 |
6291 | |
6292 | /** |
6293 | * struct ec_params_battery_static_info - Battery static info parameters |
6294 | * @index: Battery index. |
6295 | */ |
6296 | struct ec_params_battery_static_info { |
6297 | uint8_t index; |
6298 | } __ec_align_size1; |
6299 | |
6300 | /** |
6301 | * struct ec_response_battery_static_info - Battery static info response |
6302 | * @design_capacity: Battery Design Capacity (mAh) |
6303 | * @design_voltage: Battery Design Voltage (mV) |
6304 | * @manufacturer: Battery Manufacturer String |
6305 | * @model: Battery Model Number String |
6306 | * @serial: Battery Serial Number String |
6307 | * @type: Battery Type String |
6308 | * @cycle_count: Battery Cycle Count |
6309 | */ |
6310 | struct ec_response_battery_static_info { |
6311 | uint16_t design_capacity; |
6312 | uint16_t design_voltage; |
6313 | char manufacturer[EC_COMM_TEXT_MAX]; |
6314 | char model[EC_COMM_TEXT_MAX]; |
6315 | char serial[EC_COMM_TEXT_MAX]; |
6316 | char type[EC_COMM_TEXT_MAX]; |
6317 | /* TODO(crbug.com/795991): Consider moving to dynamic structure. */ |
6318 | uint32_t cycle_count; |
6319 | } __ec_align4; |
6320 | |
6321 | /* |
6322 | * Get battery dynamic information, i.e. information that is likely to change |
6323 | * every time it is read. |
6324 | */ |
6325 | #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601 |
6326 | |
6327 | /** |
6328 | * struct ec_params_battery_dynamic_info - Battery dynamic info parameters |
6329 | * @index: Battery index. |
6330 | */ |
6331 | struct ec_params_battery_dynamic_info { |
6332 | uint8_t index; |
6333 | } __ec_align_size1; |
6334 | |
6335 | /** |
6336 | * struct ec_response_battery_dynamic_info - Battery dynamic info response |
6337 | * @actual_voltage: Battery voltage (mV) |
6338 | * @actual_current: Battery current (mA); negative=discharging |
6339 | * @remaining_capacity: Remaining capacity (mAh) |
6340 | * @full_capacity: Capacity (mAh, might change occasionally) |
6341 | * @flags: Flags, see EC_BATT_FLAG_* |
6342 | * @desired_voltage: Charging voltage desired by battery (mV) |
6343 | * @desired_current: Charging current desired by battery (mA) |
6344 | */ |
6345 | struct ec_response_battery_dynamic_info { |
6346 | int16_t actual_voltage; |
6347 | int16_t actual_current; |
6348 | int16_t remaining_capacity; |
6349 | int16_t full_capacity; |
6350 | int16_t flags; |
6351 | int16_t desired_voltage; |
6352 | int16_t desired_current; |
6353 | } __ec_align2; |
6354 | |
6355 | /* |
6356 | * Control charger chip. Used to control charger chip on the slave. |
6357 | */ |
6358 | #define EC_CMD_CHARGER_CONTROL 0x0602 |
6359 | |
6360 | /** |
6361 | * struct ec_params_charger_control - Charger control parameters |
6362 | * @max_current: Charger current (mA). Positive to allow base to draw up to |
6363 | * max_current and (possibly) charge battery, negative to request current |
6364 | * from base (OTG). |
6365 | * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is |
6366 | * >= 0. |
6367 | * @allow_charging: Allow base battery charging (only makes sense if |
6368 | * max_current > 0). |
6369 | */ |
6370 | struct ec_params_charger_control { |
6371 | int16_t max_current; |
6372 | uint16_t otg_voltage; |
6373 | uint8_t allow_charging; |
6374 | } __ec_align_size1; |
6375 | |
6376 | /* Get ACK from the USB-C SS muxes */ |
6377 | #define EC_CMD_USB_PD_MUX_ACK 0x0603 |
6378 | |
6379 | struct ec_params_usb_pd_mux_ack { |
6380 | uint8_t port; /* USB-C port number */ |
6381 | } __ec_align1; |
6382 | |
6383 | /*****************************************************************************/ |
6384 | /* |
6385 | * Reserve a range of host commands for board-specific, experimental, or |
6386 | * special purpose features. These can be (re)used without updating this file. |
6387 | * |
6388 | * CAUTION: Don't go nuts with this. Shipping products should document ALL |
6389 | * their EC commands for easier development, testing, debugging, and support. |
6390 | * |
6391 | * All commands MUST be #defined to be 4-digit UPPER CASE hex values |
6392 | * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. |
6393 | * |
6394 | * In your experimental code, you may want to do something like this: |
6395 | * |
6396 | * #define EC_CMD_MAGIC_FOO 0x0000 |
6397 | * #define EC_CMD_MAGIC_BAR 0x0001 |
6398 | * #define EC_CMD_MAGIC_HEY 0x0002 |
6399 | * |
6400 | * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, |
6401 | * EC_VER_MASK(0); |
6402 | * |
6403 | * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, |
6404 | * EC_VER_MASK(0); |
6405 | * |
6406 | * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, |
6407 | * EC_VER_MASK(0); |
6408 | */ |
6409 | #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 |
6410 | #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF |
6411 | |
6412 | /* |
6413 | * Given the private host command offset, calculate the true private host |
6414 | * command value. |
6415 | */ |
6416 | #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ |
6417 | (EC_CMD_BOARD_SPECIFIC_BASE + (command)) |
6418 | |
6419 | /*****************************************************************************/ |
6420 | /* |
6421 | * Passthru commands |
6422 | * |
6423 | * Some platforms have sub-processors chained to each other. For example. |
6424 | * |
6425 | * AP <--> EC <--> PD MCU |
6426 | * |
6427 | * The top 2 bits of the command number are used to indicate which device the |
6428 | * command is intended for. Device 0 is always the device receiving the |
6429 | * command; other device mapping is board-specific. |
6430 | * |
6431 | * When a device receives a command to be passed to a sub-processor, it passes |
6432 | * it on with the device number set back to 0. This allows the sub-processor |
6433 | * to remain blissfully unaware of whether the command originated on the next |
6434 | * device up the chain, or was passed through from the AP. |
6435 | * |
6436 | * In the above example, if the AP wants to send command 0x0002 to the PD MCU, |
6437 | * AP sends command 0x4002 to the EC |
6438 | * EC sends command 0x0002 to the PD MCU |
6439 | * EC forwards PD MCU response back to the AP |
6440 | */ |
6441 | |
6442 | /* Offset and max command number for sub-device n */ |
6443 | #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) |
6444 | #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) |
6445 | |
6446 | /*****************************************************************************/ |
6447 | /* |
6448 | * Deprecated constants. These constants have been renamed for clarity. The |
6449 | * meaning and size has not changed. Programs that use the old names should |
6450 | * switch to the new names soon, as the old names may not be carried forward |
6451 | * forever. |
6452 | */ |
6453 | #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE |
6454 | #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 |
6455 | #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE |
6456 | |
6457 | |
6458 | |
6459 | #endif /* __CROS_EC_COMMANDS_H */ |
6460 | |