| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * Copyright 2009 Texas Instruments. |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef __ARCH_ARM_DAVINCI_SPI_H |
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| 7 | #define __ARCH_ARM_DAVINCI_SPI_H |
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| 8 | |
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| 9 | #include <linux/platform_data/edma.h> |
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| 10 | |
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| 11 | #define SPI_INTERN_CS 0xFF |
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| 12 | |
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| 13 | enum { |
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| 14 | SPI_VERSION_1, /* For DM355/DM365/DM6467 */ |
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| 15 | SPI_VERSION_2, /* For DA8xx */ |
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| 16 | }; |
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| 17 | |
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| 18 | /** |
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| 19 | * davinci_spi_platform_data - Platform data for SPI master device on DaVinci |
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| 20 | * |
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| 21 | * @version: version of the SPI IP. Different DaVinci devices have slightly |
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| 22 | * varying versions of the same IP. |
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| 23 | * @num_chipselect: number of chipselects supported by this SPI master |
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| 24 | * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt |
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| 25 | * controller withn the SoC. Possible values are 0 and 1. |
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| 26 | * @cshold_bug: set this to true if the SPI controller on your chip requires |
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| 27 | * a write to CSHOLD bit in between transfers (like in DM355). |
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| 28 | * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any |
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| 29 | * device on the bus. |
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| 30 | */ |
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| 31 | struct davinci_spi_platform_data { |
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| 32 | u8 version; |
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| 33 | u8 num_chipselect; |
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| 34 | u8 intr_line; |
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| 35 | u8 prescaler_limit; |
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| 36 | bool cshold_bug; |
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| 37 | enum dma_event_q dma_event_q; |
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| 38 | }; |
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| 39 | |
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| 40 | /** |
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| 41 | * davinci_spi_config - Per-chip-select configuration for SPI slave devices |
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| 42 | * |
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| 43 | * @wdelay: amount of delay between transmissions. Measured in number of |
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| 44 | * SPI module clocks. |
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| 45 | * @odd_parity: polarity of parity flag at the end of transmit data stream. |
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| 46 | * 0 - odd parity, 1 - even parity. |
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| 47 | * @parity_enable: enable transmission of parity at end of each transmit |
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| 48 | * data stream. |
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| 49 | * @io_type: type of IO transfer. Choose between polled, interrupt and DMA. |
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| 50 | * @timer_disable: disable chip-select timers (setup and hold) |
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| 51 | * @c2tdelay: chip-select setup time. Measured in number of SPI module clocks. |
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| 52 | * @t2cdelay: chip-select hold time. Measured in number of SPI module clocks. |
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| 53 | * @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured |
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| 54 | * in number of SPI clocks. |
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| 55 | * @c2edelay: chip-select active to SPI ENAn signal active time. Measured in |
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| 56 | * number of SPI clocks. |
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| 57 | */ |
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| 58 | struct davinci_spi_config { |
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| 59 | u8 wdelay; |
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| 60 | u8 odd_parity; |
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| 61 | u8 parity_enable; |
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| 62 | #define SPI_IO_TYPE_INTR 0 |
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| 63 | #define SPI_IO_TYPE_POLL 1 |
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| 64 | #define SPI_IO_TYPE_DMA 2 |
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| 65 | u8 io_type; |
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| 66 | u8 timer_disable; |
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| 67 | u8 c2tdelay; |
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| 68 | u8 t2cdelay; |
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| 69 | u8 t2edelay; |
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| 70 | u8 c2edelay; |
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| 71 | }; |
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| 72 | |
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| 73 | #endif /* __ARCH_ARM_DAVINCI_SPI_H */ |
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| 74 | |
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