| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * tda1997x - NXP HDMI receiver |
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| 4 | * |
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| 5 | * Copyright 2017 Tim Harvey <tharvey@gateworks.com> |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #ifndef _TDA1997X_ |
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| 10 | #define _TDA1997X_ |
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| 11 | |
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| 12 | /* Platform Data */ |
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| 13 | struct tda1997x_platform_data { |
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| 14 | enum v4l2_mbus_type vidout_bus_type; |
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| 15 | u32 vidout_bus_width; |
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| 16 | u8 vidout_port_cfg[9]; |
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| 17 | /* pin polarity (1=invert) */ |
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| 18 | bool vidout_inv_de; |
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| 19 | bool vidout_inv_hs; |
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| 20 | bool vidout_inv_vs; |
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| 21 | bool vidout_inv_pclk; |
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| 22 | /* clock delays (0=-8, 1=-7 ... 15=+7 pixels) */ |
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| 23 | u8 vidout_delay_hs; |
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| 24 | u8 vidout_delay_vs; |
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| 25 | u8 vidout_delay_de; |
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| 26 | u8 vidout_delay_pclk; |
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| 27 | /* sync selections (controls how sync pins are derived) */ |
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| 28 | u8 vidout_sel_hs; |
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| 29 | u8 vidout_sel_vs; |
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| 30 | u8 vidout_sel_de; |
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| 31 | |
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| 32 | /* Audio Port Output */ |
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| 33 | int audout_format; |
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| 34 | u32 audout_mclk_fs; /* clock multiplier */ |
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| 35 | u32 audout_width; /* 13 or 32 bit */ |
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| 36 | u32 audout_layout; /* layout0=AP0 layout1=AP0,AP1,AP2,AP3 */ |
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| 37 | bool audout_layoutauto; /* audio layout dictated by pkt header */ |
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| 38 | bool audout_invert_clk; /* data valid on rising edge of BCLK */ |
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| 39 | bool audio_auto_mute; /* enable hardware audio auto-mute */ |
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| 40 | }; |
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| 41 | |
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| 42 | #endif |
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| 43 | |
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