1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef PCM1796_H_INCLUDED |
3 | #define PCM1796_H_INCLUDED |
4 | |
5 | /* register 16 */ |
6 | #define PCM1796_ATL_MASK 0xff |
7 | /* register 17 */ |
8 | #define PCM1796_ATR_MASK 0xff |
9 | /* register 18 */ |
10 | #define PCM1796_MUTE 0x01 |
11 | #define PCM1796_DME 0x02 |
12 | #define PCM1796_DMF_MASK 0x0c |
13 | #define PCM1796_DMF_48 0x04 |
14 | #define PCM1796_DMF_441 0x08 |
15 | #define PCM1796_DMF_32 0x0c |
16 | #define PCM1796_FMT_MASK 0x70 |
17 | #define PCM1796_FMT_16_RJUST 0x00 |
18 | #define PCM1796_FMT_20_RJUST 0x10 |
19 | #define PCM1796_FMT_24_RJUST 0x20 |
20 | #define PCM1796_FMT_24_LJUST 0x30 |
21 | #define PCM1796_FMT_16_I2S 0x40 |
22 | #define PCM1796_FMT_24_I2S 0x50 |
23 | #define PCM1796_ATLD 0x80 |
24 | /* register 19 */ |
25 | #define PCM1796_INZD 0x01 |
26 | #define PCM1796_FLT_MASK 0x02 |
27 | #define PCM1796_FLT_SHARP 0x00 |
28 | #define PCM1796_FLT_SLOW 0x02 |
29 | #define PCM1796_DFMS 0x04 |
30 | #define PCM1796_OPE 0x10 |
31 | #define PCM1796_ATS_MASK 0x60 |
32 | #define PCM1796_ATS_1 0x00 |
33 | #define PCM1796_ATS_2 0x20 |
34 | #define PCM1796_ATS_4 0x40 |
35 | #define PCM1796_ATS_8 0x60 |
36 | #define PCM1796_REV 0x80 |
37 | /* register 20 */ |
38 | #define PCM1796_OS_MASK 0x03 |
39 | #define PCM1796_OS_64 0x00 |
40 | #define PCM1796_OS_32 0x01 |
41 | #define PCM1796_OS_128 0x02 |
42 | #define PCM1796_CHSL_MASK 0x04 |
43 | #define PCM1796_CHSL_LEFT 0x00 |
44 | #define PCM1796_CHSL_RIGHT 0x04 |
45 | #define PCM1796_MONO 0x08 |
46 | #define PCM1796_DFTH 0x10 |
47 | #define PCM1796_DSD 0x20 |
48 | #define PCM1796_SRST 0x40 |
49 | /* register 21 */ |
50 | #define PCM1796_PCMZ 0x01 |
51 | #define PCM1796_DZ_MASK 0x06 |
52 | /* register 22 */ |
53 | #define PCM1796_ZFGL 0x01 |
54 | #define PCM1796_ZFGR 0x02 |
55 | /* register 23 */ |
56 | #define PCM1796_ID_MASK 0x1f |
57 | |
58 | #endif |
59 | |