1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | #ifndef WM8776_H_INCLUDED |
3 | #define WM8776_H_INCLUDED |
4 | |
5 | /* |
6 | * the following register names are from: |
7 | * wm8776.h -- WM8776 ASoC driver |
8 | * |
9 | * Copyright 2009 Wolfson Microelectronics plc |
10 | * |
11 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> |
12 | */ |
13 | |
14 | #define WM8776_HPLVOL 0x00 |
15 | #define WM8776_HPRVOL 0x01 |
16 | #define WM8776_HPMASTER 0x02 |
17 | #define WM8776_DACLVOL 0x03 |
18 | #define WM8776_DACRVOL 0x04 |
19 | #define WM8776_DACMASTER 0x05 |
20 | #define WM8776_PHASESWAP 0x06 |
21 | #define WM8776_DACCTRL1 0x07 |
22 | #define WM8776_DACMUTE 0x08 |
23 | #define WM8776_DACCTRL2 0x09 |
24 | #define WM8776_DACIFCTRL 0x0a |
25 | #define WM8776_ADCIFCTRL 0x0b |
26 | #define WM8776_MSTRCTRL 0x0c |
27 | #define WM8776_PWRDOWN 0x0d |
28 | #define WM8776_ADCLVOL 0x0e |
29 | #define WM8776_ADCRVOL 0x0f |
30 | #define WM8776_ALCCTRL1 0x10 |
31 | #define WM8776_ALCCTRL2 0x11 |
32 | #define WM8776_ALCCTRL3 0x12 |
33 | #define WM8776_NOISEGATE 0x13 |
34 | #define WM8776_LIMITER 0x14 |
35 | #define WM8776_ADCMUX 0x15 |
36 | #define WM8776_OUTMUX 0x16 |
37 | #define WM8776_RESET 0x17 |
38 | |
39 | |
40 | /* HPLVOL/HPRVOL/HPMASTER */ |
41 | #define WM8776_HPATT_MASK 0x07f |
42 | #define WM8776_HPZCEN 0x080 |
43 | #define WM8776_UPDATE 0x100 |
44 | |
45 | /* DACLVOL/DACRVOL/DACMASTER */ |
46 | #define WM8776_DATT_MASK 0x0ff |
47 | /*#define WM8776_UPDATE 0x100*/ |
48 | |
49 | /* PHASESWAP */ |
50 | #define WM8776_PH_MASK 0x003 |
51 | |
52 | /* DACCTRL1 */ |
53 | #define WM8776_DZCEN 0x001 |
54 | #define WM8776_ATC 0x002 |
55 | #define WM8776_IZD 0x004 |
56 | #define WM8776_TOD 0x008 |
57 | #define WM8776_PL_LEFT_MASK 0x030 |
58 | #define WM8776_PL_LEFT_MUTE 0x000 |
59 | #define WM8776_PL_LEFT_LEFT 0x010 |
60 | #define WM8776_PL_LEFT_RIGHT 0x020 |
61 | #define WM8776_PL_LEFT_LRMIX 0x030 |
62 | #define WM8776_PL_RIGHT_MASK 0x0c0 |
63 | #define WM8776_PL_RIGHT_MUTE 0x000 |
64 | #define WM8776_PL_RIGHT_LEFT 0x040 |
65 | #define WM8776_PL_RIGHT_RIGHT 0x080 |
66 | #define WM8776_PL_RIGHT_LRMIX 0x0c0 |
67 | |
68 | /* DACMUTE */ |
69 | #define WM8776_DMUTE 0x001 |
70 | |
71 | /* DACCTRL2 */ |
72 | #define WM8776_DEEMPH 0x001 |
73 | #define WM8776_DZFM_MASK 0x006 |
74 | #define WM8776_DZFM_NONE 0x000 |
75 | #define WM8776_DZFM_LR 0x002 |
76 | #define WM8776_DZFM_BOTH 0x004 |
77 | #define WM8776_DZFM_EITHER 0x006 |
78 | |
79 | /* DACIFCTRL */ |
80 | #define WM8776_DACFMT_MASK 0x003 |
81 | #define WM8776_DACFMT_RJUST 0x000 |
82 | #define WM8776_DACFMT_LJUST 0x001 |
83 | #define WM8776_DACFMT_I2S 0x002 |
84 | #define WM8776_DACFMT_DSP 0x003 |
85 | #define WM8776_DACLRP 0x004 |
86 | #define WM8776_DACBCP 0x008 |
87 | #define WM8776_DACWL_MASK 0x030 |
88 | #define WM8776_DACWL_16 0x000 |
89 | #define WM8776_DACWL_20 0x010 |
90 | #define WM8776_DACWL_24 0x020 |
91 | #define WM8776_DACWL_32 0x030 |
92 | |
93 | /* ADCIFCTRL */ |
94 | #define WM8776_ADCFMT_MASK 0x003 |
95 | #define WM8776_ADCFMT_RJUST 0x000 |
96 | #define WM8776_ADCFMT_LJUST 0x001 |
97 | #define WM8776_ADCFMT_I2S 0x002 |
98 | #define WM8776_ADCFMT_DSP 0x003 |
99 | #define WM8776_ADCLRP 0x004 |
100 | #define WM8776_ADCBCP 0x008 |
101 | #define WM8776_ADCWL_MASK 0x030 |
102 | #define WM8776_ADCWL_16 0x000 |
103 | #define WM8776_ADCWL_20 0x010 |
104 | #define WM8776_ADCWL_24 0x020 |
105 | #define WM8776_ADCWL_32 0x030 |
106 | #define WM8776_ADCMCLK 0x040 |
107 | #define WM8776_ADCHPD 0x100 |
108 | |
109 | /* MSTRCTRL */ |
110 | #define WM8776_ADCRATE_MASK 0x007 |
111 | #define WM8776_ADCRATE_256 0x002 |
112 | #define WM8776_ADCRATE_384 0x003 |
113 | #define WM8776_ADCRATE_512 0x004 |
114 | #define WM8776_ADCRATE_768 0x005 |
115 | #define WM8776_ADCOSR 0x008 |
116 | #define WM8776_DACRATE_MASK 0x070 |
117 | #define WM8776_DACRATE_128 0x000 |
118 | #define WM8776_DACRATE_192 0x010 |
119 | #define WM8776_DACRATE_256 0x020 |
120 | #define WM8776_DACRATE_384 0x030 |
121 | #define WM8776_DACRATE_512 0x040 |
122 | #define WM8776_DACRATE_768 0x050 |
123 | #define WM8776_DACMS 0x080 |
124 | #define WM8776_ADCMS 0x100 |
125 | |
126 | /* PWRDOWN */ |
127 | #define WM8776_PDWN 0x001 |
128 | #define WM8776_ADCPD 0x002 |
129 | #define WM8776_DACPD 0x004 |
130 | #define WM8776_HPPD 0x008 |
131 | #define WM8776_AINPD 0x040 |
132 | |
133 | /* ADCLVOL/ADCRVOL */ |
134 | #define WM8776_AGMASK 0x0ff |
135 | #define WM8776_ZCA 0x100 |
136 | |
137 | /* ALCCTRL1 */ |
138 | #define WM8776_LCT_MASK 0x00f |
139 | #define WM8776_MAXGAIN_MASK 0x070 |
140 | #define WM8776_LCSEL_MASK 0x180 |
141 | #define WM8776_LCSEL_LIMITER 0x000 |
142 | #define WM8776_LCSEL_ALC_RIGHT 0x080 |
143 | #define WM8776_LCSEL_ALC_LEFT 0x100 |
144 | #define WM8776_LCSEL_ALC_STEREO 0x180 |
145 | |
146 | /* ALCCTRL2 */ |
147 | #define WM8776_HLD_MASK 0x00f |
148 | #define WM8776_ALCZC 0x080 |
149 | #define WM8776_LCEN 0x100 |
150 | |
151 | /* ALCCTRL3 */ |
152 | #define WM8776_ATK_MASK 0x00f |
153 | #define WM8776_DCY_MASK 0x0f0 |
154 | |
155 | /* NOISEGATE */ |
156 | #define WM8776_NGAT 0x001 |
157 | #define WM8776_NGTH_MASK 0x01c |
158 | |
159 | /* LIMITER */ |
160 | #define WM8776_MAXATTEN_MASK 0x00f |
161 | #define WM8776_TRANWIN_MASK 0x070 |
162 | |
163 | /* ADCMUX */ |
164 | #define WM8776_AMX_MASK 0x01f |
165 | #define WM8776_MUTERA 0x040 |
166 | #define WM8776_MUTELA 0x080 |
167 | #define WM8776_LRBOTH 0x100 |
168 | |
169 | /* OUTMUX */ |
170 | #define WM8776_MX_DAC 0x001 |
171 | #define WM8776_MX_AUX 0x002 |
172 | #define WM8776_MX_BYPASS 0x004 |
173 | |
174 | #endif |
175 | |