1 | /* |
2 | * CS4270 ALSA SoC (ASoC) codec driver |
3 | * |
4 | * Author: Timur Tabi <timur@freescale.com> |
5 | * |
6 | * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed |
7 | * under the terms of the GNU General Public License version 2. This |
8 | * program is licensed "as is" without any warranty of any kind, whether |
9 | * express or implied. |
10 | * |
11 | * This is an ASoC device driver for the Cirrus Logic CS4270 codec. |
12 | * |
13 | * Current features/limitations: |
14 | * |
15 | * - Software mode is supported. Stand-alone mode is not supported. |
16 | * - Only I2C is supported, not SPI |
17 | * - Support for master and slave mode |
18 | * - The machine driver's 'startup' function must call |
19 | * cs4270_set_dai_sysclk() with the value of MCLK. |
20 | * - Only I2S and left-justified modes are supported |
21 | * - Power management is supported |
22 | */ |
23 | |
24 | #include <linux/mod_devicetable.h> |
25 | #include <linux/module.h> |
26 | #include <linux/slab.h> |
27 | #include <sound/core.h> |
28 | #include <sound/soc.h> |
29 | #include <sound/initval.h> |
30 | #include <linux/i2c.h> |
31 | #include <linux/delay.h> |
32 | #include <linux/regulator/consumer.h> |
33 | #include <linux/gpio/consumer.h> |
34 | |
35 | #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \ |
36 | SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE | \ |
37 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE) |
38 | |
39 | /* CS4270 registers addresses */ |
40 | #define CS4270_CHIPID 0x01 /* Chip ID */ |
41 | #define CS4270_PWRCTL 0x02 /* Power Control */ |
42 | #define CS4270_MODE 0x03 /* Mode Control */ |
43 | #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */ |
44 | #define CS4270_TRANS 0x05 /* Transition Control */ |
45 | #define CS4270_MUTE 0x06 /* Mute Control */ |
46 | #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */ |
47 | #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */ |
48 | |
49 | #define CS4270_FIRSTREG 0x01 |
50 | #define CS4270_LASTREG 0x08 |
51 | #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1) |
52 | #define CS4270_I2C_INCR 0x80 |
53 | |
54 | /* Bit masks for the CS4270 registers */ |
55 | #define CS4270_CHIPID_ID 0xF0 |
56 | #define CS4270_CHIPID_REV 0x0F |
57 | #define CS4270_PWRCTL_FREEZE 0x80 |
58 | #define CS4270_PWRCTL_PDN_ADC 0x20 |
59 | #define CS4270_PWRCTL_PDN_DAC 0x02 |
60 | #define CS4270_PWRCTL_PDN 0x01 |
61 | #define CS4270_PWRCTL_PDN_ALL \ |
62 | (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN) |
63 | #define CS4270_MODE_SPEED_MASK 0x30 |
64 | #define CS4270_MODE_1X 0x00 |
65 | #define CS4270_MODE_2X 0x10 |
66 | #define CS4270_MODE_4X 0x20 |
67 | #define CS4270_MODE_SLAVE 0x30 |
68 | #define CS4270_MODE_DIV_MASK 0x0E |
69 | #define CS4270_MODE_DIV1 0x00 |
70 | #define CS4270_MODE_DIV15 0x02 |
71 | #define CS4270_MODE_DIV2 0x04 |
72 | #define CS4270_MODE_DIV3 0x06 |
73 | #define CS4270_MODE_DIV4 0x08 |
74 | #define CS4270_MODE_POPGUARD 0x01 |
75 | #define CS4270_FORMAT_FREEZE_A 0x80 |
76 | #define CS4270_FORMAT_FREEZE_B 0x40 |
77 | #define CS4270_FORMAT_LOOPBACK 0x20 |
78 | #define CS4270_FORMAT_DAC_MASK 0x18 |
79 | #define CS4270_FORMAT_DAC_LJ 0x00 |
80 | #define CS4270_FORMAT_DAC_I2S 0x08 |
81 | #define CS4270_FORMAT_DAC_RJ16 0x18 |
82 | #define CS4270_FORMAT_DAC_RJ24 0x10 |
83 | #define CS4270_FORMAT_ADC_MASK 0x01 |
84 | #define CS4270_FORMAT_ADC_LJ 0x00 |
85 | #define CS4270_FORMAT_ADC_I2S 0x01 |
86 | #define CS4270_TRANS_ONE_VOL 0x80 |
87 | #define CS4270_TRANS_SOFT 0x40 |
88 | #define CS4270_TRANS_ZERO 0x20 |
89 | #define CS4270_TRANS_INV_ADC_A 0x08 |
90 | #define CS4270_TRANS_INV_ADC_B 0x10 |
91 | #define CS4270_TRANS_INV_DAC_A 0x02 |
92 | #define CS4270_TRANS_INV_DAC_B 0x04 |
93 | #define CS4270_TRANS_DEEMPH 0x01 |
94 | #define CS4270_MUTE_AUTO 0x20 |
95 | #define CS4270_MUTE_ADC_A 0x08 |
96 | #define CS4270_MUTE_ADC_B 0x10 |
97 | #define CS4270_MUTE_POLARITY 0x04 |
98 | #define CS4270_MUTE_DAC_A 0x01 |
99 | #define CS4270_MUTE_DAC_B 0x02 |
100 | |
101 | /* Power-on default values for the registers |
102 | * |
103 | * This array contains the power-on default values of the registers, with the |
104 | * exception of the "CHIPID" register (01h). The lower four bits of that |
105 | * register contain the hardware revision, so it is treated as volatile. |
106 | */ |
107 | static const struct reg_default cs4270_reg_defaults[] = { |
108 | { 2, 0x00 }, |
109 | { 3, 0x30 }, |
110 | { 4, 0x00 }, |
111 | { 5, 0x60 }, |
112 | { 6, 0x20 }, |
113 | { 7, 0x00 }, |
114 | { 8, 0x00 }, |
115 | }; |
116 | |
117 | static const char *supply_names[] = { |
118 | "va" , "vd" , "vlc" |
119 | }; |
120 | |
121 | /* Private data for the CS4270 */ |
122 | struct cs4270_private { |
123 | struct regmap *regmap; |
124 | unsigned int mclk; /* Input frequency of the MCLK pin */ |
125 | unsigned int mode; /* The mode (I2S or left-justified) */ |
126 | unsigned int slave_mode; |
127 | unsigned int manual_mute; |
128 | |
129 | /* power domain regulators */ |
130 | struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)]; |
131 | |
132 | /* reset gpio */ |
133 | struct gpio_desc *reset_gpio; |
134 | }; |
135 | |
136 | static const struct snd_soc_dapm_widget cs4270_dapm_widgets[] = { |
137 | SND_SOC_DAPM_INPUT("AINL" ), |
138 | SND_SOC_DAPM_INPUT("AINR" ), |
139 | |
140 | SND_SOC_DAPM_OUTPUT("AOUTL" ), |
141 | SND_SOC_DAPM_OUTPUT("AOUTR" ), |
142 | }; |
143 | |
144 | static const struct snd_soc_dapm_route cs4270_dapm_routes[] = { |
145 | { "Capture" , NULL, "AINL" }, |
146 | { "Capture" , NULL, "AINR" }, |
147 | |
148 | { "AOUTL" , NULL, "Playback" }, |
149 | { "AOUTR" , NULL, "Playback" }, |
150 | }; |
151 | |
152 | /** |
153 | * struct cs4270_mode_ratios - clock ratio tables |
154 | * @ratio: the ratio of MCLK to the sample rate |
155 | * @speed_mode: the Speed Mode bits to set in the Mode Control register for |
156 | * this ratio |
157 | * @mclk: the Ratio Select bits to set in the Mode Control register for this |
158 | * ratio |
159 | * |
160 | * The data for this chart is taken from Table 5 of the CS4270 reference |
161 | * manual. |
162 | * |
163 | * This table is used to determine how to program the Mode Control register. |
164 | * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling |
165 | * rates the CS4270 currently supports. |
166 | * |
167 | * @speed_mode is the corresponding bit pattern to be written to the |
168 | * MODE bits of the Mode Control Register |
169 | * |
170 | * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of |
171 | * the Mode Control Register. |
172 | * |
173 | * In situations where a single ratio is represented by multiple speed |
174 | * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick |
175 | * double-speed instead of quad-speed. However, the CS4270 errata states |
176 | * that divide-By-1.5 can cause failures, so we avoid that mode where |
177 | * possible. |
178 | * |
179 | * Errata: There is an errata for the CS4270 where divide-by-1.5 does not |
180 | * work if Vd is 3.3V. If this effects you, select the |
181 | * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will |
182 | * never select any sample rates that require divide-by-1.5. |
183 | */ |
184 | struct cs4270_mode_ratios { |
185 | unsigned int ratio; |
186 | u8 speed_mode; |
187 | u8 mclk; |
188 | }; |
189 | |
190 | static struct cs4270_mode_ratios cs4270_mode_ratios[] = { |
191 | {64, CS4270_MODE_4X, CS4270_MODE_DIV1}, |
192 | #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA |
193 | {96, CS4270_MODE_4X, CS4270_MODE_DIV15}, |
194 | #endif |
195 | {128, CS4270_MODE_2X, CS4270_MODE_DIV1}, |
196 | {192, CS4270_MODE_4X, CS4270_MODE_DIV3}, |
197 | {256, CS4270_MODE_1X, CS4270_MODE_DIV1}, |
198 | {384, CS4270_MODE_2X, CS4270_MODE_DIV3}, |
199 | {512, CS4270_MODE_1X, CS4270_MODE_DIV2}, |
200 | {768, CS4270_MODE_1X, CS4270_MODE_DIV3}, |
201 | {1024, CS4270_MODE_1X, CS4270_MODE_DIV4} |
202 | }; |
203 | |
204 | /* The number of MCLK/LRCK ratios supported by the CS4270 */ |
205 | #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios) |
206 | |
207 | static bool cs4270_reg_is_readable(struct device *dev, unsigned int reg) |
208 | { |
209 | return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG); |
210 | } |
211 | |
212 | static bool cs4270_reg_is_volatile(struct device *dev, unsigned int reg) |
213 | { |
214 | /* Unreadable registers are considered volatile */ |
215 | if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) |
216 | return true; |
217 | |
218 | return reg == CS4270_CHIPID; |
219 | } |
220 | |
221 | /** |
222 | * cs4270_set_dai_sysclk - determine the CS4270 samples rates. |
223 | * @codec_dai: the codec DAI |
224 | * @clk_id: the clock ID (ignored) |
225 | * @freq: the MCLK input frequency |
226 | * @dir: the clock direction (ignored) |
227 | * |
228 | * This function is used to tell the codec driver what the input MCLK |
229 | * frequency is. |
230 | * |
231 | * The value of MCLK is used to determine which sample rates are supported |
232 | * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine |
233 | * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024. |
234 | * |
235 | * This function calculates the nine ratios and determines which ones match |
236 | * a standard sample rate. If there's a match, then it is added to the list |
237 | * of supported sample rates. |
238 | * |
239 | * This function must be called by the machine driver's 'startup' function, |
240 | * otherwise the list of supported sample rates will not be available in |
241 | * time for ALSA. |
242 | * |
243 | * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause |
244 | * theoretically possible sample rates to be enabled. Call it again with a |
245 | * proper value set one the external clock is set (most probably you would do |
246 | * that from a machine's driver 'hw_param' hook. |
247 | */ |
248 | static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai, |
249 | int clk_id, unsigned int freq, int dir) |
250 | { |
251 | struct snd_soc_component *component = codec_dai->component; |
252 | struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(c: component); |
253 | |
254 | cs4270->mclk = freq; |
255 | return 0; |
256 | } |
257 | |
258 | /** |
259 | * cs4270_set_dai_fmt - configure the codec for the selected audio format |
260 | * @codec_dai: the codec DAI |
261 | * @format: a SND_SOC_DAIFMT_x value indicating the data format |
262 | * |
263 | * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the |
264 | * codec accordingly. |
265 | * |
266 | * Currently, this function only supports SND_SOC_DAIFMT_I2S and |
267 | * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified |
268 | * data for playback only, but ASoC currently does not support different |
269 | * formats for playback vs. record. |
270 | */ |
271 | static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai, |
272 | unsigned int format) |
273 | { |
274 | struct snd_soc_component *component = codec_dai->component; |
275 | struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(c: component); |
276 | |
277 | /* set DAI format */ |
278 | switch (format & SND_SOC_DAIFMT_FORMAT_MASK) { |
279 | case SND_SOC_DAIFMT_I2S: |
280 | case SND_SOC_DAIFMT_LEFT_J: |
281 | cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK; |
282 | break; |
283 | default: |
284 | dev_err(component->dev, "invalid dai format\n" ); |
285 | return -EINVAL; |
286 | } |
287 | |
288 | /* set master/slave audio interface */ |
289 | switch (format & SND_SOC_DAIFMT_MASTER_MASK) { |
290 | case SND_SOC_DAIFMT_CBS_CFS: |
291 | cs4270->slave_mode = 1; |
292 | break; |
293 | case SND_SOC_DAIFMT_CBM_CFM: |
294 | cs4270->slave_mode = 0; |
295 | break; |
296 | default: |
297 | /* all other modes are unsupported by the hardware */ |
298 | dev_err(component->dev, "Unknown master/slave configuration\n" ); |
299 | return -EINVAL; |
300 | } |
301 | |
302 | return 0; |
303 | } |
304 | |
305 | /** |
306 | * cs4270_hw_params - program the CS4270 with the given hardware parameters. |
307 | * @substream: the audio stream |
308 | * @params: the hardware parameters to set |
309 | * @dai: the SOC DAI (ignored) |
310 | * |
311 | * This function programs the hardware with the values provided. |
312 | * Specifically, the sample rate and the data format. |
313 | * |
314 | * The .ops functions are used to provide board-specific data, like input |
315 | * frequencies, to this driver. This function takes that information, |
316 | * combines it with the hardware parameters provided, and programs the |
317 | * hardware accordingly. |
318 | */ |
319 | static int cs4270_hw_params(struct snd_pcm_substream *substream, |
320 | struct snd_pcm_hw_params *params, |
321 | struct snd_soc_dai *dai) |
322 | { |
323 | struct snd_soc_component *component = dai->component; |
324 | struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(c: component); |
325 | int ret; |
326 | unsigned int i; |
327 | unsigned int rate; |
328 | unsigned int ratio; |
329 | int reg; |
330 | |
331 | /* Figure out which MCLK/LRCK ratio to use */ |
332 | |
333 | rate = params_rate(p: params); /* Sampling rate, in Hz */ |
334 | ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */ |
335 | |
336 | for (i = 0; i < NUM_MCLK_RATIOS; i++) { |
337 | if (cs4270_mode_ratios[i].ratio == ratio) |
338 | break; |
339 | } |
340 | |
341 | if (i == NUM_MCLK_RATIOS) { |
342 | /* We did not find a matching ratio */ |
343 | dev_err(component->dev, "could not find matching ratio\n" ); |
344 | return -EINVAL; |
345 | } |
346 | |
347 | /* Set the sample rate */ |
348 | |
349 | reg = snd_soc_component_read(component, CS4270_MODE); |
350 | reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK); |
351 | reg |= cs4270_mode_ratios[i].mclk; |
352 | |
353 | if (cs4270->slave_mode) |
354 | reg |= CS4270_MODE_SLAVE; |
355 | else |
356 | reg |= cs4270_mode_ratios[i].speed_mode; |
357 | |
358 | ret = snd_soc_component_write(component, CS4270_MODE, val: reg); |
359 | if (ret < 0) { |
360 | dev_err(component->dev, "i2c write failed\n" ); |
361 | return ret; |
362 | } |
363 | |
364 | /* Set the DAI format */ |
365 | |
366 | reg = snd_soc_component_read(component, CS4270_FORMAT); |
367 | reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK); |
368 | |
369 | switch (cs4270->mode) { |
370 | case SND_SOC_DAIFMT_I2S: |
371 | reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S; |
372 | break; |
373 | case SND_SOC_DAIFMT_LEFT_J: |
374 | reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ; |
375 | break; |
376 | default: |
377 | dev_err(component->dev, "unknown dai format\n" ); |
378 | return -EINVAL; |
379 | } |
380 | |
381 | ret = snd_soc_component_write(component, CS4270_FORMAT, val: reg); |
382 | if (ret < 0) { |
383 | dev_err(component->dev, "i2c write failed\n" ); |
384 | return ret; |
385 | } |
386 | |
387 | return ret; |
388 | } |
389 | |
390 | /** |
391 | * cs4270_dai_mute - enable/disable the CS4270 external mute |
392 | * @dai: the SOC DAI |
393 | * @mute: 0 = disable mute, 1 = enable mute |
394 | * @direction: (ignored) |
395 | * |
396 | * This function toggles the mute bits in the MUTE register. The CS4270's |
397 | * mute capability is intended for external muting circuitry, so if the |
398 | * board does not have the MUTEA or MUTEB pins connected to such circuitry, |
399 | * then this function will do nothing. |
400 | */ |
401 | static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute, int direction) |
402 | { |
403 | struct snd_soc_component *component = dai->component; |
404 | struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(c: component); |
405 | int reg6; |
406 | |
407 | reg6 = snd_soc_component_read(component, CS4270_MUTE); |
408 | |
409 | if (mute) |
410 | reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B; |
411 | else { |
412 | reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B); |
413 | reg6 |= cs4270->manual_mute; |
414 | } |
415 | |
416 | return snd_soc_component_write(component, CS4270_MUTE, val: reg6); |
417 | } |
418 | |
419 | /** |
420 | * cs4270_soc_put_mute - put callback for the 'Master Playback switch' |
421 | * alsa control. |
422 | * @kcontrol: mixer control |
423 | * @ucontrol: control element information |
424 | * |
425 | * This function basically passes the arguments on to the generic |
426 | * snd_soc_put_volsw() function and saves the mute information in |
427 | * our private data structure. This is because we want to prevent |
428 | * cs4270_dai_mute() neglecting the user's decision to manually |
429 | * mute the codec's output. |
430 | * |
431 | * Returns 0 for success. |
432 | */ |
433 | static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol, |
434 | struct snd_ctl_elem_value *ucontrol) |
435 | { |
436 | struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); |
437 | struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(c: component); |
438 | int left = !ucontrol->value.integer.value[0]; |
439 | int right = !ucontrol->value.integer.value[1]; |
440 | |
441 | cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) | |
442 | (right ? CS4270_MUTE_DAC_B : 0); |
443 | |
444 | return snd_soc_put_volsw(kcontrol, ucontrol); |
445 | } |
446 | |
447 | /* A list of non-DAPM controls that the CS4270 supports */ |
448 | static const struct snd_kcontrol_new cs4270_snd_controls[] = { |
449 | SOC_DOUBLE_R("Master Playback Volume" , |
450 | CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1), |
451 | SOC_SINGLE("Digital Sidetone Switch" , CS4270_FORMAT, 5, 1, 0), |
452 | SOC_SINGLE("Soft Ramp Switch" , CS4270_TRANS, 6, 1, 0), |
453 | SOC_SINGLE("Zero Cross Switch" , CS4270_TRANS, 5, 1, 0), |
454 | SOC_SINGLE("De-emphasis filter" , CS4270_TRANS, 0, 1, 0), |
455 | SOC_SINGLE("Popguard Switch" , CS4270_MODE, 0, 1, 1), |
456 | SOC_SINGLE("Auto-Mute Switch" , CS4270_MUTE, 5, 1, 0), |
457 | SOC_DOUBLE("Master Capture Switch" , CS4270_MUTE, 3, 4, 1, 1), |
458 | SOC_DOUBLE_EXT("Master Playback Switch" , CS4270_MUTE, 0, 1, 1, 1, |
459 | snd_soc_get_volsw, cs4270_soc_put_mute), |
460 | }; |
461 | |
462 | static const struct snd_soc_dai_ops cs4270_dai_ops = { |
463 | .hw_params = cs4270_hw_params, |
464 | .set_sysclk = cs4270_set_dai_sysclk, |
465 | .set_fmt = cs4270_set_dai_fmt, |
466 | .mute_stream = cs4270_dai_mute, |
467 | .no_capture_mute = 1, |
468 | }; |
469 | |
470 | static struct snd_soc_dai_driver cs4270_dai = { |
471 | .name = "cs4270-hifi" , |
472 | .playback = { |
473 | .stream_name = "Playback" , |
474 | .channels_min = 2, |
475 | .channels_max = 2, |
476 | .rates = SNDRV_PCM_RATE_CONTINUOUS, |
477 | .rate_min = 4000, |
478 | .rate_max = 216000, |
479 | .formats = CS4270_FORMATS, |
480 | }, |
481 | .capture = { |
482 | .stream_name = "Capture" , |
483 | .channels_min = 2, |
484 | .channels_max = 2, |
485 | .rates = SNDRV_PCM_RATE_CONTINUOUS, |
486 | .rate_min = 4000, |
487 | .rate_max = 216000, |
488 | .formats = CS4270_FORMATS, |
489 | }, |
490 | .ops = &cs4270_dai_ops, |
491 | }; |
492 | |
493 | /** |
494 | * cs4270_probe - ASoC probe function |
495 | * @component: ASoC component |
496 | * |
497 | * This function is called when ASoC has all the pieces it needs to |
498 | * instantiate a sound driver. |
499 | */ |
500 | static int cs4270_probe(struct snd_soc_component *component) |
501 | { |
502 | struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(c: component); |
503 | int ret; |
504 | |
505 | /* Disable auto-mute. This feature appears to be buggy. In some |
506 | * situations, auto-mute will not deactivate when it should, so we want |
507 | * this feature disabled by default. An application (e.g. alsactl) can |
508 | * re-enabled it by using the controls. |
509 | */ |
510 | ret = snd_soc_component_update_bits(component, CS4270_MUTE, CS4270_MUTE_AUTO, val: 0); |
511 | if (ret < 0) { |
512 | dev_err(component->dev, "i2c write failed\n" ); |
513 | return ret; |
514 | } |
515 | |
516 | /* Disable automatic volume control. The hardware enables, and it |
517 | * causes volume change commands to be delayed, sometimes until after |
518 | * playback has started. An application (e.g. alsactl) can |
519 | * re-enabled it by using the controls. |
520 | */ |
521 | ret = snd_soc_component_update_bits(component, CS4270_TRANS, |
522 | CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, val: 0); |
523 | if (ret < 0) { |
524 | dev_err(component->dev, "i2c write failed\n" ); |
525 | return ret; |
526 | } |
527 | |
528 | ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies), |
529 | consumers: cs4270->supplies); |
530 | |
531 | return ret; |
532 | } |
533 | |
534 | /** |
535 | * cs4270_remove - ASoC remove function |
536 | * @component: ASoC component |
537 | * |
538 | * This function is the counterpart to cs4270_probe(). |
539 | */ |
540 | static void cs4270_remove(struct snd_soc_component *component) |
541 | { |
542 | struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(c: component); |
543 | |
544 | regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), consumers: cs4270->supplies); |
545 | }; |
546 | |
547 | #ifdef CONFIG_PM |
548 | |
549 | /* This suspend/resume implementation can handle both - a simple standby |
550 | * where the codec remains powered, and a full suspend, where the voltage |
551 | * domain the codec is connected to is teared down and/or any other hardware |
552 | * reset condition is asserted. |
553 | * |
554 | * The codec's own power saving features are enabled in the suspend callback, |
555 | * and all registers are written back to the hardware when resuming. |
556 | */ |
557 | |
558 | static int cs4270_soc_suspend(struct snd_soc_component *component) |
559 | { |
560 | struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(c: component); |
561 | int reg, ret; |
562 | |
563 | reg = snd_soc_component_read(component, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL; |
564 | if (reg < 0) |
565 | return reg; |
566 | |
567 | ret = snd_soc_component_write(component, CS4270_PWRCTL, val: reg); |
568 | if (ret < 0) |
569 | return ret; |
570 | |
571 | regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), |
572 | consumers: cs4270->supplies); |
573 | |
574 | return 0; |
575 | } |
576 | |
577 | static int cs4270_soc_resume(struct snd_soc_component *component) |
578 | { |
579 | struct cs4270_private *cs4270 = snd_soc_component_get_drvdata(c: component); |
580 | int reg, ret; |
581 | |
582 | ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies), |
583 | consumers: cs4270->supplies); |
584 | if (ret != 0) |
585 | return ret; |
586 | |
587 | /* In case the device was put to hard reset during sleep, we need to |
588 | * wait 500ns here before any I2C communication. */ |
589 | ndelay(500); |
590 | |
591 | /* first restore the entire register cache ... */ |
592 | regcache_sync(map: cs4270->regmap); |
593 | |
594 | /* ... then disable the power-down bits */ |
595 | reg = snd_soc_component_read(component, CS4270_PWRCTL); |
596 | reg &= ~CS4270_PWRCTL_PDN_ALL; |
597 | |
598 | return snd_soc_component_write(component, CS4270_PWRCTL, val: reg); |
599 | } |
600 | #else |
601 | #define cs4270_soc_suspend NULL |
602 | #define cs4270_soc_resume NULL |
603 | #endif /* CONFIG_PM */ |
604 | |
605 | /* |
606 | * ASoC codec driver structure |
607 | */ |
608 | static const struct snd_soc_component_driver soc_component_device_cs4270 = { |
609 | .probe = cs4270_probe, |
610 | .remove = cs4270_remove, |
611 | .suspend = cs4270_soc_suspend, |
612 | .resume = cs4270_soc_resume, |
613 | .controls = cs4270_snd_controls, |
614 | .num_controls = ARRAY_SIZE(cs4270_snd_controls), |
615 | .dapm_widgets = cs4270_dapm_widgets, |
616 | .num_dapm_widgets = ARRAY_SIZE(cs4270_dapm_widgets), |
617 | .dapm_routes = cs4270_dapm_routes, |
618 | .num_dapm_routes = ARRAY_SIZE(cs4270_dapm_routes), |
619 | .idle_bias_on = 1, |
620 | .use_pmdown_time = 1, |
621 | .endianness = 1, |
622 | }; |
623 | |
624 | /* |
625 | * cs4270_of_match - the device tree bindings |
626 | */ |
627 | static const struct of_device_id cs4270_of_match[] = { |
628 | { .compatible = "cirrus,cs4270" , }, |
629 | { } |
630 | }; |
631 | MODULE_DEVICE_TABLE(of, cs4270_of_match); |
632 | |
633 | static const struct regmap_config cs4270_regmap = { |
634 | .reg_bits = 8, |
635 | .val_bits = 8, |
636 | .max_register = CS4270_LASTREG, |
637 | .reg_defaults = cs4270_reg_defaults, |
638 | .num_reg_defaults = ARRAY_SIZE(cs4270_reg_defaults), |
639 | .cache_type = REGCACHE_MAPLE, |
640 | .write_flag_mask = CS4270_I2C_INCR, |
641 | |
642 | .readable_reg = cs4270_reg_is_readable, |
643 | .volatile_reg = cs4270_reg_is_volatile, |
644 | }; |
645 | |
646 | /** |
647 | * cs4270_i2c_remove - deinitialize the I2C interface of the CS4270 |
648 | * @i2c_client: the I2C client object |
649 | * |
650 | * This function puts the chip into low power mode when the i2c device |
651 | * is removed. |
652 | */ |
653 | static void cs4270_i2c_remove(struct i2c_client *i2c_client) |
654 | { |
655 | struct cs4270_private *cs4270 = i2c_get_clientdata(client: i2c_client); |
656 | |
657 | gpiod_set_value_cansleep(desc: cs4270->reset_gpio, value: 0); |
658 | } |
659 | |
660 | /** |
661 | * cs4270_i2c_probe - initialize the I2C interface of the CS4270 |
662 | * @i2c_client: the I2C client object |
663 | * |
664 | * This function is called whenever the I2C subsystem finds a device that |
665 | * matches the device ID given via a prior call to i2c_add_driver(). |
666 | */ |
667 | static int cs4270_i2c_probe(struct i2c_client *i2c_client) |
668 | { |
669 | struct cs4270_private *cs4270; |
670 | unsigned int val; |
671 | int ret, i; |
672 | |
673 | cs4270 = devm_kzalloc(dev: &i2c_client->dev, size: sizeof(struct cs4270_private), |
674 | GFP_KERNEL); |
675 | if (!cs4270) |
676 | return -ENOMEM; |
677 | |
678 | /* get the power supply regulators */ |
679 | for (i = 0; i < ARRAY_SIZE(supply_names); i++) |
680 | cs4270->supplies[i].supply = supply_names[i]; |
681 | |
682 | ret = devm_regulator_bulk_get(dev: &i2c_client->dev, |
683 | ARRAY_SIZE(cs4270->supplies), |
684 | consumers: cs4270->supplies); |
685 | if (ret < 0) |
686 | return ret; |
687 | |
688 | /* reset the device */ |
689 | cs4270->reset_gpio = devm_gpiod_get_optional(dev: &i2c_client->dev, con_id: "reset" , |
690 | flags: GPIOD_OUT_LOW); |
691 | if (IS_ERR(ptr: cs4270->reset_gpio)) { |
692 | dev_dbg(&i2c_client->dev, "Error getting CS4270 reset GPIO\n" ); |
693 | return PTR_ERR(ptr: cs4270->reset_gpio); |
694 | } |
695 | |
696 | if (cs4270->reset_gpio) { |
697 | dev_dbg(&i2c_client->dev, "Found reset GPIO\n" ); |
698 | gpiod_set_value_cansleep(desc: cs4270->reset_gpio, value: 1); |
699 | } |
700 | |
701 | /* Sleep 500ns before i2c communications */ |
702 | ndelay(500); |
703 | |
704 | cs4270->regmap = devm_regmap_init_i2c(i2c_client, &cs4270_regmap); |
705 | if (IS_ERR(ptr: cs4270->regmap)) |
706 | return PTR_ERR(ptr: cs4270->regmap); |
707 | |
708 | /* Verify that we have a CS4270 */ |
709 | ret = regmap_read(map: cs4270->regmap, CS4270_CHIPID, val: &val); |
710 | if (ret < 0) { |
711 | dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n" , |
712 | i2c_client->addr); |
713 | return ret; |
714 | } |
715 | /* The top four bits of the chip ID should be 1100. */ |
716 | if ((val & 0xF0) != 0xC0) { |
717 | dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n" , |
718 | i2c_client->addr); |
719 | return -ENODEV; |
720 | } |
721 | |
722 | dev_info(&i2c_client->dev, "found device at i2c address %X\n" , |
723 | i2c_client->addr); |
724 | dev_info(&i2c_client->dev, "hardware revision %X\n" , val & 0xF); |
725 | |
726 | i2c_set_clientdata(client: i2c_client, data: cs4270); |
727 | |
728 | ret = devm_snd_soc_register_component(dev: &i2c_client->dev, |
729 | component_driver: &soc_component_device_cs4270, dai_drv: &cs4270_dai, num_dai: 1); |
730 | return ret; |
731 | } |
732 | |
733 | /* |
734 | * cs4270_id - I2C device IDs supported by this driver |
735 | */ |
736 | static const struct i2c_device_id cs4270_id[] = { |
737 | {"cs4270" , 0}, |
738 | {} |
739 | }; |
740 | MODULE_DEVICE_TABLE(i2c, cs4270_id); |
741 | |
742 | /* |
743 | * cs4270_i2c_driver - I2C device identification |
744 | * |
745 | * This structure tells the I2C subsystem how to identify and support a |
746 | * given I2C device type. |
747 | */ |
748 | static struct i2c_driver cs4270_i2c_driver = { |
749 | .driver = { |
750 | .name = "cs4270" , |
751 | .of_match_table = cs4270_of_match, |
752 | }, |
753 | .id_table = cs4270_id, |
754 | .probe = cs4270_i2c_probe, |
755 | .remove = cs4270_i2c_remove, |
756 | }; |
757 | |
758 | module_i2c_driver(cs4270_i2c_driver); |
759 | |
760 | MODULE_AUTHOR("Timur Tabi <timur@freescale.com>" ); |
761 | MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver" ); |
762 | MODULE_LICENSE("GPL" ); |
763 | |