1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * Copyright Everest Semiconductor Co.,Ltd |
4 | * |
5 | * Author: David Yang <yangxiaohua@everest-semi.com> |
6 | */ |
7 | |
8 | #ifndef _ES8316_H |
9 | #define _ES8316_H |
10 | |
11 | /* |
12 | * ES8316 register space |
13 | */ |
14 | |
15 | /* Reset Control */ |
16 | #define ES8316_RESET 0x00 |
17 | |
18 | /* Clock Management */ |
19 | #define ES8316_CLKMGR_CLKSW 0x01 |
20 | #define ES8316_CLKMGR_CLKSEL 0x02 |
21 | #define ES8316_CLKMGR_ADCOSR 0x03 |
22 | #define ES8316_CLKMGR_ADCDIV1 0x04 |
23 | #define ES8316_CLKMGR_ADCDIV2 0x05 |
24 | #define ES8316_CLKMGR_DACDIV1 0x06 |
25 | #define ES8316_CLKMGR_DACDIV2 0x07 |
26 | #define ES8316_CLKMGR_CPDIV 0x08 |
27 | |
28 | /* Serial Data Port Control */ |
29 | #define ES8316_SERDATA1 0x09 |
30 | #define ES8316_SERDATA_ADC 0x0a |
31 | #define ES8316_SERDATA_DAC 0x0b |
32 | |
33 | /* System Control */ |
34 | #define ES8316_SYS_VMIDSEL 0x0c |
35 | #define ES8316_SYS_PDN 0x0d |
36 | #define ES8316_SYS_LP1 0x0e |
37 | #define ES8316_SYS_LP2 0x0f |
38 | #define ES8316_SYS_VMIDLOW 0x10 |
39 | #define ES8316_SYS_VSEL 0x11 |
40 | #define ES8316_SYS_REF 0x12 |
41 | |
42 | /* Headphone Mixer */ |
43 | #define ES8316_HPMIX_SEL 0x13 |
44 | #define ES8316_HPMIX_SWITCH 0x14 |
45 | #define ES8316_HPMIX_PDN 0x15 |
46 | #define ES8316_HPMIX_VOL 0x16 |
47 | |
48 | /* Charge Pump Headphone driver */ |
49 | #define ES8316_CPHP_OUTEN 0x17 |
50 | #define ES8316_CPHP_ICAL_VOL 0x18 |
51 | #define ES8316_CPHP_PDN1 0x19 |
52 | #define ES8316_CPHP_PDN2 0x1a |
53 | #define ES8316_CPHP_LDOCTL 0x1b |
54 | |
55 | /* Calibration */ |
56 | #define ES8316_CAL_TYPE 0x1c |
57 | #define ES8316_CAL_SET 0x1d |
58 | #define ES8316_CAL_HPLIV 0x1e |
59 | #define ES8316_CAL_HPRIV 0x1f |
60 | #define ES8316_CAL_HPLMV 0x20 |
61 | #define ES8316_CAL_HPRMV 0x21 |
62 | |
63 | /* ADC Control */ |
64 | #define ES8316_ADC_PDN_LINSEL 0x22 |
65 | #define ES8316_ADC_PGAGAIN 0x23 |
66 | #define ES8316_ADC_D2SEPGA 0x24 |
67 | #define ES8316_ADC_DMIC 0x25 |
68 | #define ES8316_ADC_MUTE 0x26 |
69 | #define ES8316_ADC_VOLUME 0x27 |
70 | #define ES8316_ADC_ALC1 0x29 |
71 | #define ES8316_ADC_ALC2 0x2a |
72 | #define ES8316_ADC_ALC3 0x2b |
73 | #define ES8316_ADC_ALC4 0x2c |
74 | #define ES8316_ADC_ALC5 0x2d |
75 | #define ES8316_ADC_ALC_NG 0x2e |
76 | |
77 | /* DAC Control */ |
78 | #define ES8316_DAC_PDN 0x2f |
79 | #define ES8316_DAC_SET1 0x30 |
80 | #define ES8316_DAC_SET2 0x31 |
81 | #define ES8316_DAC_SET3 0x32 |
82 | #define ES8316_DAC_VOLL 0x33 |
83 | #define ES8316_DAC_VOLR 0x34 |
84 | |
85 | /* GPIO */ |
86 | #define ES8316_GPIO_SEL 0x4d |
87 | #define ES8316_GPIO_DEBOUNCE 0x4e |
88 | #define ES8316_GPIO_FLAG 0x4f |
89 | |
90 | /* Test mode */ |
91 | #define ES8316_TESTMODE 0x50 |
92 | #define ES8316_TEST1 0x51 |
93 | #define ES8316_TEST2 0x52 |
94 | #define ES8316_TEST3 0x53 |
95 | |
96 | /* |
97 | * Field definitions |
98 | */ |
99 | |
100 | /* ES8316_RESET */ |
101 | #define ES8316_RESET_CSM_ON 0x80 |
102 | |
103 | /* ES8316_CLKMGR_CLKSW */ |
104 | #define ES8316_CLKMGR_CLKSW_MCLK_ON 0x40 |
105 | #define ES8316_CLKMGR_CLKSW_BCLK_ON 0x20 |
106 | |
107 | /* ES8316_SERDATA1 */ |
108 | #define ES8316_SERDATA1_MASTER 0x80 |
109 | #define ES8316_SERDATA1_BCLK_INV 0x20 |
110 | |
111 | /* ES8316_SERDATA_ADC and _DAC */ |
112 | #define ES8316_SERDATA2_FMT_MASK 0x3 |
113 | #define ES8316_SERDATA2_FMT_I2S 0x00 |
114 | #define ES8316_SERDATA2_FMT_LEFTJ 0x01 |
115 | #define ES8316_SERDATA2_FMT_RIGHTJ 0x02 |
116 | #define ES8316_SERDATA2_FMT_PCM 0x03 |
117 | #define ES8316_SERDATA2_ADCLRP 0x20 |
118 | #define ES8316_SERDATA2_LEN_MASK 0x1c |
119 | #define ES8316_SERDATA2_LEN_24 0x00 |
120 | #define ES8316_SERDATA2_LEN_20 0x04 |
121 | #define ES8316_SERDATA2_LEN_18 0x08 |
122 | #define ES8316_SERDATA2_LEN_16 0x0c |
123 | #define ES8316_SERDATA2_LEN_32 0x10 |
124 | |
125 | /* ES8316_GPIO_DEBOUNCE */ |
126 | #define ES8316_GPIO_ENABLE_INTERRUPT 0x02 |
127 | |
128 | /* ES8316_GPIO_FLAG */ |
129 | #define ES8316_GPIO_FLAG_GM_NOT_SHORTED 0x02 |
130 | #define ES8316_GPIO_FLAG_HP_NOT_INSERTED 0x04 |
131 | |
132 | /* ES8316_CLKMGR_CLKSW */ |
133 | #define ES8316_CLKMGR_CLKSW_MCLK_DIV 0x80 |
134 | |
135 | #endif |
136 | |