1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * es8328.h -- ES8328 ALSA SoC Audio driver |
4 | */ |
5 | |
6 | #ifndef _ES8328_H |
7 | #define _ES8328_H |
8 | |
9 | #include <linux/regmap.h> |
10 | |
11 | struct device; |
12 | |
13 | extern const struct regmap_config es8328_regmap_config; |
14 | int es8328_probe(struct device *dev, struct regmap *regmap); |
15 | |
16 | #define ES8328_DACLVOL 46 |
17 | #define ES8328_DACRVOL 47 |
18 | #define ES8328_DACCTL 28 |
19 | #define ES8328_RATEMASK (0x1f << 0) |
20 | |
21 | #define ES8328_CONTROL1 0x00 |
22 | #define ES8328_CONTROL1_VMIDSEL_OFF (0 << 0) |
23 | #define ES8328_CONTROL1_VMIDSEL_50k (1 << 0) |
24 | #define ES8328_CONTROL1_VMIDSEL_500k (2 << 0) |
25 | #define ES8328_CONTROL1_VMIDSEL_5k (3 << 0) |
26 | #define ES8328_CONTROL1_VMIDSEL_MASK (3 << 0) |
27 | #define ES8328_CONTROL1_ENREF (1 << 2) |
28 | #define ES8328_CONTROL1_SEQEN (1 << 3) |
29 | #define ES8328_CONTROL1_SAMEFS (1 << 4) |
30 | #define ES8328_CONTROL1_DACMCLK_ADC (0 << 5) |
31 | #define ES8328_CONTROL1_DACMCLK_DAC (1 << 5) |
32 | #define ES8328_CONTROL1_LRCM (1 << 6) |
33 | #define ES8328_CONTROL1_SCP_RESET (1 << 7) |
34 | |
35 | #define ES8328_CONTROL2 0x01 |
36 | #define ES8328_CONTROL2_VREF_BUF_OFF (1 << 0) |
37 | #define ES8328_CONTROL2_VREF_LOWPOWER (1 << 1) |
38 | #define ES8328_CONTROL2_IBIASGEN_OFF (1 << 2) |
39 | #define ES8328_CONTROL2_ANALOG_OFF (1 << 3) |
40 | #define ES8328_CONTROL2_VREF_BUF_LOWPOWER (1 << 4) |
41 | #define ES8328_CONTROL2_VCM_MOD_LOWPOWER (1 << 5) |
42 | #define ES8328_CONTROL2_OVERCURRENT_ON (1 << 6) |
43 | #define ES8328_CONTROL2_THERMAL_SHUTDOWN_ON (1 << 7) |
44 | |
45 | #define ES8328_CHIPPOWER 0x02 |
46 | #define ES8328_CHIPPOWER_DACVREF_OFF 0 |
47 | #define ES8328_CHIPPOWER_ADCVREF_OFF 1 |
48 | #define ES8328_CHIPPOWER_DACDLL_OFF 2 |
49 | #define ES8328_CHIPPOWER_ADCDLL_OFF 3 |
50 | #define ES8328_CHIPPOWER_DACSTM_RESET 4 |
51 | #define ES8328_CHIPPOWER_ADCSTM_RESET 5 |
52 | #define ES8328_CHIPPOWER_DACDIG_OFF 6 |
53 | #define ES8328_CHIPPOWER_ADCDIG_OFF 7 |
54 | |
55 | #define ES8328_ADCPOWER 0x03 |
56 | #define ES8328_ADCPOWER_INT1_LOWPOWER 0 |
57 | #define ES8328_ADCPOWER_FLASH_ADC_LOWPOWER 1 |
58 | #define ES8328_ADCPOWER_ADC_BIAS_GEN_OFF 2 |
59 | #define ES8328_ADCPOWER_MIC_BIAS_OFF 3 |
60 | #define ES8328_ADCPOWER_ADCR_OFF 4 |
61 | #define ES8328_ADCPOWER_ADCL_OFF 5 |
62 | #define ES8328_ADCPOWER_AINR_OFF 6 |
63 | #define ES8328_ADCPOWER_AINL_OFF 7 |
64 | |
65 | #define ES8328_DACPOWER 0x04 |
66 | #define ES8328_DACPOWER_OUT3_ON 0 |
67 | #define ES8328_DACPOWER_MONO_ON 1 |
68 | #define ES8328_DACPOWER_ROUT2_ON 2 |
69 | #define ES8328_DACPOWER_LOUT2_ON 3 |
70 | #define ES8328_DACPOWER_ROUT1_ON 4 |
71 | #define ES8328_DACPOWER_LOUT1_ON 5 |
72 | #define ES8328_DACPOWER_RDAC_OFF 6 |
73 | #define ES8328_DACPOWER_LDAC_OFF 7 |
74 | |
75 | #define ES8328_CHIPLOPOW1 0x05 |
76 | #define ES8328_CHIPLOPOW2 0x06 |
77 | #define ES8328_ANAVOLMANAG 0x07 |
78 | |
79 | #define ES8328_MASTERMODE 0x08 |
80 | #define ES8328_MASTERMODE_BCLKDIV (0 << 0) |
81 | #define ES8328_MASTERMODE_BCLK_INV (1 << 5) |
82 | #define ES8328_MASTERMODE_MCLKDIV2 (1 << 6) |
83 | #define ES8328_MASTERMODE_MSC (1 << 7) |
84 | |
85 | #define ES8328_ADCCONTROL1 0x09 |
86 | #define ES8328_ADCCONTROL2 0x0a |
87 | #define ES8328_ADCCONTROL3 0x0b |
88 | |
89 | #define ES8328_ADCCONTROL4 0x0c |
90 | #define ES8328_ADCCONTROL4_ADCFORMAT_MASK (3 << 0) |
91 | #define ES8328_ADCCONTROL4_ADCFORMAT_I2S (0 << 0) |
92 | #define ES8328_ADCCONTROL4_ADCFORMAT_LJUST (1 << 0) |
93 | #define ES8328_ADCCONTROL4_ADCFORMAT_RJUST (2 << 0) |
94 | #define ES8328_ADCCONTROL4_ADCFORMAT_PCM (3 << 0) |
95 | #define ES8328_ADCCONTROL4_ADCWL_SHIFT 2 |
96 | #define ES8328_ADCCONTROL4_ADCWL_MASK (7 << 2) |
97 | #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_NORMAL (0 << 5) |
98 | #define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_INV (1 << 5) |
99 | #define ES8328_ADCCONTROL4_ADCLRP_PCM_MSB_CLK2 (0 << 5) |
100 | #define ES8328_ADCCONTROL4_ADCLRP_PCM_MSB_CLK1 (1 << 5) |
101 | |
102 | #define ES8328_ADCCONTROL5 0x0d |
103 | #define ES8328_ADCCONTROL5_RATEMASK (0x1f << 0) |
104 | |
105 | #define ES8328_ADCCONTROL6 0x0e |
106 | |
107 | #define ES8328_ADCCONTROL7 0x0f |
108 | #define ES8328_ADCCONTROL7_ADC_MUTE (1 << 2) |
109 | #define ES8328_ADCCONTROL7_ADC_LER (1 << 3) |
110 | #define ES8328_ADCCONTROL7_ADC_ZERO_CROSS (1 << 4) |
111 | #define ES8328_ADCCONTROL7_ADC_SOFT_RAMP (1 << 5) |
112 | #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_4 (0 << 6) |
113 | #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_8 (1 << 6) |
114 | #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_16 (2 << 6) |
115 | #define ES8328_ADCCONTROL7_ADC_RAMP_RATE_32 (3 << 6) |
116 | |
117 | #define ES8328_ADCCONTROL8 0x10 |
118 | #define ES8328_ADCCONTROL9 0x11 |
119 | #define ES8328_ADCCONTROL10 0x12 |
120 | #define ES8328_ADCCONTROL11 0x13 |
121 | #define ES8328_ADCCONTROL12 0x14 |
122 | #define ES8328_ADCCONTROL13 0x15 |
123 | #define ES8328_ADCCONTROL14 0x16 |
124 | |
125 | #define ES8328_DACCONTROL1 0x17 |
126 | #define ES8328_DACCONTROL1_DACFORMAT_MASK (3 << 1) |
127 | #define ES8328_DACCONTROL1_DACFORMAT_I2S (0 << 1) |
128 | #define ES8328_DACCONTROL1_DACFORMAT_LJUST (1 << 1) |
129 | #define ES8328_DACCONTROL1_DACFORMAT_RJUST (2 << 1) |
130 | #define ES8328_DACCONTROL1_DACFORMAT_PCM (3 << 1) |
131 | #define ES8328_DACCONTROL1_DACWL_SHIFT 3 |
132 | #define ES8328_DACCONTROL1_DACWL_MASK (7 << 3) |
133 | #define ES8328_DACCONTROL1_DACLRP_I2S_POL_NORMAL (0 << 6) |
134 | #define ES8328_DACCONTROL1_DACLRP_I2S_POL_INV (1 << 6) |
135 | #define ES8328_DACCONTROL1_DACLRP_PCM_MSB_CLK2 (0 << 6) |
136 | #define ES8328_DACCONTROL1_DACLRP_PCM_MSB_CLK1 (1 << 6) |
137 | #define ES8328_DACCONTROL1_LRSWAP (1 << 7) |
138 | |
139 | #define ES8328_DACCONTROL2 0x18 |
140 | #define ES8328_DACCONTROL2_RATEMASK (0x1f << 0) |
141 | #define ES8328_DACCONTROL2_DOUBLESPEED (1 << 5) |
142 | |
143 | #define ES8328_DACCONTROL3 0x19 |
144 | #define ES8328_DACCONTROL3_AUTOMUTE (1 << 2) |
145 | #define ES8328_DACCONTROL3_DACMUTE (1 << 2) |
146 | #define ES8328_DACCONTROL3_LEFTGAINVOL (1 << 3) |
147 | #define ES8328_DACCONTROL3_DACZEROCROSS (1 << 4) |
148 | #define ES8328_DACCONTROL3_DACSOFTRAMP (1 << 5) |
149 | #define ES8328_DACCONTROL3_DACRAMPRATE (3 << 6) |
150 | |
151 | #define ES8328_LDACVOL 0x1a |
152 | #define ES8328_LDACVOL_MASK (0 << 0) |
153 | #define ES8328_LDACVOL_MAX (0xc0) |
154 | |
155 | #define ES8328_RDACVOL 0x1b |
156 | #define ES8328_RDACVOL_MASK (0 << 0) |
157 | #define ES8328_RDACVOL_MAX (0xc0) |
158 | |
159 | #define ES8328_DACVOL_MAX (0xc0) |
160 | |
161 | #define ES8328_DACCONTROL4 0x1a |
162 | #define ES8328_DACCONTROL5 0x1b |
163 | |
164 | #define ES8328_DACCONTROL6 0x1c |
165 | #define ES8328_DACCONTROL6_CLICKFREE (1 << 3) |
166 | #define ES8328_DACCONTROL6_DAC_INVR (1 << 4) |
167 | #define ES8328_DACCONTROL6_DAC_INVL (1 << 5) |
168 | #define ES8328_DACCONTROL6_DEEMPH_MASK (3 << 6) |
169 | #define ES8328_DACCONTROL6_DEEMPH_OFF (0 << 6) |
170 | #define ES8328_DACCONTROL6_DEEMPH_32k (1 << 6) |
171 | #define ES8328_DACCONTROL6_DEEMPH_44_1k (2 << 6) |
172 | #define ES8328_DACCONTROL6_DEEMPH_48k (3 << 6) |
173 | |
174 | #define ES8328_DACCONTROL7 0x1d |
175 | #define ES8328_DACCONTROL7_VPP_SCALE_3p5 (0 << 0) |
176 | #define ES8328_DACCONTROL7_VPP_SCALE_4p0 (1 << 0) |
177 | #define ES8328_DACCONTROL7_VPP_SCALE_3p0 (2 << 0) |
178 | #define ES8328_DACCONTROL7_VPP_SCALE_2p5 (3 << 0) |
179 | #define ES8328_DACCONTROL7_SHELVING_STRENGTH (1 << 2) /* In eights */ |
180 | #define ES8328_DACCONTROL7_MONO (1 << 5) |
181 | #define ES8328_DACCONTROL7_ZEROR (1 << 6) |
182 | #define ES8328_DACCONTROL7_ZEROL (1 << 7) |
183 | |
184 | /* Shelving filter */ |
185 | #define ES8328_DACCONTROL8 0x1e |
186 | #define ES8328_DACCONTROL9 0x1f |
187 | #define ES8328_DACCONTROL10 0x20 |
188 | #define ES8328_DACCONTROL11 0x21 |
189 | #define ES8328_DACCONTROL12 0x22 |
190 | #define ES8328_DACCONTROL13 0x23 |
191 | #define ES8328_DACCONTROL14 0x24 |
192 | #define ES8328_DACCONTROL15 0x25 |
193 | |
194 | #define ES8328_DACCONTROL16 0x26 |
195 | #define ES8328_DACCONTROL16_RMIXSEL_RIN1 (0 << 0) |
196 | #define ES8328_DACCONTROL16_RMIXSEL_RIN2 (1 << 0) |
197 | #define ES8328_DACCONTROL16_RMIXSEL_RIN3 (2 << 0) |
198 | #define ES8328_DACCONTROL16_RMIXSEL_RADC (3 << 0) |
199 | #define ES8328_DACCONTROL16_LMIXSEL_LIN1 (0 << 3) |
200 | #define ES8328_DACCONTROL16_LMIXSEL_LIN2 (1 << 3) |
201 | #define ES8328_DACCONTROL16_LMIXSEL_LIN3 (2 << 3) |
202 | #define ES8328_DACCONTROL16_LMIXSEL_LADC (3 << 3) |
203 | |
204 | #define ES8328_DACCONTROL17 0x27 |
205 | #define ES8328_DACCONTROL17_LI2LOVOL (7 << 3) |
206 | #define ES8328_DACCONTROL17_LI2LO (1 << 6) |
207 | #define ES8328_DACCONTROL17_LD2LO (1 << 7) |
208 | |
209 | #define ES8328_DACCONTROL18 0x28 |
210 | #define ES8328_DACCONTROL18_RI2LOVOL (7 << 3) |
211 | #define ES8328_DACCONTROL18_RI2LO (1 << 6) |
212 | #define ES8328_DACCONTROL18_RD2LO (1 << 7) |
213 | |
214 | #define ES8328_DACCONTROL19 0x29 |
215 | #define ES8328_DACCONTROL19_LI2ROVOL (7 << 3) |
216 | #define ES8328_DACCONTROL19_LI2RO (1 << 6) |
217 | #define ES8328_DACCONTROL19_LD2RO (1 << 7) |
218 | |
219 | #define ES8328_DACCONTROL20 0x2a |
220 | #define ES8328_DACCONTROL20_RI2ROVOL (7 << 3) |
221 | #define ES8328_DACCONTROL20_RI2RO (1 << 6) |
222 | #define ES8328_DACCONTROL20_RD2RO (1 << 7) |
223 | |
224 | #define ES8328_DACCONTROL21 0x2b |
225 | #define ES8328_DACCONTROL21_LI2MOVOL (7 << 3) |
226 | #define ES8328_DACCONTROL21_LI2MO (1 << 6) |
227 | #define ES8328_DACCONTROL21_LD2MO (1 << 7) |
228 | |
229 | #define ES8328_DACCONTROL22 0x2c |
230 | #define ES8328_DACCONTROL22_RI2MOVOL (7 << 3) |
231 | #define ES8328_DACCONTROL22_RI2MO (1 << 6) |
232 | #define ES8328_DACCONTROL22_RD2MO (1 << 7) |
233 | |
234 | #define ES8328_DACCONTROL23 0x2d |
235 | #define ES8328_DACCONTROL23_MOUTINV (1 << 1) |
236 | #define ES8328_DACCONTROL23_HPSWPOL (1 << 2) |
237 | #define ES8328_DACCONTROL23_HPSWEN (1 << 3) |
238 | #define ES8328_DACCONTROL23_VROI_1p5k (0 << 4) |
239 | #define ES8328_DACCONTROL23_VROI_40k (1 << 4) |
240 | #define ES8328_DACCONTROL23_OUT3_VREF (0 << 5) |
241 | #define ES8328_DACCONTROL23_OUT3_ROUT1 (1 << 5) |
242 | #define ES8328_DACCONTROL23_OUT3_MONOOUT (2 << 5) |
243 | #define ES8328_DACCONTROL23_OUT3_RIGHT_MIXER (3 << 5) |
244 | #define ES8328_DACCONTROL23_ROUT2INV (1 << 7) |
245 | |
246 | /* LOUT1 Amplifier */ |
247 | #define ES8328_LOUT1VOL 0x2e |
248 | #define ES8328_LOUT1VOL_MASK (0 << 5) |
249 | #define ES8328_LOUT1VOL_MAX (0x24) |
250 | |
251 | /* ROUT1 Amplifier */ |
252 | #define ES8328_ROUT1VOL 0x2f |
253 | #define ES8328_ROUT1VOL_MASK (0 << 5) |
254 | #define ES8328_ROUT1VOL_MAX (0x24) |
255 | |
256 | #define ES8328_OUT1VOL_MAX (0x24) |
257 | |
258 | /* LOUT2 Amplifier */ |
259 | #define ES8328_LOUT2VOL 0x30 |
260 | #define ES8328_LOUT2VOL_MASK (0 << 5) |
261 | #define ES8328_LOUT2VOL_MAX (0x24) |
262 | |
263 | /* ROUT2 Amplifier */ |
264 | #define ES8328_ROUT2VOL 0x31 |
265 | #define ES8328_ROUT2VOL_MASK (0 << 5) |
266 | #define ES8328_ROUT2VOL_MAX (0x24) |
267 | |
268 | #define ES8328_OUT2VOL_MAX (0x24) |
269 | |
270 | /* Mono Out Amplifier */ |
271 | #define ES8328_MONOOUTVOL 0x32 |
272 | #define ES8328_MONOOUTVOL_MASK (0 << 5) |
273 | #define ES8328_MONOOUTVOL_MAX (0x24) |
274 | |
275 | #define ES8328_DACCONTROL29 0x33 |
276 | #define ES8328_DACCONTROL30 0x34 |
277 | |
278 | #define ES8328_SYSCLK 0 |
279 | |
280 | #define ES8328_REG_MAX 0x35 |
281 | |
282 | #define ES8328_1536FS 1536 |
283 | #define ES8328_1024FS 1024 |
284 | #define ES8328_768FS 768 |
285 | #define ES8328_512FS 512 |
286 | #define ES8328_384FS 384 |
287 | #define ES8328_256FS 256 |
288 | #define ES8328_128FS 128 |
289 | |
290 | #endif |
291 | |