| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Copyright (c) 2020, Maxim Integrated. |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef _MAX98390_H |
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| 7 | #define _MAX98390_H |
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| 8 | |
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| 9 | /* MAX98390 Register Address */ |
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| 10 | #define MAX98390_SOFTWARE_RESET 0x2000 |
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| 11 | #define MAX98390_INT_RAW1 0x2002 |
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| 12 | #define MAX98390_INT_RAW2 0x2003 |
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| 13 | #define MAX98390_INT_RAW3 0x2004 |
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| 14 | #define MAX98390_INT_STATE1 0x2005 |
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| 15 | #define MAX98390_INT_STATE2 0x2006 |
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| 16 | #define MAX98390_INT_STATE3 0x2007 |
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| 17 | #define MAX98390_INT_FLAG1 0x2008 |
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| 18 | #define MAX98390_INT_FLAG2 0x2009 |
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| 19 | #define MAX98390_INT_FLAG3 0x200a |
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| 20 | #define MAX98390_INT_EN1 0x200b |
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| 21 | #define MAX98390_INT_EN2 0x200c |
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| 22 | #define MAX98390_INT_EN3 0x200d |
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| 23 | #define MAX98390_INT_FLAG_CLR1 0x200e |
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| 24 | #define MAX98390_INT_FLAG_CLR2 0x200f |
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| 25 | #define MAX98390_INT_FLAG_CLR3 0x2010 |
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| 26 | #define MAX98390_IRQ_CTRL 0x2011 |
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| 27 | #define MAX98390_CLK_MON 0x2012 |
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| 28 | #define MAX98390_DAT_MON 0x2014 |
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| 29 | #define MAX98390_WDOG_CTRL 0x2015 |
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| 30 | #define MAX98390_WDOG_RST 0x2016 |
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| 31 | #define MAX98390_MEAS_ADC_THERM_WARN_THRESH 0x2017 |
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| 32 | #define MAX98390_MEAS_ADC_THERM_SHDN_THRESH 0x2018 |
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| 33 | #define MAX98390_MEAS_ADC_THERM_HYSTERESIS 0x2019 |
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| 34 | #define MAX98390_PIN_CFG 0x201a |
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| 35 | #define MAX98390_PCM_RX_EN_A 0x201b |
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| 36 | #define MAX98390_PCM_RX_EN_B 0x201c |
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| 37 | #define MAX98390_PCM_TX_EN_A 0x201d |
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| 38 | #define MAX98390_PCM_TX_EN_B 0x201e |
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| 39 | #define MAX98390_PCM_TX_HIZ_CTRL_A 0x201f |
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| 40 | #define MAX98390_PCM_TX_HIZ_CTRL_B 0x2020 |
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| 41 | #define MAX98390_PCM_CH_SRC_1 0x2021 |
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| 42 | #define MAX98390_PCM_CH_SRC_2 0x2022 |
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| 43 | #define MAX98390_PCM_CH_SRC_3 0x2023 |
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| 44 | #define MAX98390_PCM_MODE_CFG 0x2024 |
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| 45 | #define MAX98390_PCM_MASTER_MODE 0x2025 |
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| 46 | #define MAX98390_PCM_CLK_SETUP 0x2026 |
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| 47 | #define MAX98390_PCM_SR_SETUP 0x2027 |
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| 48 | #define MAX98390_ICC_RX_EN_A 0x202c |
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| 49 | #define MAX98390_ICC_RX_EN_B 0x202d |
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| 50 | #define MAX98390_ICC_TX_EN_A 0x202e |
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| 51 | #define MAX98390_ICC_TX_EN_B 0x202f |
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| 52 | #define MAX98390_ICC_HIZ_MANUAL_MODE 0x2030 |
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| 53 | #define MAX98390_ICC_TX_HIZ_EN_A 0x2031 |
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| 54 | #define MAX98390_ICC_TX_HIZ_EN_B 0x2032 |
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| 55 | #define MAX98390_ICC_LNK_EN 0x2033 |
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| 56 | #define MAX98390_R2039_AMP_DSP_CFG 0x2039 |
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| 57 | #define MAX98390_R203A_AMP_EN 0x203a |
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| 58 | #define MAX98390_TONE_GEN_DC_CFG 0x203b |
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| 59 | #define MAX98390_SPK_SRC_SEL 0x203c |
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| 60 | #define MAX98390_R203D_SPK_GAIN 0x203d |
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| 61 | #define MAX98390_SSM_CFG 0x203e |
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| 62 | #define MAX98390_MEAS_EN 0x203f |
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| 63 | #define MAX98390_MEAS_DSP_CFG 0x2040 |
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| 64 | #define MAX98390_BOOST_CTRL0 0x2041 |
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| 65 | #define MAX98390_BOOST_CTRL3 0x2042 |
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| 66 | #define MAX98390_BOOST_CTRL1 0x2043 |
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| 67 | #define MAX98390_MEAS_ADC_CFG 0x2044 |
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| 68 | #define MAX98390_MEAS_ADC_BASE_MSB 0x2045 |
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| 69 | #define MAX98390_MEAS_ADC_BASE_LSB 0x2046 |
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| 70 | #define MAX98390_ADC_CH0_DIVIDE 0x2047 |
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| 71 | #define MAX98390_ADC_CH1_DIVIDE 0x2048 |
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| 72 | #define MAX98390_ADC_CH2_DIVIDE 0x2049 |
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| 73 | #define MAX98390_ADC_CH0_FILT_CFG 0x204a |
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| 74 | #define MAX98390_ADC_CH1_FILT_CFG 0x204b |
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| 75 | #define MAX98390_ADC_CH2_FILT_CFG 0x204c |
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| 76 | #define MAX98390_MEAS_ADC_CH0_READ 0x204d |
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| 77 | #define MAX98390_MEAS_ADC_CH1_READ 0x204e |
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| 78 | #define MAX98390_MEAS_ADC_CH2_READ 0x204f |
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| 79 | #define MAX98390_PWR_GATE_CTL 0x2050 |
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| 80 | #define MAX98390_PWR_GATE_STATUS 0x2051 |
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| 81 | #define MAX98390_VBAT_LOW_STATUS 0x2052 |
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| 82 | #define MAX98390_PVDD_LOW_STATUS 0x2053 |
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| 83 | #define MAX98390_BROWNOUT_STATUS 0x2054 |
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| 84 | #define MAX98390_BROWNOUT_EN 0x2055 |
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| 85 | #define MAX98390_BROWNOUT_INFINITE_HOLD 0x2056 |
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| 86 | #define MAX98390_BROWNOUT_INFINITE_HOLD_CLR 0x2057 |
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| 87 | #define MAX98390_BROWNOUT_LVL_HOLD 0x2058 |
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| 88 | #define MAX98390_BROWNOUT_LVL1_THRESH 0x2059 |
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| 89 | #define MAX98390_BROWNOUT_LVL2_THRESH 0x205a |
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| 90 | #define MAX98390_BROWNOUT_LVL3_THRESH 0x205b |
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| 91 | #define MAX98390_BROWNOUT_LVL4_THRESH 0x205c |
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| 92 | #define MAX98390_BROWNOUT_THRESH_HYSTERYSIS 0x205d |
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| 93 | #define MAX98390_BROWNOUT_AMP_LIMITER_ATK_REL 0x205e |
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| 94 | #define MAX98390_BROWNOUT_AMP_GAIN_ATK_REL 0x205f |
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| 95 | #define MAX98390_BROWNOUT_AMP1_CLIP_MODE 0x2060 |
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| 96 | #define MAX98390_BROWNOUT_LVL1_CUR_LIMIT 0x2061 |
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| 97 | #define MAX98390_BROWNOUT_LVL1_AMP1_CTRL1 0x2062 |
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| 98 | #define MAX98390_BROWNOUT_LVL1_AMP1_CTRL2 0x2063 |
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| 99 | #define MAX98390_BROWNOUT_LVL1_AMP1_CTRL3 0x2064 |
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| 100 | #define MAX98390_BROWNOUT_LVL2_CUR_LIMIT 0x2065 |
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| 101 | #define MAX98390_BROWNOUT_LVL2_AMP1_CTRL1 0x2066 |
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| 102 | #define MAX98390_BROWNOUT_LVL2_AMP1_CTRL2 0x2067 |
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| 103 | #define MAX98390_BROWNOUT_LVL2_AMP1_CTRL3 0x2068 |
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| 104 | #define MAX98390_BROWNOUT_LVL3_CUR_LIMIT 0x2069 |
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| 105 | #define MAX98390_BROWNOUT_LVL3_AMP1_CTRL1 0x206a |
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| 106 | #define MAX98390_BROWNOUT_LVL3_AMP1_CTRL2 0x206b |
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| 107 | #define MAX98390_BROWNOUT_LVL3_AMP1_CTRL3 0x206c |
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| 108 | #define MAX98390_BROWNOUT_LVL4_CUR_LIMIT 0x206d |
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| 109 | #define MAX98390_BROWNOUT_LVL4_AMP1_CTRL1 0x206e |
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| 110 | #define MAX98390_BROWNOUT_LVL4_AMP1_CTRL2 0x206f |
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| 111 | #define MAX98390_BROWNOUT_LVL4_AMP1_CTRL3 0x2070 |
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| 112 | #define MAX98390_BROWNOUT_LOWEST_STATUS 0x2071 |
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| 113 | #define MAX98390_BROWNOUT_ILIM_HLD 0x2072 |
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| 114 | #define MAX98390_BROWNOUT_LIM_HLD 0x2073 |
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| 115 | #define MAX98390_BROWNOUT_CLIP_HLD 0x2074 |
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| 116 | #define MAX98390_BROWNOUT_GAIN_HLD 0x2075 |
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| 117 | #define MAX98390_ENV_TRACK_VOUT_HEADROOM 0x2076 |
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| 118 | #define MAX98390_ENV_TRACK_BOOST_VOUT_DELAY 0x2077 |
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| 119 | #define MAX98390_ENV_TRACK_REL_RATE 0x2078 |
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| 120 | #define MAX98390_ENV_TRACK_HOLD_RATE 0x2079 |
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| 121 | #define MAX98390_ENV_TRACK_CTRL 0x207a |
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| 122 | #define MAX98390_ENV_TRACK_BOOST_VOUT_READ 0x207b |
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| 123 | #define MAX98390_BOOST_BYPASS1 0x207c |
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| 124 | #define MAX98390_BOOST_BYPASS2 0x207d |
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| 125 | #define MAX98390_BOOST_BYPASS3 0x207e |
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| 126 | #define MAX98390_FET_SCALING1 0x207f |
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| 127 | #define MAX98390_FET_SCALING2 0x2080 |
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| 128 | #define MAX98390_FET_SCALING3 0x2081 |
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| 129 | #define MAX98390_FET_SCALING4 0x2082 |
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| 130 | #define MAX98390_SPK_SPEEDUP 0x2084 |
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| 131 | |
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| 132 | #define DSM_STBASS_HPF_B0_BYTE0 0x2101 |
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| 133 | #define DSM_STBASS_HPF_B0_BYTE1 0x2102 |
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| 134 | #define DSM_STBASS_HPF_B0_BYTE2 0x2103 |
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| 135 | #define DSM_STBASS_HPF_B1_BYTE0 0x2105 |
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| 136 | #define DSM_STBASS_HPF_B1_BYTE1 0x2106 |
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| 137 | #define DSM_STBASS_HPF_B1_BYTE2 0x2107 |
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| 138 | #define DSM_STBASS_HPF_B2_BYTE0 0x2109 |
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| 139 | #define DSM_STBASS_HPF_B2_BYTE1 0x210a |
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| 140 | #define DSM_STBASS_HPF_B2_BYTE2 0x210b |
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| 141 | #define DSM_STBASS_HPF_A1_BYTE0 0x210d |
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| 142 | #define DSM_STBASS_HPF_A1_BYTE1 0x210e |
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| 143 | #define DSM_STBASS_HPF_A1_BYTE2 0x210f |
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| 144 | #define DSM_STBASS_HPF_A2_BYTE0 0x2111 |
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| 145 | #define DSM_STBASS_HPF_A2_BYTE1 0x2112 |
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| 146 | #define DSM_STBASS_HPF_A2_BYTE2 0x2113 |
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| 147 | #define DSM_STBASS_LPF_B0_BYTE0 0x2115 |
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| 148 | #define DSM_STBASS_LPF_B0_BYTE1 0x2116 |
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| 149 | #define DSM_STBASS_LPF_B0_BYTE2 0x2117 |
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| 150 | #define DSM_STBASS_LPF_B1_BYTE0 0x2119 |
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| 151 | #define DSM_STBASS_LPF_B1_BYTE1 0x211a |
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| 152 | #define DSM_STBASS_LPF_B1_BYTE2 0x211b |
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| 153 | #define DSM_STBASS_LPF_B2_BYTE0 0x211d |
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| 154 | #define DSM_STBASS_LPF_B2_BYTE1 0x211e |
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| 155 | #define DSM_STBASS_LPF_B2_BYTE2 0x211f |
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| 156 | #define DSM_STBASS_LPF_A1_BYTE0 0x2121 |
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| 157 | #define DSM_STBASS_LPF_A1_BYTE1 0x2122 |
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| 158 | #define DSM_STBASS_LPF_A1_BYTE2 0x2123 |
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| 159 | #define DSM_STBASS_LPF_A2_BYTE0 0x2125 |
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| 160 | #define DSM_STBASS_LPF_A2_BYTE1 0x2126 |
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| 161 | #define DSM_STBASS_LPF_A2_BYTE2 0x2127 |
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| 162 | #define DSM_EQ_BQ1_B0_BYTE0 0x2129 |
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| 163 | #define DSM_EQ_BQ1_B0_BYTE1 0x212a |
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| 164 | #define DSM_EQ_BQ1_B0_BYTE2 0x212b |
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| 165 | #define DSM_EQ_BQ1_B1_BYTE0 0x212d |
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| 166 | #define DSM_EQ_BQ1_B1_BYTE1 0x212e |
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| 167 | #define DSM_EQ_BQ1_B1_BYTE2 0x212f |
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| 168 | #define DSM_EQ_BQ1_B2_BYTE0 0x2131 |
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| 169 | #define DSM_EQ_BQ1_B2_BYTE1 0x2132 |
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| 170 | #define DSM_EQ_BQ1_B2_BYTE2 0x2133 |
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| 171 | #define DSM_EQ_BQ1_A1_BYTE0 0x2135 |
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| 172 | #define DSM_EQ_BQ1_A1_BYTE1 0x2136 |
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| 173 | #define DSM_EQ_BQ1_A1_BYTE2 0x2137 |
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| 174 | #define DSM_EQ_BQ1_A2_BYTE0 0x2139 |
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| 175 | #define DSM_EQ_BQ1_A2_BYTE1 0x213a |
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| 176 | #define DSM_EQ_BQ1_A2_BYTE2 0x213b |
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| 177 | #define DSM_EQ_BQ2_B0_BYTE0 0x213d |
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| 178 | #define DSM_EQ_BQ2_B0_BYTE1 0x213e |
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| 179 | #define DSM_EQ_BQ2_B0_BYTE2 0x213f |
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| 180 | #define DSM_EQ_BQ2_B1_BYTE0 0x2141 |
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| 181 | #define DSM_EQ_BQ2_B1_BYTE1 0x2142 |
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| 182 | #define DSM_EQ_BQ2_B1_BYTE2 0x2143 |
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| 183 | #define DSM_EQ_BQ2_B2_BYTE0 0x2145 |
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| 184 | #define DSM_EQ_BQ2_B2_BYTE1 0x2146 |
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| 185 | #define DSM_EQ_BQ2_B2_BYTE2 0x2147 |
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| 186 | #define DSM_EQ_BQ2_A1_BYTE0 0x2149 |
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| 187 | #define DSM_EQ_BQ2_A1_BYTE1 0x214a |
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| 188 | #define DSM_EQ_BQ2_A1_BYTE2 0x214b |
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| 189 | #define DSM_EQ_BQ2_A2_BYTE0 0x214d |
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| 190 | #define DSM_EQ_BQ2_A2_BYTE1 0x214e |
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| 191 | #define DSM_EQ_BQ2_A2_BYTE2 0x214f |
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| 192 | #define DSM_EQ_BQ3_B0_BYTE0 0x2151 |
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| 193 | #define DSM_EQ_BQ3_B0_BYTE1 0x2152 |
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| 194 | #define DSM_EQ_BQ3_B0_BYTE2 0x2153 |
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| 195 | #define DSM_EQ_BQ3_B1_BYTE0 0x2155 |
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| 196 | #define DSM_EQ_BQ3_B1_BYTE1 0x2156 |
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| 197 | #define DSM_EQ_BQ3_B1_BYTE2 0x2157 |
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| 198 | #define DSM_EQ_BQ3_B2_BYTE0 0x2159 |
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| 199 | #define DSM_EQ_BQ3_B2_BYTE1 0x215a |
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| 200 | #define DSM_EQ_BQ3_B2_BYTE2 0x215b |
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| 201 | #define DSM_EQ_BQ3_A1_BYTE0 0x215d |
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| 202 | #define DSM_EQ_BQ3_A1_BYTE1 0x215e |
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| 203 | #define DSM_EQ_BQ3_A1_BYTE2 0x215f |
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| 204 | #define DSM_EQ_BQ3_A2_BYTE0 0x2161 |
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| 205 | #define DSM_EQ_BQ3_A2_BYTE1 0x2162 |
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| 206 | #define DSM_EQ_BQ3_A2_BYTE2 0x2163 |
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| 207 | #define DSM_EQ_BQ4_B0_BYTE0 0x2165 |
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| 208 | #define DSM_EQ_BQ4_B0_BYTE1 0x2166 |
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| 209 | #define DSM_EQ_BQ4_B0_BYTE2 0x2167 |
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| 210 | #define DSM_EQ_BQ4_B1_BYTE0 0x2169 |
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| 211 | #define DSM_EQ_BQ4_B1_BYTE1 0x216a |
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| 212 | #define DSM_EQ_BQ4_B1_BYTE2 0x216b |
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| 213 | #define DSM_EQ_BQ4_B2_BYTE0 0x216d |
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| 214 | #define DSM_EQ_BQ4_B2_BYTE1 0x216e |
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| 215 | #define DSM_EQ_BQ4_B2_BYTE2 0x216f |
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| 216 | #define DSM_EQ_BQ4_A1_BYTE0 0x2171 |
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| 217 | #define DSM_EQ_BQ4_A1_BYTE1 0x2172 |
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| 218 | #define DSM_EQ_BQ4_A1_BYTE2 0x2173 |
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| 219 | #define DSM_EQ_BQ4_A2_BYTE0 0x2175 |
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| 220 | #define DSM_EQ_BQ4_A2_BYTE1 0x2176 |
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| 221 | #define DSM_EQ_BQ4_A2_BYTE2 0x2177 |
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| 222 | #define DSM_EQ_BQ5_B0_BYTE0 0x2179 |
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| 223 | #define DSM_EQ_BQ5_B0_BYTE1 0x217a |
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| 224 | #define DSM_EQ_BQ5_B0_BYTE2 0x217b |
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| 225 | #define DSM_EQ_BQ5_B1_BYTE0 0x217d |
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| 226 | #define DSM_EQ_BQ5_B1_BYTE1 0x217e |
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| 227 | #define DSM_EQ_BQ5_B1_BYTE2 0x217f |
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| 228 | #define DSM_EQ_BQ5_B2_BYTE0 0x2181 |
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| 229 | #define DSM_EQ_BQ5_B2_BYTE1 0x2182 |
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| 230 | #define DSM_EQ_BQ5_B2_BYTE2 0x2183 |
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| 231 | #define DSM_EQ_BQ5_A1_BYTE0 0x2185 |
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| 232 | #define DSM_EQ_BQ5_A1_BYTE1 0x2186 |
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| 233 | #define DSM_EQ_BQ5_A1_BYTE2 0x2187 |
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| 234 | #define DSM_EQ_BQ5_A2_BYTE0 0x2189 |
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| 235 | #define DSM_EQ_BQ5_A2_BYTE1 0x218a |
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| 236 | #define DSM_EQ_BQ5_A2_BYTE2 0x218b |
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| 237 | #define DSM_EQ_BQ6_B0_BYTE0 0x218d |
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| 238 | #define DSM_EQ_BQ6_B0_BYTE1 0x218e |
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| 239 | #define DSM_EQ_BQ6_B0_BYTE2 0x218f |
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| 240 | #define DSM_EQ_BQ6_B1_BYTE0 0x2191 |
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| 241 | #define DSM_EQ_BQ6_B1_BYTE1 0x2192 |
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| 242 | #define DSM_EQ_BQ6_B1_BYTE2 0x2193 |
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| 243 | #define DSM_EQ_BQ6_B2_BYTE0 0x2195 |
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| 244 | #define DSM_EQ_BQ6_B2_BYTE1 0x2196 |
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| 245 | #define DSM_EQ_BQ6_B2_BYTE2 0x2197 |
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| 246 | #define DSM_EQ_BQ6_A1_BYTE0 0x2199 |
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| 247 | #define DSM_EQ_BQ6_A1_BYTE1 0x219a |
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| 248 | #define DSM_EQ_BQ6_A1_BYTE2 0x219b |
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| 249 | #define DSM_EQ_BQ6_A2_BYTE0 0x219d |
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| 250 | #define DSM_EQ_BQ6_A2_BYTE1 0x219e |
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| 251 | #define DSM_EQ_BQ6_A2_BYTE2 0x219f |
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| 252 | #define DSM_EQ_BQ7_B0_BYTE0 0x21a1 |
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| 253 | #define DSM_EQ_BQ7_B0_BYTE1 0x21a2 |
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| 254 | #define DSM_EQ_BQ7_B0_BYTE2 0x21a3 |
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| 255 | #define DSM_EQ_BQ7_B1_BYTE0 0x21a5 |
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| 256 | #define DSM_EQ_BQ7_B1_BYTE1 0x21a6 |
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| 257 | #define DSM_EQ_BQ7_B1_BYTE2 0x21a7 |
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| 258 | #define DSM_EQ_BQ7_B2_BYTE0 0x21a9 |
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| 259 | #define DSM_EQ_BQ7_B2_BYTE1 0x21aa |
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| 260 | #define DSM_EQ_BQ7_B2_BYTE2 0x21ab |
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| 261 | #define DSM_EQ_BQ7_A1_BYTE0 0x21ad |
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| 262 | #define DSM_EQ_BQ7_A1_BYTE1 0x21ae |
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| 263 | #define DSM_EQ_BQ7_A1_BYTE2 0x21af |
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| 264 | #define DSM_EQ_BQ7_A2_BYTE0 0x21b1 |
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| 265 | #define DSM_EQ_BQ7_A2_BYTE1 0x21b2 |
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| 266 | #define DSM_EQ_BQ7_A2_BYTE2 0x21b3 |
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| 267 | #define DSM_EQ_BQ8_B0_BYTE0 0x21b5 |
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| 268 | #define DSM_EQ_BQ8_B0_BYTE1 0x21b6 |
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| 269 | #define DSM_EQ_BQ8_B0_BYTE2 0x21b7 |
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| 270 | #define DSM_EQ_BQ8_B1_BYTE0 0x21b9 |
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| 271 | #define DSM_EQ_BQ8_B1_BYTE1 0x21ba |
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| 272 | #define DSM_EQ_BQ8_B1_BYTE2 0x21bb |
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| 273 | #define DSM_EQ_BQ8_B2_BYTE0 0x21bd |
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| 274 | #define DSM_EQ_BQ8_B2_BYTE1 0x21be |
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| 275 | #define DSM_EQ_BQ8_B2_BYTE2 0x21bf |
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| 276 | #define DSM_EQ_BQ8_A1_BYTE0 0x21c1 |
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| 277 | #define DSM_EQ_BQ8_A1_BYTE1 0x21c2 |
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| 278 | #define DSM_EQ_BQ8_A1_BYTE2 0x21c3 |
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| 279 | #define DSM_EQ_BQ8_A2_BYTE0 0x21c5 |
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| 280 | #define DSM_EQ_BQ8_A2_BYTE1 0x21c6 |
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| 281 | #define DSM_EQ_BQ8_A2_BYTE2 0x21c7 |
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| 282 | #define DSM_LFX_BQ_B0_BYTE0 0x21c9 |
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| 283 | #define DSM_LFX_BQ_B0_BYTE1 0x21ca |
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| 284 | #define DSM_LFX_BQ_B0_BYTE2 0x21cb |
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| 285 | #define DSM_LFX_BQ_B1_BYTE0 0x21cd |
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| 286 | #define DSM_LFX_BQ_B1_BYTE1 0x21ce |
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| 287 | #define DSM_LFX_BQ_B1_BYTE2 0x21cf |
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| 288 | #define DSM_LFX_BQ_B2_BYTE0 0x21d1 |
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| 289 | #define DSM_LFX_BQ_B2_BYTE1 0x21d2 |
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| 290 | #define DSM_LFX_BQ_B2_BYTE2 0x21d3 |
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| 291 | #define DSM_LFX_BQ_A1_BYTE0 0x21d5 |
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| 292 | #define DSM_LFX_BQ_A1_BYTE1 0x21d6 |
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| 293 | #define DSM_LFX_BQ_A1_BYTE2 0x21d7 |
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| 294 | #define DSM_LFX_BQ_A2_BYTE0 0x21d9 |
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| 295 | #define DSM_LFX_BQ_A2_BYTE1 0x21da |
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| 296 | #define DSM_LFX_BQ_A2_BYTE2 0x21db |
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| 297 | #define DSM_PPR_HPF_B0_BYTE0 0x21dd |
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| 298 | #define DSM_PPR_HPF_B0_BYTE1 0x21de |
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| 299 | #define DSM_PPR_HPF_B0_BYTE2 0x21df |
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| 300 | #define DSM_PPR_HPF_B1_BYTE0 0x21e1 |
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| 301 | #define DSM_PPR_HPF_B1_BYTE1 0x21e2 |
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| 302 | #define DSM_PPR_HPF_B1_BYTE2 0x21e3 |
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| 303 | #define DSM_PPR_HPF_B2_BYTE0 0x21e5 |
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| 304 | #define DSM_PPR_HPF_B2_BYTE1 0x21e6 |
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| 305 | #define DSM_PPR_HPF_B2_BYTE2 0x21e7 |
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| 306 | #define DSM_PPR_HPF_A1_BYTE0 0x21e9 |
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| 307 | #define DSM_PPR_HPF_A1_BYTE1 0x21ea |
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| 308 | #define DSM_PPR_HPF_A1_BYTE2 0x21eb |
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| 309 | #define DSM_PPR_HPF_A2_BYTE0 0x21ed |
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| 310 | #define DSM_PPR_HPF_A2_BYTE1 0x21ee |
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| 311 | #define DSM_PPR_HPF_A2_BYTE2 0x21ef |
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| 312 | #define DSM_PPR_LPF_B0_BYTE0 0x21f1 |
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| 313 | #define DSM_PPR_LPF_B0_BYTE1 0x21f2 |
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| 314 | #define DSM_PPR_LPF_B0_BYTE2 0x21f3 |
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| 315 | #define DSM_PPR_LPF_B1_BYTE0 0x21f5 |
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| 316 | #define DSM_PPR_LPF_B1_BYTE1 0x21f6 |
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| 317 | #define DSM_PPR_LPF_B1_BYTE2 0x21f7 |
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| 318 | #define DSM_PPR_LPF_B2_BYTE0 0x21f9 |
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| 319 | #define DSM_PPR_LPF_B2_BYTE1 0x21fa |
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| 320 | #define DSM_PPR_LPF_B2_BYTE2 0x21fb |
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| 321 | #define DSM_PPR_LPF_A1_BYTE0 0x21fd |
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| 322 | #define DSM_PPR_LPF_A1_BYTE1 0x21fe |
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| 323 | #define DSM_PPR_LPF_A1_BYTE2 0x21ff |
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| 324 | #define DSM_PPR_LPF_A2_BYTE0 0x2201 |
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| 325 | #define DSM_PPR_LPF_A2_BYTE1 0x2202 |
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| 326 | #define DSM_PPR_LPF_A2_BYTE2 0x2203 |
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| 327 | #define DSM_SPL_BQ_B0_BYTE0 0x2205 |
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| 328 | #define DSM_SPL_BQ_B0_BYTE1 0x2206 |
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| 329 | #define DSM_SPL_BQ_B0_BYTE2 0x2207 |
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| 330 | #define DSM_SPL_BQ_B1_BYTE0 0x2209 |
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| 331 | #define DSM_SPL_BQ_B1_BYTE1 0x220a |
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| 332 | #define DSM_SPL_BQ_B1_BYTE2 0x220b |
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| 333 | #define DSM_SPL_BQ_B2_BYTE0 0x220d |
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| 334 | #define DSM_SPL_BQ_B2_BYTE1 0x220e |
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| 335 | #define DSM_SPL_BQ_B2_BYTE2 0x220f |
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| 336 | #define DSM_SPL_BQ_A1_BYTE0 0x2211 |
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| 337 | #define DSM_SPL_BQ_A1_BYTE1 0x2212 |
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| 338 | #define DSM_SPL_BQ_A1_BYTE2 0x2213 |
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| 339 | #define DSM_SPL_BQ_A2_BYTE0 0x2215 |
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| 340 | #define DSM_SPL_BQ_A2_BYTE1 0x2216 |
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| 341 | #define DSM_SPL_BQ_A2_BYTE2 0x2217 |
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| 342 | #define DSM_EXCUR_BQ_B0_BYTE0 0x2219 |
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| 343 | #define DSM_EXCUR_BQ_B0_BYTE1 0x221a |
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| 344 | #define DSM_EXCUR_BQ_B0_BYTE2 0x221b |
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| 345 | #define DSM_EXCUR_BQ_B1_BYTE0 0x221d |
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| 346 | #define DSM_EXCUR_BQ_B1_BYTE1 0x221e |
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| 347 | #define DSM_EXCUR_BQ_B1_BYTE2 0x221f |
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| 348 | #define DSM_EXCUR_BQ_B2_BYTE0 0x2221 |
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| 349 | #define DSM_EXCUR_BQ_B2_BYTE1 0x2222 |
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| 350 | #define DSM_EXCUR_BQ_B2_BYTE2 0x2223 |
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| 351 | #define DSM_EXCUR_BQ_A1_BYTE0 0x2225 |
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| 352 | #define DSM_EXCUR_BQ_A1_BYTE1 0x2226 |
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| 353 | #define DSM_EXCUR_BQ_A1_BYTE2 0x2227 |
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| 354 | #define DSM_EXCUR_BQ_A2_BYTE0 0x2229 |
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| 355 | #define DSM_EXCUR_BQ_A2_BYTE1 0x222a |
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| 356 | #define DSM_EXCUR_BQ_A2_BYTE2 0x222b |
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| 357 | #define DSM_EXCPROT_HPF1_B0_BYTE0 0x222d |
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| 358 | #define DSM_EXCPROT_HPF1_B0_BYTE1 0x222e |
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| 359 | #define DSM_EXCPROT_HPF1_B0_BYTE2 0x222f |
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| 360 | #define DSM_EXCPROT_HPF1_B1_BYTE0 0x2231 |
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| 361 | #define DSM_EXCPROT_HPF1_B1_BYTE1 0x2232 |
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| 362 | #define DSM_EXCPROT_HPF1_B1_BYTE2 0x2233 |
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| 363 | #define DSM_EXCPROT_HPF1_B2_BYTE0 0x2235 |
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| 364 | #define DSM_EXCPROT_HPF1_B2_BYTE1 0x2236 |
|---|
| 365 | #define DSM_EXCPROT_HPF1_B2_BYTE2 0x2237 |
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| 366 | #define DSM_EXCPROT_HPF1_A1_BYTE0 0x2239 |
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| 367 | #define DSM_EXCPROT_HPF1_A1_BYTE1 0x223a |
|---|
| 368 | #define DSM_EXCPROT_HPF1_A1_BYTE2 0x223b |
|---|
| 369 | #define DSM_EXCPROT_HPF1_A2_BYTE0 0x223d |
|---|
| 370 | #define DSM_EXCPROT_HPF1_A2_BYTE1 0x223e |
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| 371 | #define DSM_EXCPROT_HPF1_A2_BYTE2 0x223f |
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| 372 | #define DSM_EXCPROT_HPF2_B0_BYTE0 0x2241 |
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| 373 | #define DSM_EXCPROT_HPF2_B0_BYTE1 0x2242 |
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| 374 | #define DSM_EXCPROT_HPF2_B0_BYTE2 0x2243 |
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| 375 | #define DSM_EXCPROT_HPF2_B1_BYTE0 0x2245 |
|---|
| 376 | #define DSM_EXCPROT_HPF2_B1_BYTE1 0x2246 |
|---|
| 377 | #define DSM_EXCPROT_HPF2_B1_BYTE2 0x2247 |
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| 378 | #define DSM_EXCPROT_HPF2_B2_BYTE0 0x2249 |
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| 379 | #define DSM_EXCPROT_HPF2_B2_BYTE1 0x224a |
|---|
| 380 | #define DSM_EXCPROT_HPF2_B2_BYTE2 0x224b |
|---|
| 381 | #define DSM_EXCPROT_HPF2_A1_BYTE0 0x224d |
|---|
| 382 | #define DSM_EXCPROT_HPF2_A1_BYTE1 0x224e |
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| 383 | #define DSM_EXCPROT_HPF2_A1_BYTE2 0x224f |
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| 384 | #define DSM_EXCPROT_HPF2_A2_BYTE0 0x2251 |
|---|
| 385 | #define DSM_EXCPROT_HPF2_A2_BYTE1 0x2252 |
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| 386 | #define DSM_EXCPROT_HPF2_A2_BYTE2 0x2253 |
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| 387 | #define DSM_EXCPROT_HPF3_B0_BYTE0 0x2255 |
|---|
| 388 | #define DSM_EXCPROT_HPF3_B0_BYTE1 0x2256 |
|---|
| 389 | #define DSM_EXCPROT_HPF3_B0_BYTE2 0x2257 |
|---|
| 390 | #define DSM_EXCPROT_HPF3_B1_BYTE0 0x2259 |
|---|
| 391 | #define DSM_EXCPROT_HPF3_B1_BYTE1 0x225a |
|---|
| 392 | #define DSM_EXCPROT_HPF3_B1_BYTE2 0x225b |
|---|
| 393 | #define DSM_EXCPROT_HPF3_B2_BYTE0 0x225d |
|---|
| 394 | #define DSM_EXCPROT_HPF3_B2_BYTE1 0x225e |
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| 395 | #define DSM_EXCPROT_HPF3_B2_BYTE2 0x225f |
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| 396 | #define DSM_EXCPROT_HPF3_A1_BYTE0 0x2261 |
|---|
| 397 | #define DSM_EXCPROT_HPF3_A1_BYTE1 0x2262 |
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| 398 | #define DSM_EXCPROT_HPF3_A1_BYTE2 0x2263 |
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| 399 | #define DSM_EXCPROT_HPF3_A2_BYTE0 0x2265 |
|---|
| 400 | #define DSM_EXCPROT_HPF3_A2_BYTE1 0x2266 |
|---|
| 401 | #define DSM_EXCPROT_HPF3_A2_BYTE2 0x2267 |
|---|
| 402 | #define DSM_EXCPROT_HPF4_B0_BYTE0 0x2269 |
|---|
| 403 | #define DSM_EXCPROT_HPF4_B0_BYTE1 0x226a |
|---|
| 404 | #define DSM_EXCPROT_HPF4_B0_BYTE2 0x226b |
|---|
| 405 | #define DSM_EXCPROT_HPF4_B1_BYTE0 0x226d |
|---|
| 406 | #define DSM_EXCPROT_HPF4_B1_BYTE1 0x226e |
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| 407 | #define DSM_EXCPROT_HPF4_B1_BYTE2 0x226f |
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| 408 | #define DSM_EXCPROT_HPF4_B2_BYTE0 0x2271 |
|---|
| 409 | #define DSM_EXCPROT_HPF4_B2_BYTE1 0x2272 |
|---|
| 410 | #define DSM_EXCPROT_HPF4_B2_BYTE2 0x2273 |
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| 411 | #define DSM_EXCPROT_HPF4_A1_BYTE0 0x2275 |
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| 412 | #define DSM_EXCPROT_HPF4_A1_BYTE1 0x2276 |
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| 413 | #define DSM_EXCPROT_HPF4_A1_BYTE2 0x2277 |
|---|
| 414 | #define DSM_EXCPROT_HPF4_A2_BYTE0 0x2279 |
|---|
| 415 | #define DSM_EXCPROT_HPF4_A2_BYTE1 0x227a |
|---|
| 416 | #define DSM_EXCPROT_HPF4_A2_BYTE2 0x227b |
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| 417 | #define DSM_EXCPROT_HPF5_B0_BYTE0 0x227d |
|---|
| 418 | #define DSM_EXCPROT_HPF5_B0_BYTE1 0x227e |
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| 419 | #define DSM_EXCPROT_HPF5_B0_BYTE2 0x227f |
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| 420 | #define DSM_EXCPROT_HPF5_B1_BYTE0 0x2281 |
|---|
| 421 | #define DSM_EXCPROT_HPF5_B1_BYTE1 0x2282 |
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| 422 | #define DSM_EXCPROT_HPF5_B1_BYTE2 0x2283 |
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| 423 | #define DSM_EXCPROT_HPF5_B2_BYTE0 0x2285 |
|---|
| 424 | #define DSM_EXCPROT_HPF5_B2_BYTE1 0x2286 |
|---|
| 425 | #define DSM_EXCPROT_HPF5_B2_BYTE2 0x2287 |
|---|
| 426 | #define DSM_EXCPROT_HPF5_A1_BYTE0 0x2289 |
|---|
| 427 | #define DSM_EXCPROT_HPF5_A1_BYTE1 0x228a |
|---|
| 428 | #define DSM_EXCPROT_HPF5_A1_BYTE2 0x228b |
|---|
| 429 | #define DSM_EXCPROT_HPF5_A2_BYTE0 0x228d |
|---|
| 430 | #define DSM_EXCPROT_HPF5_A2_BYTE1 0x228e |
|---|
| 431 | #define DSM_EXCPROT_HPF5_A2_BYTE2 0x228f |
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| 432 | #define DSM_DEBUZZ_BPF_B0_BYTE0 0x2291 |
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| 433 | #define DSM_DEBUZZ_BPF_B0_BYTE1 0x2292 |
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| 434 | #define DSM_DEBUZZ_BPF_B0_BYTE2 0x2293 |
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| 435 | #define DSM_DEBUZZ_BPF_B1_BYTE0 0x2295 |
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| 436 | #define DSM_DEBUZZ_BPF_B1_BYTE1 0x2296 |
|---|
| 437 | #define DSM_DEBUZZ_BPF_B1_BYTE2 0x2297 |
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| 438 | #define DSM_DEBUZZ_BPF_B2_BYTE0 0x2299 |
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| 439 | #define DSM_DEBUZZ_BPF_B2_BYTE1 0x229a |
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| 440 | #define DSM_DEBUZZ_BPF_B2_BYTE2 0x229b |
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| 441 | #define DSM_DEBUZZ_BPF_A1_BYTE0 0x229d |
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| 442 | #define DSM_DEBUZZ_BPF_A1_BYTE1 0x229e |
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| 443 | #define DSM_DEBUZZ_BPF_A1_BYTE2 0x229f |
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| 444 | #define DSM_DEBUZZ_BPF_A2_BYTE0 0x22a1 |
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| 445 | #define DSM_DEBUZZ_BPF_A2_BYTE1 0x22a2 |
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| 446 | #define DSM_DEBUZZ_BPF_A2_BYTE2 0x22a3 |
|---|
| 447 | #define DSM_DEBUZZ_PORT_B0_BYTE0 0x22a5 |
|---|
| 448 | #define DSM_DEBUZZ_PORT_B0_BYTE1 0x22a6 |
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| 449 | #define DSM_DEBUZZ_PORT_B0_BYTE2 0x22a7 |
|---|
| 450 | #define DSM_DEBUZZ_PORT_B1_BYTE0 0x22a9 |
|---|
| 451 | #define DSM_DEBUZZ_PORT_B1_BYTE1 0x22aa |
|---|
| 452 | #define DSM_DEBUZZ_PORT_B1_BYTE2 0x22ab |
|---|
| 453 | #define DSM_DEBUZZ_PORT_B2_BYTE0 0x22ad |
|---|
| 454 | #define DSM_DEBUZZ_PORT_B2_BYTE1 0x22ae |
|---|
| 455 | #define DSM_DEBUZZ_PORT_B2_BYTE2 0x22af |
|---|
| 456 | #define DSM_DEBUZZ_PORT_A1_BYTE0 0x22b1 |
|---|
| 457 | #define DSM_DEBUZZ_PORT_A1_BYTE1 0x22b2 |
|---|
| 458 | #define DSM_DEBUZZ_PORT_A1_BYTE2 0x22b3 |
|---|
| 459 | #define DSM_DEBUZZ_PORT_A2_BYTE0 0x22b5 |
|---|
| 460 | #define DSM_DEBUZZ_PORT_A2_BYTE1 0x22b6 |
|---|
| 461 | #define DSM_DEBUZZ_PORT_A2_BYTE2 0x22b7 |
|---|
| 462 | #define DSM_DEBUZZ_NOTCH_B0_BYTE0 0x22b9 |
|---|
| 463 | #define DSM_DEBUZZ_NOTCH_B0_BYTE1 0x22ba |
|---|
| 464 | #define DSM_DEBUZZ_NOTCH_B0_BYTE2 0x22bb |
|---|
| 465 | #define DSM_DEBUZZ_NOTCH_B1_BYTE0 0x22bd |
|---|
| 466 | #define DSM_DEBUZZ_NOTCH_B1_BYTE1 0x22be |
|---|
| 467 | #define DSM_DEBUZZ_NOTCH_B1_BYTE2 0x22bf |
|---|
| 468 | #define DSM_DEBUZZ_NOTCH_B2_BYTE0 0x22c1 |
|---|
| 469 | #define DSM_DEBUZZ_NOTCH_B2_BYTE1 0x22c2 |
|---|
| 470 | #define DSM_DEBUZZ_NOTCH_B2_BYTE2 0x22c3 |
|---|
| 471 | #define DSM_DEBUZZ_NOTCH_A1_BYTE0 0x22c5 |
|---|
| 472 | #define DSM_DEBUZZ_NOTCH_A1_BYTE1 0x22c6 |
|---|
| 473 | #define DSM_DEBUZZ_NOTCH_A1_BYTE2 0x22c7 |
|---|
| 474 | #define DSM_DEBUZZ_NOTCH_A2_BYTE0 0x22c9 |
|---|
| 475 | #define DSM_DEBUZZ_NOTCH_A2_BYTE1 0x22ca |
|---|
| 476 | #define DSM_DEBUZZ_NOTCH_A2_BYTE2 0x22cb |
|---|
| 477 | #define DSM_THERMAL_BQ_B0_BYTE0 0x22cd |
|---|
| 478 | #define DSM_THERMAL_BQ_B0_BYTE1 0x22ce |
|---|
| 479 | #define DSM_THERMAL_BQ_B0_BYTE2 0x22cf |
|---|
| 480 | #define DSM_THERMAL_BQ_B1_BYTE0 0x22d1 |
|---|
| 481 | #define DSM_THERMAL_BQ_B1_BYTE1 0x22d2 |
|---|
| 482 | #define DSM_THERMAL_BQ_B1_BYTE2 0x22d3 |
|---|
| 483 | #define DSM_THERMAL_BQ_B2_BYTE0 0x22d5 |
|---|
| 484 | #define DSM_THERMAL_BQ_B2_BYTE1 0x22d6 |
|---|
| 485 | #define DSM_THERMAL_BQ_B2_BYTE2 0x22d7 |
|---|
| 486 | #define DSM_THERMAL_BQ_A1_BYTE0 0x22d9 |
|---|
| 487 | #define DSM_THERMAL_BQ_A1_BYTE1 0x22da |
|---|
| 488 | #define DSM_THERMAL_BQ_A1_BYTE2 0x22db |
|---|
| 489 | #define DSM_THERMAL_BQ_A2_BYTE0 0x22dd |
|---|
| 490 | #define DSM_THERMAL_BQ_A2_BYTE1 0x22de |
|---|
| 491 | #define DSM_THERMAL_BQ_A2_BYTE2 0x22df |
|---|
| 492 | #define DSM_WBDRC_FILT1_B0_BYTE0 0x22e1 |
|---|
| 493 | #define DSM_WBDRC_FILT1_B0_BYTE1 0x22e2 |
|---|
| 494 | #define DSM_WBDRC_FILT1_B0_BYTE2 0x22e3 |
|---|
| 495 | #define DSM_WBDRC_FILT1_B1_BYTE0 0x22e5 |
|---|
| 496 | #define DSM_WBDRC_FILT1_B1_BYTE1 0x22e6 |
|---|
| 497 | #define DSM_WBDRC_FILT1_B1_BYTE2 0x22e7 |
|---|
| 498 | #define DSM_WBDRC_FILT1_B2_BYTE0 0x22e9 |
|---|
| 499 | #define DSM_WBDRC_FILT1_B2_BYTE1 0x22ea |
|---|
| 500 | #define DSM_WBDRC_FILT1_B2_BYTE2 0x22eb |
|---|
| 501 | #define DSM_WBDRC_FILT1_A1_BYTE0 0x22ed |
|---|
| 502 | #define DSM_WBDRC_FILT1_A1_BYTE1 0x22ee |
|---|
| 503 | #define DSM_WBDRC_FILT1_A1_BYTE2 0x22ef |
|---|
| 504 | #define DSM_WBDRC_FILT1_A2_BYTE0 0x22f1 |
|---|
| 505 | #define DSM_WBDRC_FILT1_A2_BYTE1 0x22f2 |
|---|
| 506 | #define DSM_WBDRC_FILT1_A2_BYTE2 0x22f3 |
|---|
| 507 | #define DSM_WBDRC_FILT2_B0_BYTE0 0x22f5 |
|---|
| 508 | #define DSM_WBDRC_FILT2_B0_BYTE1 0x22f6 |
|---|
| 509 | #define DSM_WBDRC_FILT2_B0_BYTE2 0x22f7 |
|---|
| 510 | #define DSM_WBDRC_FILT2_B1_BYTE0 0x22f9 |
|---|
| 511 | #define DSM_WBDRC_FILT2_B1_BYTE1 0x22fa |
|---|
| 512 | #define DSM_WBDRC_FILT2_B1_BYTE2 0x22fb |
|---|
| 513 | #define DSM_WBDRC_FILT2_B2_BYTE0 0x22fd |
|---|
| 514 | #define DSM_WBDRC_FILT2_B2_BYTE1 0x22fe |
|---|
| 515 | #define DSM_WBDRC_FILT2_B2_BYTE2 0x22ff |
|---|
| 516 | #define DSM_WBDRC_FILT2_A1_BYTE0 0x2301 |
|---|
| 517 | #define DSM_WBDRC_FILT2_A1_BYTE1 0x2302 |
|---|
| 518 | #define DSM_WBDRC_FILT2_A1_BYTE2 0x2303 |
|---|
| 519 | #define DSM_WBDRC_FILT2_A2_BYTE0 0x2305 |
|---|
| 520 | #define DSM_WBDRC_FILT2_A2_BYTE1 0x2306 |
|---|
| 521 | #define DSM_WBDRC_FILT2_A2_BYTE2 0x2307 |
|---|
| 522 | #define DSM_PPR_RELEASE_TIME_BYTE0 0x2309 |
|---|
| 523 | #define DSM_PPR_RELEASE_TIME_BYTE1 0x230a |
|---|
| 524 | #define DSM_PPR_RELEASE_TIME_BYTE2 0x230b |
|---|
| 525 | #define DSM_PPR_ATTACK_TIME_BYTE0 0x230d |
|---|
| 526 | #define DSM_PPR_ATTACK_TIME_BYTE1 0x230e |
|---|
| 527 | #define DSM_PPR_ATTACK_TIME_BYTE2 0x230f |
|---|
| 528 | #define DSM_DEBUZZER_RELEASE_TIME_BYTE0 0x2311 |
|---|
| 529 | #define DSM_DEBUZZER_RELEASE_TIME_BYTE1 0x2312 |
|---|
| 530 | #define DSM_DEBUZZER_RELEASE_TIME_BYTE2 0x2313 |
|---|
| 531 | #define DSM_DEBUZZER_ATTACK_TIME_BYTE0 0x2315 |
|---|
| 532 | #define DSM_DEBUZZER_ATTACK_TIME_BYTE1 0x2316 |
|---|
| 533 | #define DSM_DEBUZZER_ATTACK_TIME_BYTE2 0x2317 |
|---|
| 534 | |
|---|
| 535 | #define DSMIG_WB_DRC_RELEASE_TIME_1 0x2380 |
|---|
| 536 | #define DSMIG_WB_DRC_RELEASE_TIME_2 0x2381 |
|---|
| 537 | #define DSMIG_WB_DRC_ATTACK_TIME_1 0x2382 |
|---|
| 538 | #define DSMIG_WB_DRC_ATTACK_TIME_2 0x2383 |
|---|
| 539 | #define DSMIG_WB_DRC_COMPRESSION_RATIO 0x2384 |
|---|
| 540 | #define DSMIG_WB_DRC_COMPRESSION_THRESHOLD 0x2385 |
|---|
| 541 | #define DSMIG_WB_DRC_MAKEUPGAIN 0x2386 |
|---|
| 542 | #define DSMIG_WB_DRC_NOISE_GATE_THRESHOLD 0x2387 |
|---|
| 543 | #define DSMIG_WBDRC_HPF_ENABLE 0x2388 |
|---|
| 544 | #define DSMIG_WB_DRC_TEST_SMOOTHER_OUT_EN 0x2389 |
|---|
| 545 | #define DSMIG_PPR_THRESHOLD 0x238b |
|---|
| 546 | #define DSM_STEREO_BASS_CHANNEL_SELECT 0x238d |
|---|
| 547 | #define DSM_TPROT_THRESHOLD_BYTE0 0x238e |
|---|
| 548 | #define DSM_TPROT_THRESHOLD_BYTE1 0x238f |
|---|
| 549 | #define DSM_TPROT_ROOM_TEMPERATURE_BYTE0 0x2390 |
|---|
| 550 | #define DSM_TPROT_ROOM_TEMPERATURE_BYTE1 0x2391 |
|---|
| 551 | #define DSM_TPROT_RECIP_RDC_ROOM_BYTE0 0x2392 |
|---|
| 552 | #define DSM_TPROT_RECIP_RDC_ROOM_BYTE1 0x2393 |
|---|
| 553 | #define DSM_TPROT_RECIP_RDC_ROOM_BYTE2 0x2394 |
|---|
| 554 | #define DSM_TPROT_RECIP_TCONST_BYTE0 0x2395 |
|---|
| 555 | #define DSM_TPROT_RECIP_TCONST_BYTE1 0x2396 |
|---|
| 556 | #define DSM_TPROT_RECIP_TCONST_BYTE2 0x2397 |
|---|
| 557 | #define DSM_THERMAL_ATTENUATION_SETTINGS 0x2398 |
|---|
| 558 | #define DSM_THERMAL_PILOT_TONE_ATTENUATION 0x2399 |
|---|
| 559 | #define DSM_TPROT_PG_TEMP_THRESH_BYTE0 0x239a |
|---|
| 560 | #define DSM_TPROT_PG_TEMP_THRESH_BYTE1 0x239b |
|---|
| 561 | |
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| 562 | #define THERMAL_RDC_RD_BACK_BYTE1 0x239c |
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| 563 | #define THERMAL_RDC_RD_BACK_BYTE0 0x239d |
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| 564 | #define THERMAL_COILTEMP_RD_BACK_BYTE1 0x239e |
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| 565 | #define THERMAL_COILTEMP_RD_BACK_BYTE0 0x239f |
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| 566 | |
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| 567 | #define DSMIG_DEBUZZER_THRESHOLD 0x23b5 |
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| 568 | #define DSMIG_DEBUZZER_ALPHA_COEF_TEST_ONLY 0x23b6 |
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| 569 | #define DSM_VOL_ENA 0x23b9 |
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| 570 | #define DSM_VOL_CTRL 0x23ba |
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| 571 | |
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| 572 | #define DSMIG_EN 0x23e0 |
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| 573 | #define MAX98390_R23E1_DSP_GLOBAL_EN 0x23e1 |
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| 574 | |
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| 575 | #define DSM_THERMAL_GAIN 0x23f0 |
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| 576 | #define DSM_PPR_GAIN 0x23f1 |
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| 577 | #define DSM_DBZ_GAIN 0x23f2 |
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| 578 | #define DSM_WBDRC_GAIN 0x23f3 |
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| 579 | |
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| 580 | #define MAX98390_R23FF_GLOBAL_EN 0x23FF |
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| 581 | #define MAX98390_R24FF_REV_ID 0x24FF |
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| 582 | |
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| 583 | /* MAX98390_R2021_PCM_RX_SRC_1 */ |
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| 584 | #define MAX98390_PCM_RX_CH_SRC_SHIFT (0) |
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| 585 | #define MAX98390_PCM_RX_CH_SRC_BASS_SHIFT (4) |
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| 586 | |
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| 587 | /* MAX98390_R2022_PCM_TX_SRC_1 */ |
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| 588 | #define MAX98390_PCM_TX_CH_SRC_A_V_SHIFT (0) |
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| 589 | #define MAX98390_PCM_TX_CH_SRC_A_I_SHIFT (4) |
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| 590 | |
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| 591 | /* MAX98390_R2024_PCM_DATA_FMT_CFG */ |
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| 592 | #define MAX98390_PCM_MODE_CFG_FORMAT_MASK (0x7 << 3) |
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| 593 | #define MAX98390_PCM_MODE_CFG_FORMAT_SHIFT (3) |
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| 594 | #define MAX98390_PCM_TX_CH_INTERLEAVE_MASK (0x1 << 2) |
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| 595 | #define MAX98390_PCM_FORMAT_I2S (0x0 << 0) |
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| 596 | #define MAX98390_PCM_FORMAT_LJ (0x1 << 0) |
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| 597 | #define MAX98390_PCM_FORMAT_TDM_MODE0 (0x3 << 0) |
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| 598 | #define MAX98390_PCM_FORMAT_TDM_MODE1 (0x4 << 0) |
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| 599 | #define MAX98390_PCM_FORMAT_TDM_MODE2 (0x5 << 0) |
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| 600 | #define MAX98390_PCM_MODE_CFG_CHANSZ_MASK (0x3 << 6) |
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| 601 | #define MAX98390_PCM_MODE_CFG_CHANSZ_16 (0x1 << 6) |
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| 602 | #define MAX98390_PCM_MODE_CFG_CHANSZ_24 (0x2 << 6) |
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| 603 | #define MAX98390_PCM_MODE_CFG_CHANSZ_32 (0x3 << 6) |
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| 604 | |
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| 605 | /* MAX98390_R2039_AMP_DSP_CFG */ |
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| 606 | #define MAX98390_AMP_DSP_CFG_RMP_UP_SHIFT (4) |
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| 607 | #define MAX98390_AMP_DSP_CFG_RMP_DN_SHIFT (5) |
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| 608 | |
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| 609 | /* MAX98390_R203A_AMP_EN */ |
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| 610 | #define MAX98390_R203A_AMP_EN_SHIFT (0) |
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| 611 | |
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| 612 | /* MAX98390_PCM_MASTER_MODE */ |
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| 613 | #define MAX98390_PCM_MASTER_MODE_MASK (0x3 << 0) |
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| 614 | #define MAX98390_PCM_MASTER_MODE_SLAVE (0x0 << 0) |
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| 615 | #define MAX98390_PCM_MASTER_MODE_MASTER (0x3 << 0) |
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| 616 | |
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| 617 | #define MAX98390_PCM_MASTER_MODE_MCLK_MASK (0xF << 2) |
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| 618 | #define MAX98390_PCM_MASTER_MODE_MCLK_RATE_SHIFT (2) |
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| 619 | |
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| 620 | /* PCM_CLK_SETUP */ |
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| 621 | #define MAX98390_PCM_MODE_CFG_PCM_BCLKEDGE (0x1 << 2) |
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| 622 | #define MAX98390_PCM_CLK_SETUP_BSEL_MASK (0xF << 0) |
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| 623 | |
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| 624 | /* PCM_SR_SETUP */ |
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| 625 | #define MAX98390_PCM_SR_SET1_SR_MASK (0xF << 0) |
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| 626 | #define MAX98390_PCM_SR_SET1_SR_8000 (0x0 << 0) |
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| 627 | #define MAX98390_PCM_SR_SET1_SR_11025 (0x1 << 0) |
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| 628 | #define MAX98390_PCM_SR_SET1_SR_12000 (0x2 << 0) |
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| 629 | #define MAX98390_PCM_SR_SET1_SR_16000 (0x3 << 0) |
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| 630 | #define MAX98390_PCM_SR_SET1_SR_22050 (0x4 << 0) |
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| 631 | #define MAX98390_PCM_SR_SET1_SR_24000 (0x5 << 0) |
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| 632 | #define MAX98390_PCM_SR_SET1_SR_32000 (0x6 << 0) |
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| 633 | #define MAX98390_PCM_SR_SET1_SR_44100 (0x7 << 0) |
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| 634 | #define MAX98390_PCM_SR_SET1_SR_48000 (0x8 << 0) |
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| 635 | |
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| 636 | /* PCM_TO_SPK_MONO_MIX_1 */ |
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| 637 | #define MAX98390_PCM_TO_SPK_MONOMIX_CFG_MASK (0x3 << 6) |
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| 638 | #define MAX98390_PCM_TO_SPK_MONOMIX_CFG_SHIFT (6) |
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| 639 | #define MAX98390_PCM_TO_SPK_CH0_SRC_MASK (0xF << 0) |
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| 640 | #define MAX98390_PCM_TO_SPK_CH1_SRC_MASK (0xF << 4) |
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| 641 | |
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| 642 | /* MAX98390_BOOST_CTRL3 */ |
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| 643 | #define MAX98390_BOOST_CLK_PHASE_CFG_SHIFT (2) |
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| 644 | |
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| 645 | /* SOFT_RESET */ |
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| 646 | #define MAX98390_SOFT_RESET_MASK (0x1 << 0) |
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| 647 | |
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| 648 | #define MAX98390_GLOBAL_EN_MASK (0x1 << 0) |
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| 649 | #define MAX98390_AMP_EN_MASK (0x1 << 0) |
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| 650 | |
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| 651 | /* DSM register offset */ |
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| 652 | #define MAX98390_DSM_PAYLOAD_OFFSET 16 |
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| 653 | #define MAX98390_DSM_PARAM_MAX_SIZE 1024 |
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| 654 | #define MAX98390_DSM_PARAM_MIN_SIZE 670 |
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| 655 | |
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| 656 | struct max98390_priv { |
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| 657 | struct regmap *regmap; |
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| 658 | unsigned int sysclk; |
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| 659 | unsigned int provider; |
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| 660 | unsigned int tdm_mode; |
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| 661 | unsigned int v_l_slot; |
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| 662 | unsigned int i_l_slot; |
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| 663 | unsigned int ref_rdc_value; |
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| 664 | unsigned int ambient_temp_value; |
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| 665 | const char *dsm_param_name; |
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| 666 | }; |
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| 667 | #endif |
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| 668 | |
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