| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * PCM3060 codec driver |
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| 4 | * |
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| 5 | * Copyright (C) 2018 Kirill Marinushkin <kmarinushkin@birdec.com> |
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| 6 | */ |
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| 7 | |
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| 8 | #ifndef _SND_SOC_PCM3060_H |
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| 9 | #define _SND_SOC_PCM3060_H |
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| 10 | |
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| 11 | #include <linux/device.h> |
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| 12 | #include <linux/regmap.h> |
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| 13 | |
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| 14 | extern const struct regmap_config pcm3060_regmap; |
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| 15 | |
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| 16 | #define PCM3060_DAI_ID_DAC 0 |
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| 17 | #define PCM3060_DAI_ID_ADC 1 |
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| 18 | #define PCM3060_DAI_IDS_NUM 2 |
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| 19 | |
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| 20 | /* ADC and DAC can be clocked from separate or same sources CLK1 and CLK2 */ |
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| 21 | #define PCM3060_CLK_DEF 0 /* default: CLK1->ADC, CLK2->DAC */ |
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| 22 | #define PCM3060_CLK1 1 |
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| 23 | #define PCM3060_CLK2 2 |
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| 24 | |
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| 25 | struct pcm3060_priv_dai { |
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| 26 | bool is_provider; |
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| 27 | unsigned int sclk_freq; |
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| 28 | }; |
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| 29 | |
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| 30 | struct pcm3060_priv { |
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| 31 | struct regmap *regmap; |
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| 32 | struct pcm3060_priv_dai dai[PCM3060_DAI_IDS_NUM]; |
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| 33 | u8 out_se: 1; |
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| 34 | }; |
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| 35 | |
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| 36 | int pcm3060_probe(struct device *dev); |
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| 37 | int pcm3060_remove(struct device *dev); |
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| 38 | |
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| 39 | /* registers */ |
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| 40 | |
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| 41 | #define PCM3060_REG64 0x40 |
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| 42 | #define PCM3060_REG_MRST 0x80 |
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| 43 | #define PCM3060_REG_SRST 0x40 |
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| 44 | #define PCM3060_REG_ADPSV 0x20 |
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| 45 | #define PCM3060_REG_SHIFT_ADPSV 0x05 |
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| 46 | #define PCM3060_REG_DAPSV 0x10 |
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| 47 | #define PCM3060_REG_SHIFT_DAPSV 0x04 |
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| 48 | #define PCM3060_REG_SE 0x01 |
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| 49 | |
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| 50 | #define PCM3060_REG65 0x41 |
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| 51 | #define PCM3060_REG66 0x42 |
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| 52 | #define PCM3060_REG_AT2_MIN 0x36 |
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| 53 | #define PCM3060_REG_AT2_MAX 0xFF |
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| 54 | |
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| 55 | #define PCM3060_REG67 0x43 |
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| 56 | #define PCM3060_REG72 0x48 |
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| 57 | #define PCM3060_REG_CSEL 0x80 |
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| 58 | #define PCM3060_REG_MASK_MS 0x70 |
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| 59 | #define PCM3060_REG_MS_S 0x00 |
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| 60 | #define PCM3060_REG_MS_M768 (0x01 << 4) |
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| 61 | #define PCM3060_REG_MS_M512 (0x02 << 4) |
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| 62 | #define PCM3060_REG_MS_M384 (0x03 << 4) |
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| 63 | #define PCM3060_REG_MS_M256 (0x04 << 4) |
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| 64 | #define PCM3060_REG_MS_M192 (0x05 << 4) |
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| 65 | #define PCM3060_REG_MS_M128 (0x06 << 4) |
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| 66 | #define PCM3060_REG_MASK_FMT 0x03 |
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| 67 | #define PCM3060_REG_FMT_I2S 0x00 |
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| 68 | #define PCM3060_REG_FMT_LJ 0x01 |
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| 69 | #define PCM3060_REG_FMT_RJ 0x02 |
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| 70 | |
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| 71 | #define PCM3060_REG68 0x44 |
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| 72 | #define PCM3060_REG_OVER 0x40 |
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| 73 | #define PCM3060_REG_DREV2 0x04 |
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| 74 | #define PCM3060_REG_SHIFT_MUT21 0x00 |
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| 75 | #define PCM3060_REG_SHIFT_MUT22 0x01 |
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| 76 | |
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| 77 | #define PCM3060_REG69 0x45 |
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| 78 | #define PCM3060_REG_FLT 0x80 |
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| 79 | #define PCM3060_REG_MASK_DMF 0x60 |
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| 80 | #define PCM3060_REG_DMC 0x10 |
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| 81 | #define PCM3060_REG_ZREV 0x02 |
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| 82 | #define PCM3060_REG_AZRO 0x01 |
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| 83 | |
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| 84 | #define PCM3060_REG70 0x46 |
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| 85 | #define PCM3060_REG71 0x47 |
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| 86 | #define PCM3060_REG_AT1_MIN 0x0E |
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| 87 | #define PCM3060_REG_AT1_MAX 0xFF |
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| 88 | |
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| 89 | #define PCM3060_REG73 0x49 |
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| 90 | #define PCM3060_REG_ZCDD 0x10 |
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| 91 | #define PCM3060_REG_BYP 0x08 |
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| 92 | #define PCM3060_REG_DREV1 0x04 |
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| 93 | #define PCM3060_REG_SHIFT_MUT11 0x00 |
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| 94 | #define PCM3060_REG_SHIFT_MUT12 0x01 |
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| 95 | |
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| 96 | #endif /* _SND_SOC_PCM3060_H */ |
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| 97 | |
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