1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * rt712-sdca.h -- RT712 SDCA ALSA SoC audio driver header |
4 | * |
5 | * Copyright(c) 2023 Realtek Semiconductor Corp. |
6 | */ |
7 | |
8 | #ifndef __RT712_H__ |
9 | #define __RT712_H__ |
10 | |
11 | #include <linux/pm.h> |
12 | #include <linux/regmap.h> |
13 | #include <linux/soundwire/sdw.h> |
14 | #include <linux/soundwire/sdw_type.h> |
15 | #include <sound/soc.h> |
16 | #include <linux/workqueue.h> |
17 | |
18 | struct rt712_sdca_priv { |
19 | struct regmap *regmap; |
20 | struct regmap *mbq_regmap; |
21 | struct snd_soc_component *component; |
22 | struct sdw_slave *slave; |
23 | struct sdw_bus_params params; |
24 | bool hw_init; |
25 | bool first_hw_init; |
26 | struct snd_soc_jack *hs_jack; |
27 | struct delayed_work jack_detect_work; |
28 | struct delayed_work jack_btn_check_work; |
29 | struct mutex calibrate_mutex; /* for headset calibration */ |
30 | struct mutex disable_irq_lock; /* SDCA irq lock protection */ |
31 | bool disable_irq; |
32 | int jack_type; |
33 | int jd_src; |
34 | unsigned int scp_sdca_stat1; |
35 | unsigned int scp_sdca_stat2; |
36 | unsigned int hw_id; |
37 | bool fu0f_dapm_mute; |
38 | bool fu0f_mixer_l_mute; |
39 | bool fu0f_mixer_r_mute; |
40 | }; |
41 | |
42 | /* NID */ |
43 | #define RT712_VENDOR_REG 0x20 |
44 | #define RT712_VENDOR_CALI 0x58 |
45 | #define RT712_ULTRA_SOUND_DET 0x59 |
46 | #define RT712_VENDOR_IMS_DRE 0x5b |
47 | #define RT712_VENDOR_ANALOG_CTL 0x5f |
48 | #define RT712_VENDOR_HDA_CTL 0x61 |
49 | |
50 | /* Index (NID:20h) */ |
51 | #define RT712_JD_PRODUCT_NUM 0x00 |
52 | #define RT712_ANALOG_BIAS_CTL3 0x04 |
53 | #define RT712_LDO2_3_CTL1 0x0e |
54 | #define RT712_PARA_VERB_CTL 0x1a |
55 | #define RT712_CC_DET1 0x24 |
56 | #define RT712_COMBO_JACK_AUTO_CTL1 0x45 |
57 | #define RT712_COMBO_JACK_AUTO_CTL2 0x46 |
58 | #define RT712_COMBO_JACK_AUTO_CTL3 0x47 |
59 | #define RT712_DIGITAL_MISC_CTRL4 0x4a |
60 | #define RT712_FSM_CTL 0x67 |
61 | #define RT712_SW_CONFIG1 0x8a |
62 | #define RT712_SW_CONFIG2 0x8b |
63 | |
64 | /* Index (NID:58h) */ |
65 | #define RT712_DAC_DC_CALI_CTL1 0x00 |
66 | #define RT712_DAC_DC_CALI_CTL2 0x01 |
67 | |
68 | /* Index (NID:59h) */ |
69 | #define RT712_ULTRA_SOUND_DETECTOR6 0x1e |
70 | |
71 | /* Index (NID:5bh) */ |
72 | #define RT712_IMS_DIGITAL_CTL1 0x00 |
73 | #define RT712_IMS_DIGITAL_CTL5 0x05 |
74 | #define RT712_HP_DETECT_RLDET_CTL1 0x29 |
75 | #define RT712_HP_DETECT_RLDET_CTL2 0x2a |
76 | |
77 | /* Index (NID:5fh) */ |
78 | #define RT712_MISC_POWER_CTL0 0x00 |
79 | #define RT712_MISC_POWER_CTL7 0x08 |
80 | |
81 | /* Index (NID:61h) */ |
82 | #define RT712_HDA_LEGACY_MUX_CTL0 0x00 |
83 | #define RT712_HDA_LEGACY_CONFIG_CTL0 0x06 |
84 | #define RT712_HDA_LEGACY_RESET_CTL 0x08 |
85 | #define RT712_HDA_LEGACY_GPIO_WAKE_EN_CTL 0x0e |
86 | #define RT712_DMIC_ENT_FLOAT_CTL 0x10 |
87 | #define RT712_DMIC_GAIN_ENT_FLOAT_CTL0 0x11 |
88 | #define RT712_DMIC_GAIN_ENT_FLOAT_CTL2 0x13 |
89 | #define RT712_ADC_ENT_FLOAT_CTL 0x15 |
90 | #define RT712_ADC_VOL_CH_FLOAT_CTL2 0x18 |
91 | #define RT712_DAC03_HP_PDE_FLOAT_CTL 0x22 |
92 | #define RT712_MIC2_LINE2_PDE_FLOAT_CTL 0x23 |
93 | #define RT712_ADC0A_08_PDE_FLOAT_CTL 0x26 |
94 | #define RT712_ADC0B_11_PDE_FLOAT_CTL 0x27 |
95 | #define RT712_DMIC1_2_PDE_FLOAT_CTL 0x2b |
96 | #define RT712_AMP_PDE_FLOAT_CTL 0x2c |
97 | #define RT712_I2S_IN_OUT_PDE_FLOAT_CTL 0x2f |
98 | #define RT712_GE_RELATED_CTL1 0x45 |
99 | #define RT712_GE_RELATED_CTL2 0x46 |
100 | #define RT712_MIXER_CTL0 0x52 |
101 | #define RT712_MIXER_CTL1 0x53 |
102 | #define RT712_EAPD_CTL 0x55 |
103 | #define RT712_UMP_HID_CTL0 0x60 |
104 | #define RT712_UMP_HID_CTL1 0x61 |
105 | #define RT712_UMP_HID_CTL2 0x62 |
106 | #define RT712_UMP_HID_CTL3 0x63 |
107 | #define RT712_UMP_HID_CTL4 0x64 |
108 | #define RT712_UMP_HID_CTL5 0x65 |
109 | #define RT712_UMP_HID_CTL6 0x66 |
110 | #define RT712_UMP_HID_CTL7 0x67 |
111 | #define RT712_UMP_HID_CTL8 0x68 |
112 | |
113 | /* Parameter & Verb control 01 (0x1a)(NID:20h) */ |
114 | #define RT712_HIDDEN_REG_SW_RESET (0x1 << 14) |
115 | |
116 | /* combo jack auto switch control 2 (0x46)(NID:20h) */ |
117 | #define RT712_COMBOJACK_AUTO_DET_STATUS (0x1 << 11) |
118 | #define RT712_COMBOJACK_AUTO_DET_TRS (0x1 << 10) |
119 | #define RT712_COMBOJACK_AUTO_DET_CTIA (0x1 << 9) |
120 | #define RT712_COMBOJACK_AUTO_DET_OMTP (0x1 << 8) |
121 | |
122 | /* DAC DC offset calibration control-1 (0x00)(NID:58h) */ |
123 | #define RT712_DAC_DC_CALI_TRIGGER (0x1 << 15) |
124 | |
125 | #define RT712_EAPD_HIGH 0x2 |
126 | #define RT712_EAPD_LOW 0x0 |
127 | |
128 | /* RC Calibration register */ |
129 | #define RT712_RC_CAL 0x3201 |
130 | |
131 | /* Buffer address for HID */ |
132 | #define RT712_BUF_ADDR_HID1 0x44030000 |
133 | #define RT712_BUF_ADDR_HID2 0x44030020 |
134 | |
135 | /* RT712 SDCA Control - function number */ |
136 | #define FUNC_NUM_JACK_CODEC 0x01 |
137 | #define FUNC_NUM_MIC_ARRAY 0x02 |
138 | #define FUNC_NUM_HID 0x03 |
139 | #define FUNC_NUM_AMP 0x04 |
140 | |
141 | /* RT712 SDCA entity */ |
142 | #define RT712_SDCA_ENT_HID01 0x01 |
143 | #define RT712_SDCA_ENT_GE49 0x49 |
144 | #define RT712_SDCA_ENT_USER_FU05 0x05 |
145 | #define RT712_SDCA_ENT_USER_FU06 0x06 |
146 | #define RT712_SDCA_ENT_USER_FU0F 0x0f |
147 | #define RT712_SDCA_ENT_USER_FU10 0x19 |
148 | #define RT712_SDCA_ENT_USER_FU1E 0x1e |
149 | #define RT712_SDCA_ENT_FU15 0x15 |
150 | #define RT712_SDCA_ENT_PDE23 0x23 |
151 | #define RT712_SDCA_ENT_PDE40 0x40 |
152 | #define RT712_SDCA_ENT_PDE11 0x11 |
153 | #define RT712_SDCA_ENT_PDE12 0x12 |
154 | #define RT712_SDCA_ENT_CS01 0x01 |
155 | #define RT712_SDCA_ENT_CS11 0x11 |
156 | #define RT712_SDCA_ENT_CS1F 0x1f |
157 | #define RT712_SDCA_ENT_CS1C 0x1c |
158 | #define RT712_SDCA_ENT_CS31 0x31 |
159 | #define RT712_SDCA_ENT_OT23 0x42 |
160 | #define RT712_SDCA_ENT_IT26 0x26 |
161 | #define RT712_SDCA_ENT_IT09 0x09 |
162 | #define RT712_SDCA_ENT_PLATFORM_FU15 0x15 |
163 | #define RT712_SDCA_ENT_PLATFORM_FU44 0x44 |
164 | |
165 | /* RT712 SDCA control */ |
166 | #define RT712_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10 |
167 | #define RT712_SDCA_CTL_FU_MUTE 0x01 |
168 | #define RT712_SDCA_CTL_FU_VOLUME 0x02 |
169 | #define RT712_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10 |
170 | #define RT712_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11 |
171 | #define RT712_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12 |
172 | #define RT712_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13 |
173 | #define RT712_SDCA_CTL_SELECTED_MODE 0x01 |
174 | #define RT712_SDCA_CTL_DETECTED_MODE 0x02 |
175 | #define RT712_SDCA_CTL_REQ_POWER_STATE 0x01 |
176 | #define RT712_SDCA_CTL_VENDOR_DEF 0x30 |
177 | #define RT712_SDCA_CTL_FU_CH_GAIN 0x0b |
178 | |
179 | /* RT712 SDCA channel */ |
180 | #define CH_L 0x01 |
181 | #define CH_R 0x02 |
182 | |
183 | /* sample frequency index */ |
184 | #define RT712_SDCA_RATE_16000HZ 0x04 |
185 | #define RT712_SDCA_RATE_32000HZ 0x07 |
186 | #define RT712_SDCA_RATE_44100HZ 0x08 |
187 | #define RT712_SDCA_RATE_48000HZ 0x09 |
188 | #define RT712_SDCA_RATE_96000HZ 0x0b |
189 | #define RT712_SDCA_RATE_192000HZ 0x0d |
190 | |
191 | enum { |
192 | RT712_AIF1, |
193 | RT712_AIF2, |
194 | }; |
195 | |
196 | enum rt712_sdca_jd_src { |
197 | RT712_JD_NULL, |
198 | RT712_JD1, |
199 | }; |
200 | |
201 | enum rt712_sdca_hw_id { |
202 | RT712_DEV_ID_712 = 0x7, |
203 | RT712_DEV_ID_713 = 0x6, |
204 | RT712_DEV_ID_716 = 0x5, |
205 | RT712_DEV_ID_717 = 0x4, |
206 | }; |
207 | |
208 | #define RT712_PART_ID_713 0x713 |
209 | |
210 | int rt712_sdca_io_init(struct device *dev, struct sdw_slave *slave); |
211 | int rt712_sdca_init(struct device *dev, struct regmap *regmap, |
212 | struct regmap *mbq_regmap, struct sdw_slave *slave); |
213 | |
214 | int rt712_sdca_jack_detect(struct rt712_sdca_priv *rt712, bool *hp, bool *mic); |
215 | #endif /* __RT712_H__ */ |
216 | |