| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * rt715.h -- RT715 ALSA SoC audio driver header |
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| 4 | * |
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| 5 | * Copyright(c) 2019 Realtek Semiconductor Corp. |
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| 6 | */ |
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| 7 | |
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| 8 | #ifndef __RT715_H__ |
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| 9 | #define __RT715_H__ |
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| 10 | |
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| 11 | #include <linux/regulator/consumer.h> |
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| 12 | |
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| 13 | struct rt715_priv { |
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| 14 | struct regmap *regmap; |
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| 15 | struct regmap *sdw_regmap; |
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| 16 | struct snd_soc_codec *codec; |
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| 17 | struct sdw_slave *slave; |
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| 18 | int dbg_nid; |
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| 19 | int dbg_vid; |
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| 20 | int dbg_payload; |
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| 21 | struct sdw_bus_params params; |
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| 22 | bool hw_init; |
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| 23 | bool first_hw_init; |
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| 24 | unsigned int kctl_2ch_vol_ori[2]; |
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| 25 | unsigned int kctl_8ch_switch_ori[8]; |
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| 26 | unsigned int kctl_8ch_vol_ori[8]; |
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| 27 | }; |
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| 28 | |
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| 29 | /* NID */ |
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| 30 | #define RT715_AUDIO_FUNCTION_GROUP 0x01 |
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| 31 | #define RT715_MIC_ADC 0x07 |
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| 32 | #define RT715_LINE_ADC 0x08 |
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| 33 | #define RT715_MIX_ADC 0x09 |
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| 34 | #define RT715_DMIC1 0x12 |
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| 35 | #define RT715_DMIC2 0x13 |
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| 36 | #define RT715_MIC1 0x18 |
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| 37 | #define RT715_MIC2 0x19 |
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| 38 | #define RT715_LINE1 0x1a |
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| 39 | #define RT715_LINE2 0x1b |
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| 40 | #define RT715_DMIC3 0x1d |
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| 41 | #define RT715_DMIC4 0x29 |
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| 42 | #define RT715_VENDOR_REGISTERS 0x20 |
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| 43 | #define RT715_MUX_IN1 0x22 |
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| 44 | #define RT715_MUX_IN2 0x23 |
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| 45 | #define RT715_MUX_IN3 0x24 |
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| 46 | #define RT715_MUX_IN4 0x25 |
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| 47 | #define RT715_MIX_ADC2 0x27 |
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| 48 | #define RT715_INLINE_CMD 0x55 |
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| 49 | |
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| 50 | /* Index (NID:20h) */ |
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| 51 | #define RT715_VD_CLEAR_CTRL 0x01 |
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| 52 | #define RT715_SDW_INPUT_SEL 0x39 |
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| 53 | #define RT715_EXT_DMIC_CLK_CTRL2 0x54 |
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| 54 | |
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| 55 | /* Verb */ |
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| 56 | #define RT715_VERB_SET_CONNECT_SEL 0x3100 |
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| 57 | #define RT715_VERB_GET_CONNECT_SEL 0xb100 |
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| 58 | #define RT715_VERB_SET_EAPD_BTLENABLE 0x3c00 |
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| 59 | #define RT715_VERB_SET_POWER_STATE 0x3500 |
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| 60 | #define RT715_VERB_SET_CHANNEL_STREAMID 0x3600 |
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| 61 | #define RT715_VERB_SET_PIN_WIDGET_CONTROL 0x3700 |
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| 62 | #define RT715_VERB_SET_CONFIG_DEFAULT1 0x4c00 |
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| 63 | #define RT715_VERB_SET_CONFIG_DEFAULT2 0x4d00 |
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| 64 | #define RT715_VERB_SET_CONFIG_DEFAULT3 0x4e00 |
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| 65 | #define RT715_VERB_SET_CONFIG_DEFAULT4 0x4f00 |
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| 66 | #define RT715_VERB_SET_UNSOLICITED_ENABLE 0x3800 |
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| 67 | #define RT715_SET_AMP_GAIN_MUTE_H 0x7300 |
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| 68 | #define RT715_SET_AMP_GAIN_MUTE_L 0x8380 |
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| 69 | #define RT715_READ_HDA_3 0x2012 |
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| 70 | #define RT715_READ_HDA_2 0x2013 |
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| 71 | #define RT715_READ_HDA_1 0x2014 |
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| 72 | #define RT715_READ_HDA_0 0x2015 |
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| 73 | #define RT715_PRIV_INDEX_W_H 0x7520 |
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| 74 | #define RT715_PRIV_INDEX_W_L 0x85a0 |
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| 75 | #define RT715_PRIV_INDEX_W_H_2 0x7500 |
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| 76 | #define RT715_PRIV_INDEX_W_L_2 0x8580 |
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| 77 | #define RT715_PRIV_DATA_W_H 0x7420 |
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| 78 | #define RT715_PRIV_DATA_W_L 0x84a0 |
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| 79 | #define RT715_PRIV_INDEX_R_H 0x9d20 |
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| 80 | #define RT715_PRIV_INDEX_R_L 0xada0 |
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| 81 | #define RT715_PRIV_DATA_R_H 0x9c20 |
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| 82 | #define RT715_PRIV_DATA_R_L 0xaca0 |
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| 83 | #define RT715_MIC_ADC_FORMAT_H 0x7207 |
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| 84 | #define RT715_MIC_ADC_FORMAT_L 0x8287 |
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| 85 | #define RT715_MIC_LINE_FORMAT_H 0x7208 |
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| 86 | #define RT715_MIC_LINE_FORMAT_L 0x8288 |
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| 87 | #define RT715_MIX_ADC_FORMAT_H 0x7209 |
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| 88 | #define RT715_MIX_ADC_FORMAT_L 0x8289 |
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| 89 | #define RT715_MIX_ADC2_FORMAT_H 0x7227 |
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| 90 | #define RT715_MIX_ADC2_FORMAT_L 0x82a7 |
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| 91 | #define RT715_FUNC_RESET 0xff01 |
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| 92 | |
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| 93 | #define RT715_SET_AUDIO_POWER_STATE\ |
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| 94 | (RT715_VERB_SET_POWER_STATE | RT715_AUDIO_FUNCTION_GROUP) |
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| 95 | #define RT715_SET_PIN_DMIC1\ |
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| 96 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC1) |
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| 97 | #define RT715_SET_PIN_DMIC2\ |
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| 98 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC2) |
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| 99 | #define RT715_SET_PIN_DMIC3\ |
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| 100 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC3) |
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| 101 | #define RT715_SET_PIN_DMIC4\ |
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| 102 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC4) |
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| 103 | #define RT715_SET_PIN_MIC1\ |
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| 104 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_MIC1) |
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| 105 | #define RT715_SET_PIN_MIC2\ |
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| 106 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_MIC2) |
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| 107 | #define RT715_SET_PIN_LINE1\ |
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| 108 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_LINE1) |
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| 109 | #define RT715_SET_PIN_LINE2\ |
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| 110 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_LINE2) |
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| 111 | #define RT715_SET_MIC1_UNSOLICITED_ENABLE\ |
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| 112 | (RT715_VERB_SET_UNSOLICITED_ENABLE | RT715_MIC1) |
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| 113 | #define RT715_SET_MIC2_UNSOLICITED_ENABLE\ |
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| 114 | (RT715_VERB_SET_UNSOLICITED_ENABLE | RT715_MIC2) |
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| 115 | #define RT715_SET_STREAMID_MIC_ADC\ |
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| 116 | (RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIC_ADC) |
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| 117 | #define RT715_SET_STREAMID_LINE_ADC\ |
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| 118 | (RT715_VERB_SET_CHANNEL_STREAMID | RT715_LINE_ADC) |
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| 119 | #define RT715_SET_STREAMID_MIX_ADC\ |
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| 120 | (RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIX_ADC) |
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| 121 | #define RT715_SET_STREAMID_MIX_ADC2\ |
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| 122 | (RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIX_ADC2) |
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| 123 | #define RT715_SET_GAIN_MIC_ADC_L\ |
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| 124 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC_ADC) |
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| 125 | #define RT715_SET_GAIN_MIC_ADC_H\ |
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| 126 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC_ADC) |
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| 127 | #define RT715_SET_GAIN_LINE_ADC_L\ |
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| 128 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE_ADC) |
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| 129 | #define RT715_SET_GAIN_LINE_ADC_H\ |
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| 130 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE_ADC) |
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| 131 | #define RT715_SET_GAIN_MIX_ADC_L\ |
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| 132 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIX_ADC) |
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| 133 | #define RT715_SET_GAIN_MIX_ADC_H\ |
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| 134 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIX_ADC) |
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| 135 | #define RT715_SET_GAIN_MIX_ADC2_L\ |
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| 136 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIX_ADC2) |
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| 137 | #define RT715_SET_GAIN_MIX_ADC2_H\ |
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| 138 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIX_ADC2) |
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| 139 | #define RT715_SET_GAIN_DMIC1_L\ |
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| 140 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC1) |
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| 141 | #define RT715_SET_GAIN_DMIC1_H\ |
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| 142 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC1) |
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| 143 | #define RT715_SET_GAIN_DMIC2_L\ |
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| 144 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC2) |
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| 145 | #define RT715_SET_GAIN_DMIC2_H\ |
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| 146 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC2) |
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| 147 | #define RT715_SET_GAIN_DMIC3_L\ |
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| 148 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC3) |
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| 149 | #define RT715_SET_GAIN_DMIC3_H\ |
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| 150 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC3) |
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| 151 | #define RT715_SET_GAIN_DMIC4_L\ |
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| 152 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC4) |
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| 153 | #define RT715_SET_GAIN_DMIC4_H\ |
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| 154 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC4) |
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| 155 | #define RT715_SET_GAIN_MIC1_L\ |
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| 156 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC1) |
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| 157 | #define RT715_SET_GAIN_MIC1_H\ |
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| 158 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC1) |
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| 159 | #define RT715_SET_GAIN_MIC2_L\ |
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| 160 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC2) |
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| 161 | #define RT715_SET_GAIN_MIC2_H\ |
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| 162 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC2) |
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| 163 | #define RT715_SET_GAIN_LINE1_L\ |
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| 164 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE1) |
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| 165 | #define RT715_SET_GAIN_LINE1_H\ |
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| 166 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE1) |
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| 167 | #define RT715_SET_GAIN_LINE2_L\ |
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| 168 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE2) |
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| 169 | #define RT715_SET_GAIN_LINE2_H\ |
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| 170 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE2) |
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| 171 | #define RT715_SET_DMIC1_CONFIG_DEFAULT1\ |
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| 172 | (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC1) |
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| 173 | #define RT715_SET_DMIC2_CONFIG_DEFAULT1\ |
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| 174 | (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC2) |
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| 175 | #define RT715_SET_DMIC1_CONFIG_DEFAULT2\ |
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| 176 | (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC1) |
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| 177 | #define RT715_SET_DMIC2_CONFIG_DEFAULT2\ |
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| 178 | (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC2) |
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| 179 | #define RT715_SET_DMIC1_CONFIG_DEFAULT3\ |
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| 180 | (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC1) |
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| 181 | #define RT715_SET_DMIC2_CONFIG_DEFAULT3\ |
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| 182 | (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC2) |
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| 183 | #define RT715_SET_DMIC1_CONFIG_DEFAULT4\ |
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| 184 | (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC1) |
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| 185 | #define RT715_SET_DMIC2_CONFIG_DEFAULT4\ |
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| 186 | (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC2) |
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| 187 | #define RT715_SET_DMIC3_CONFIG_DEFAULT1\ |
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| 188 | (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC3) |
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| 189 | #define RT715_SET_DMIC4_CONFIG_DEFAULT1\ |
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| 190 | (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC4) |
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| 191 | #define RT715_SET_DMIC3_CONFIG_DEFAULT2\ |
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| 192 | (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC3) |
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| 193 | #define RT715_SET_DMIC4_CONFIG_DEFAULT2\ |
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| 194 | (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC4) |
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| 195 | #define RT715_SET_DMIC3_CONFIG_DEFAULT3\ |
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| 196 | (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC3) |
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| 197 | #define RT715_SET_DMIC4_CONFIG_DEFAULT3\ |
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| 198 | (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC4) |
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| 199 | #define RT715_SET_DMIC3_CONFIG_DEFAULT4\ |
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| 200 | (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC3) |
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| 201 | #define RT715_SET_DMIC4_CONFIG_DEFAULT4\ |
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| 202 | (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC4) |
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| 203 | |
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| 204 | /* vendor register clear ctrl-1 (0x01)(NID:20h) */ |
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| 205 | #define RT715_CLEAR_HIDDEN_REG (0x1 << 15) |
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| 206 | |
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| 207 | |
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| 208 | #define RT715_MUTE_SFT 7 |
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| 209 | #define RT715_DIR_IN_SFT 6 |
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| 210 | #define RT715_DIR_OUT_SFT 7 |
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| 211 | |
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| 212 | enum { |
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| 213 | RT715_AIF1, |
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| 214 | RT715_AIF2, |
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| 215 | }; |
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| 216 | |
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| 217 | #define RT715_POWER_UP_DELAY_MS 400 |
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| 218 | |
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| 219 | int rt715_io_init(struct device *dev, struct sdw_slave *slave); |
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| 220 | int rt715_init(struct device *dev, struct regmap *sdw_regmap, |
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| 221 | struct regmap *regmap, struct sdw_slave *slave); |
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| 222 | |
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| 223 | int hda_to_sdw(unsigned int nid, unsigned int verb, unsigned int payload, |
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| 224 | unsigned int *sdw_addr_h, unsigned int *sdw_data_h, |
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| 225 | unsigned int *sdw_addr_l, unsigned int *sdw_data_l); |
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| 226 | int rt715_clock_config(struct device *dev); |
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| 227 | #endif /* __RT715_H__ */ |
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| 228 | |
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