1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * rt722-sdca.h -- RT722 SDCA ALSA SoC audio driver header |
4 | * |
5 | * Copyright(c) 2023 Realtek Semiconductor Corp. |
6 | */ |
7 | |
8 | #ifndef __RT722_H__ |
9 | #define __RT722_H__ |
10 | |
11 | #include <linux/pm.h> |
12 | #include <linux/regmap.h> |
13 | #include <linux/soundwire/sdw.h> |
14 | #include <linux/soundwire/sdw_type.h> |
15 | #include <sound/soc.h> |
16 | #include <linux/workqueue.h> |
17 | |
18 | struct rt722_sdca_priv { |
19 | struct regmap *regmap; |
20 | struct regmap *mbq_regmap; |
21 | struct snd_soc_component *component; |
22 | struct sdw_slave *slave; |
23 | struct sdw_bus_params params; |
24 | bool hw_init; |
25 | bool first_hw_init; |
26 | struct mutex calibrate_mutex; |
27 | struct mutex disable_irq_lock; |
28 | bool disable_irq; |
29 | /* For Headset jack & Headphone */ |
30 | unsigned int scp_sdca_stat1; |
31 | unsigned int scp_sdca_stat2; |
32 | struct snd_soc_jack *hs_jack; |
33 | struct delayed_work jack_detect_work; |
34 | struct delayed_work jack_btn_check_work; |
35 | int jack_type; |
36 | int jd_src; |
37 | bool fu0f_dapm_mute; |
38 | bool fu0f_mixer_l_mute; |
39 | bool fu0f_mixer_r_mute; |
40 | /* For DMIC */ |
41 | bool fu1e_dapm_mute; |
42 | bool fu1e_mixer_mute[4]; |
43 | }; |
44 | |
45 | struct rt722_sdca_dmic_kctrl_priv { |
46 | unsigned int reg_base; |
47 | unsigned int count; |
48 | unsigned int max; |
49 | unsigned int invert; |
50 | }; |
51 | |
52 | /* NID */ |
53 | #define RT722_VENDOR_REG 0x20 |
54 | #define RT722_VENDOR_CALI 0x58 |
55 | #define RT722_VENDOR_SPK_EFUSE 0x5c |
56 | #define RT722_VENDOR_IMS_DRE 0x5b |
57 | #define RT722_VENDOR_ANALOG_CTL 0x5f |
58 | #define RT722_VENDOR_HDA_CTL 0x61 |
59 | |
60 | /* Index (NID:20h) */ |
61 | #define RT722_JD_PRODUCT_NUM 0x00 |
62 | #define RT722_ANALOG_BIAS_CTL3 0x04 |
63 | #define RT722_JD_CTRL1 0x09 |
64 | #define RT722_LDO2_3_CTL1 0x0e |
65 | #define RT722_LDO1_CTL 0x1a |
66 | #define RT722_HP_JD_CTRL 0x24 |
67 | #define RT722_CLSD_CTRL6 0x3c |
68 | #define RT722_COMBO_JACK_AUTO_CTL1 0x45 |
69 | #define RT722_COMBO_JACK_AUTO_CTL2 0x46 |
70 | #define RT722_COMBO_JACK_AUTO_CTL3 0x47 |
71 | #define RT722_DIGITAL_MISC_CTRL4 0x4a |
72 | #define RT722_FSM_CTL 0x67 |
73 | #define RT722_SDCA_INTR_REC 0x82 |
74 | #define RT722_SW_CONFIG1 0x8a |
75 | #define RT722_SW_CONFIG2 0x8b |
76 | |
77 | /* Index (NID:58h) */ |
78 | #define RT722_DAC_DC_CALI_CTL0 0x00 |
79 | #define RT722_DAC_DC_CALI_CTL1 0x01 |
80 | #define RT722_DAC_DC_CALI_CTL2 0x02 |
81 | #define RT722_DAC_DC_CALI_CTL3 0x03 |
82 | |
83 | /* Index (NID:59h) */ |
84 | #define RT722_ULTRA_SOUND_DETECTOR6 0x1e |
85 | |
86 | /* Index (NID:5bh) */ |
87 | #define RT722_IMS_DIGITAL_CTL1 0x00 |
88 | #define RT722_IMS_DIGITAL_CTL5 0x05 |
89 | #define RT722_HP_DETECT_RLDET_CTL1 0x29 |
90 | #define RT722_HP_DETECT_RLDET_CTL2 0x2a |
91 | |
92 | /* Index (NID:5fh) */ |
93 | #define RT722_MISC_POWER_CTL0 0x00 |
94 | #define RT722_MISC_POWER_CTL7 0x08 |
95 | |
96 | /* Index (NID:61h) */ |
97 | #define RT722_HDA_LEGACY_MUX_CTL0 0x00 |
98 | #define RT722_HDA_LEGACY_UNSOL_CTL 0x03 |
99 | #define RT722_HDA_LEGACY_CONFIG_CTL0 0x06 |
100 | #define RT722_HDA_LEGACY_RESET_CTL 0x08 |
101 | #define RT722_HDA_LEGACY_GPIO_WAKE_EN_CTL 0x0e |
102 | #define RT722_DMIC_ENT_FLOAT_CTL 0x10 |
103 | #define RT722_DMIC_GAIN_ENT_FLOAT_CTL0 0x11 |
104 | #define RT722_DMIC_GAIN_ENT_FLOAT_CTL2 0x13 |
105 | #define RT722_ADC_ENT_FLOAT_CTL 0x15 |
106 | #define RT722_ADC_VOL_CH_FLOAT_CTL 0x17 |
107 | #define RT722_ADC_SAMPLE_RATE_FLOAT 0x18 |
108 | #define RT722_DAC03_HP_PDE_FLOAT_CTL 0x22 |
109 | #define RT722_MIC2_LINE2_PDE_FLOAT_CTL 0x23 |
110 | #define RT722_ET41_LINE2_PDE_FLOAT_CTL 0x24 |
111 | #define RT722_ADC0A_08_PDE_FLOAT_CTL 0x25 |
112 | #define RT722_ADC10_PDE_FLOAT_CTL 0x26 |
113 | #define RT722_DMIC1_2_PDE_FLOAT_CTL 0x28 |
114 | #define RT722_AMP_PDE_FLOAT_CTL 0x29 |
115 | #define RT722_I2S_IN_OUT_PDE_FLOAT_CTL 0x2f |
116 | #define RT722_GE_RELATED_CTL1 0x45 |
117 | #define RT722_GE_RELATED_CTL2 0x46 |
118 | #define RT722_MIXER_CTL0 0x52 |
119 | #define RT722_MIXER_CTL1 0x53 |
120 | #define RT722_EAPD_CTL 0x55 |
121 | #define RT722_UMP_HID_CTL0 0x60 |
122 | #define RT722_UMP_HID_CTL1 0x61 |
123 | #define RT722_UMP_HID_CTL2 0x62 |
124 | #define RT722_UMP_HID_CTL3 0x63 |
125 | #define RT722_UMP_HID_CTL4 0x64 |
126 | #define RT722_UMP_HID_CTL5 0x65 |
127 | #define RT722_UMP_HID_CTL6 0x66 |
128 | #define RT722_UMP_HID_CTL7 0x67 |
129 | #define RT722_UMP_HID_CTL8 0x68 |
130 | |
131 | /* Parameter & Verb control 01 (0x1a)(NID:20h) */ |
132 | #define RT722_HIDDEN_REG_SW_RESET (0x1 << 14) |
133 | |
134 | /* combo jack auto switch control 2 (0x46)(NID:20h) */ |
135 | #define RT722_COMBOJACK_AUTO_DET_STATUS (0x1 << 11) |
136 | #define RT722_COMBOJACK_AUTO_DET_TRS (0x1 << 10) |
137 | #define RT722_COMBOJACK_AUTO_DET_CTIA (0x1 << 9) |
138 | #define RT722_COMBOJACK_AUTO_DET_OMTP (0x1 << 8) |
139 | |
140 | /* DAC calibration control (0x00)(NID:58h) */ |
141 | #define RT722_DC_CALIB_CTRL (0x1 << 16) |
142 | /* DAC DC offset calibration control-1 (0x01)(NID:58h) */ |
143 | #define RT722_PDM_DC_CALIB_STATUS (0x1 << 15) |
144 | |
145 | #define RT722_EAPD_HIGH 0x2 |
146 | #define RT722_EAPD_LOW 0x0 |
147 | |
148 | /* Buffer address for HID */ |
149 | #define RT722_BUF_ADDR_HID1 0x44030000 |
150 | #define RT722_BUF_ADDR_HID2 0x44030020 |
151 | |
152 | /* RT722 SDCA Control - function number */ |
153 | #define FUNC_NUM_JACK_CODEC 0x01 |
154 | #define FUNC_NUM_MIC_ARRAY 0x02 |
155 | #define FUNC_NUM_HID 0x03 |
156 | #define FUNC_NUM_AMP 0x04 |
157 | |
158 | /* RT722 SDCA entity */ |
159 | #define RT722_SDCA_ENT_HID01 0x01 |
160 | #define RT722_SDCA_ENT_GE49 0x49 |
161 | #define RT722_SDCA_ENT_USER_FU05 0x05 |
162 | #define RT722_SDCA_ENT_USER_FU06 0x06 |
163 | #define RT722_SDCA_ENT_USER_FU0F 0x0f |
164 | #define RT722_SDCA_ENT_USER_FU10 0x19 |
165 | #define RT722_SDCA_ENT_USER_FU1E 0x1e |
166 | #define RT722_SDCA_ENT_FU15 0x15 |
167 | #define RT722_SDCA_ENT_PDE23 0x23 |
168 | #define RT722_SDCA_ENT_PDE40 0x40 |
169 | #define RT722_SDCA_ENT_PDE11 0x11 |
170 | #define RT722_SDCA_ENT_PDE12 0x12 |
171 | #define RT722_SDCA_ENT_PDE2A 0x2a |
172 | #define RT722_SDCA_ENT_CS01 0x01 |
173 | #define RT722_SDCA_ENT_CS11 0x11 |
174 | #define RT722_SDCA_ENT_CS1F 0x1f |
175 | #define RT722_SDCA_ENT_CS1C 0x1c |
176 | #define RT722_SDCA_ENT_CS31 0x31 |
177 | #define RT722_SDCA_ENT_OT23 0x42 |
178 | #define RT722_SDCA_ENT_IT26 0x26 |
179 | #define RT722_SDCA_ENT_IT09 0x09 |
180 | #define RT722_SDCA_ENT_PLATFORM_FU15 0x15 |
181 | #define RT722_SDCA_ENT_PLATFORM_FU44 0x44 |
182 | #define RT722_SDCA_ENT_XU03 0x03 |
183 | #define RT722_SDCA_ENT_XU0D 0x0d |
184 | |
185 | /* RT722 SDCA control */ |
186 | #define RT722_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10 |
187 | #define RT722_SDCA_CTL_FU_MUTE 0x01 |
188 | #define RT722_SDCA_CTL_FU_VOLUME 0x02 |
189 | #define RT722_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10 |
190 | #define RT722_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11 |
191 | #define RT722_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12 |
192 | #define RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13 |
193 | #define RT722_SDCA_CTL_SELECTED_MODE 0x01 |
194 | #define RT722_SDCA_CTL_DETECTED_MODE 0x02 |
195 | #define RT722_SDCA_CTL_REQ_POWER_STATE 0x01 |
196 | #define RT722_SDCA_CTL_VENDOR_DEF 0x30 |
197 | #define RT722_SDCA_CTL_FU_CH_GAIN 0x0b |
198 | |
199 | /* RT722 SDCA channel */ |
200 | #define CH_L 0x01 |
201 | #define CH_R 0x02 |
202 | #define CH_01 0x01 |
203 | #define CH_02 0x02 |
204 | #define CH_03 0x03 |
205 | #define CH_04 0x04 |
206 | #define CH_08 0x08 |
207 | |
208 | /* sample frequency index */ |
209 | #define RT722_SDCA_RATE_16000HZ 0x04 |
210 | #define RT722_SDCA_RATE_32000HZ 0x07 |
211 | #define RT722_SDCA_RATE_44100HZ 0x08 |
212 | #define RT722_SDCA_RATE_48000HZ 0x09 |
213 | #define RT722_SDCA_RATE_96000HZ 0x0b |
214 | #define RT722_SDCA_RATE_192000HZ 0x0d |
215 | |
216 | enum { |
217 | RT722_AIF1, /* For headset mic and headphone */ |
218 | RT722_AIF2, /* For speaker */ |
219 | RT722_AIF3, /* For dmic */ |
220 | RT722_AIFS, |
221 | }; |
222 | |
223 | enum rt722_sdca_jd_src { |
224 | RT722_JD_NULL, |
225 | RT722_JD1, |
226 | }; |
227 | |
228 | int rt722_sdca_io_init(struct device *dev, struct sdw_slave *slave); |
229 | int rt722_sdca_init(struct device *dev, struct regmap *regmap, |
230 | struct regmap *mbq_regmap, struct sdw_slave *slave); |
231 | int rt722_sdca_index_write(struct rt722_sdca_priv *rt722, |
232 | unsigned int nid, unsigned int reg, unsigned int value); |
233 | int rt722_sdca_index_read(struct rt722_sdca_priv *rt722, |
234 | unsigned int nid, unsigned int reg, unsigned int *value); |
235 | |
236 | int rt722_sdca_jack_detect(struct rt722_sdca_priv *rt722, bool *hp, bool *mic); |
237 | #endif /* __RT722_H__ */ |
238 | |