1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * Codec driver for ST STA32x 2.1-channel high-efficiency digital audio system |
4 | * |
5 | * Copyright: 2011 Raumfeld GmbH |
6 | * Author: Johannes Stezenbach <js@sig21.net> |
7 | * |
8 | * based on code from: |
9 | * Wolfson Microelectronics PLC. |
10 | * Mark Brown <broonie@opensource.wolfsonmicro.com> |
11 | */ |
12 | #ifndef _ASOC_STA_32X_H |
13 | #define _ASOC_STA_32X_H |
14 | |
15 | /* STA326 register addresses */ |
16 | |
17 | #define STA32X_REGISTER_COUNT 0x2d |
18 | #define STA32X_COEF_COUNT 62 |
19 | |
20 | #define STA32X_CONFA 0x00 |
21 | #define STA32X_CONFB 0x01 |
22 | #define STA32X_CONFC 0x02 |
23 | #define STA32X_CONFD 0x03 |
24 | #define STA32X_CONFE 0x04 |
25 | #define STA32X_CONFF 0x05 |
26 | #define STA32X_MMUTE 0x06 |
27 | #define STA32X_MVOL 0x07 |
28 | #define STA32X_C1VOL 0x08 |
29 | #define STA32X_C2VOL 0x09 |
30 | #define STA32X_C3VOL 0x0a |
31 | #define STA32X_AUTO1 0x0b |
32 | #define STA32X_AUTO2 0x0c |
33 | #define STA32X_AUTO3 0x0d |
34 | #define STA32X_C1CFG 0x0e |
35 | #define STA32X_C2CFG 0x0f |
36 | #define STA32X_C3CFG 0x10 |
37 | #define STA32X_TONE 0x11 |
38 | #define STA32X_L1AR 0x12 |
39 | #define STA32X_L1ATRT 0x13 |
40 | #define STA32X_L2AR 0x14 |
41 | #define STA32X_L2ATRT 0x15 |
42 | #define STA32X_CFADDR2 0x16 |
43 | #define STA32X_B1CF1 0x17 |
44 | #define STA32X_B1CF2 0x18 |
45 | #define STA32X_B1CF3 0x19 |
46 | #define STA32X_B2CF1 0x1a |
47 | #define STA32X_B2CF2 0x1b |
48 | #define STA32X_B2CF3 0x1c |
49 | #define STA32X_A1CF1 0x1d |
50 | #define STA32X_A1CF2 0x1e |
51 | #define STA32X_A1CF3 0x1f |
52 | #define STA32X_A2CF1 0x20 |
53 | #define STA32X_A2CF2 0x21 |
54 | #define STA32X_A2CF3 0x22 |
55 | #define STA32X_B0CF1 0x23 |
56 | #define STA32X_B0CF2 0x24 |
57 | #define STA32X_B0CF3 0x25 |
58 | #define STA32X_CFUD 0x26 |
59 | #define STA32X_MPCC1 0x27 |
60 | #define STA32X_MPCC2 0x28 |
61 | /* Reserved 0x29 */ |
62 | /* Reserved 0x2a */ |
63 | #define STA32X_Reserved 0x2a |
64 | #define STA32X_FDRC1 0x2b |
65 | #define STA32X_FDRC2 0x2c |
66 | /* Reserved 0x2d */ |
67 | |
68 | |
69 | /* STA326 register field definitions */ |
70 | |
71 | /* 0x00 CONFA */ |
72 | #define STA32X_CONFA_MCS_MASK 0x03 |
73 | #define STA32X_CONFA_MCS_SHIFT 0 |
74 | #define STA32X_CONFA_IR_MASK 0x18 |
75 | #define STA32X_CONFA_IR_SHIFT 3 |
76 | #define STA32X_CONFA_TWRB 0x20 |
77 | #define STA32X_CONFA_TWAB 0x40 |
78 | #define STA32X_CONFA_FDRB 0x80 |
79 | |
80 | /* 0x01 CONFB */ |
81 | #define STA32X_CONFB_SAI_MASK 0x0f |
82 | #define STA32X_CONFB_SAI_SHIFT 0 |
83 | #define STA32X_CONFB_SAIFB 0x10 |
84 | #define STA32X_CONFB_DSCKE 0x20 |
85 | #define STA32X_CONFB_C1IM 0x40 |
86 | #define STA32X_CONFB_C2IM 0x80 |
87 | |
88 | /* 0x02 CONFC */ |
89 | #define STA32X_CONFC_OM_MASK 0x03 |
90 | #define STA32X_CONFC_OM_SHIFT 0 |
91 | #define STA32X_CONFC_CSZ_MASK 0x7c |
92 | #define STA32X_CONFC_CSZ_SHIFT 2 |
93 | |
94 | /* 0x03 CONFD */ |
95 | #define STA32X_CONFD_HPB 0x01 |
96 | #define STA32X_CONFD_HPB_SHIFT 0 |
97 | #define STA32X_CONFD_DEMP 0x02 |
98 | #define STA32X_CONFD_DEMP_SHIFT 1 |
99 | #define STA32X_CONFD_DSPB 0x04 |
100 | #define STA32X_CONFD_DSPB_SHIFT 2 |
101 | #define STA32X_CONFD_PSL 0x08 |
102 | #define STA32X_CONFD_PSL_SHIFT 3 |
103 | #define STA32X_CONFD_BQL 0x10 |
104 | #define STA32X_CONFD_BQL_SHIFT 4 |
105 | #define STA32X_CONFD_DRC 0x20 |
106 | #define STA32X_CONFD_DRC_SHIFT 5 |
107 | #define STA32X_CONFD_ZDE 0x40 |
108 | #define STA32X_CONFD_ZDE_SHIFT 6 |
109 | #define STA32X_CONFD_MME 0x80 |
110 | #define STA32X_CONFD_MME_SHIFT 7 |
111 | |
112 | /* 0x04 CONFE */ |
113 | #define STA32X_CONFE_MPCV 0x01 |
114 | #define STA32X_CONFE_MPCV_SHIFT 0 |
115 | #define STA32X_CONFE_MPC 0x02 |
116 | #define STA32X_CONFE_MPC_SHIFT 1 |
117 | #define STA32X_CONFE_AME 0x08 |
118 | #define STA32X_CONFE_AME_SHIFT 3 |
119 | #define STA32X_CONFE_PWMS 0x10 |
120 | #define STA32X_CONFE_PWMS_SHIFT 4 |
121 | #define STA32X_CONFE_ZCE 0x40 |
122 | #define STA32X_CONFE_ZCE_SHIFT 6 |
123 | #define STA32X_CONFE_SVE 0x80 |
124 | #define STA32X_CONFE_SVE_SHIFT 7 |
125 | |
126 | /* 0x05 CONFF */ |
127 | #define STA32X_CONFF_OCFG_MASK 0x03 |
128 | #define STA32X_CONFF_OCFG_SHIFT 0 |
129 | #define STA32X_CONFF_IDE 0x04 |
130 | #define STA32X_CONFF_IDE_SHIFT 2 |
131 | #define STA32X_CONFF_BCLE 0x08 |
132 | #define STA32X_CONFF_ECLE 0x20 |
133 | #define STA32X_CONFF_PWDN 0x40 |
134 | #define STA32X_CONFF_EAPD 0x80 |
135 | |
136 | /* 0x06 MMUTE */ |
137 | #define STA32X_MMUTE_MMUTE 0x01 |
138 | |
139 | /* 0x0b AUTO1 */ |
140 | #define STA32X_AUTO1_AMEQ_MASK 0x03 |
141 | #define STA32X_AUTO1_AMEQ_SHIFT 0 |
142 | #define STA32X_AUTO1_AMV_MASK 0xc0 |
143 | #define STA32X_AUTO1_AMV_SHIFT 2 |
144 | #define STA32X_AUTO1_AMGC_MASK 0x30 |
145 | #define STA32X_AUTO1_AMGC_SHIFT 4 |
146 | #define STA32X_AUTO1_AMPS 0x80 |
147 | |
148 | /* 0x0c AUTO2 */ |
149 | #define STA32X_AUTO2_AMAME 0x01 |
150 | #define STA32X_AUTO2_AMAM_MASK 0x0e |
151 | #define STA32X_AUTO2_AMAM_SHIFT 1 |
152 | #define STA32X_AUTO2_XO_MASK 0xf0 |
153 | #define STA32X_AUTO2_XO_SHIFT 4 |
154 | |
155 | /* 0x0d AUTO3 */ |
156 | #define STA32X_AUTO3_PEQ_MASK 0x1f |
157 | #define STA32X_AUTO3_PEQ_SHIFT 0 |
158 | |
159 | /* 0x0e 0x0f 0x10 CxCFG */ |
160 | #define STA32X_CxCFG_TCB 0x01 /* only C1 and C2 */ |
161 | #define STA32X_CxCFG_TCB_SHIFT 0 |
162 | #define STA32X_CxCFG_EQBP 0x02 /* only C1 and C2 */ |
163 | #define STA32X_CxCFG_EQBP_SHIFT 1 |
164 | #define STA32X_CxCFG_VBP 0x03 |
165 | #define STA32X_CxCFG_VBP_SHIFT 2 |
166 | #define STA32X_CxCFG_BO 0x04 |
167 | #define STA32X_CxCFG_LS_MASK 0x30 |
168 | #define STA32X_CxCFG_LS_SHIFT 4 |
169 | #define STA32X_CxCFG_OM_MASK 0xc0 |
170 | #define STA32X_CxCFG_OM_SHIFT 6 |
171 | |
172 | /* 0x11 TONE */ |
173 | #define STA32X_TONE_BTC_SHIFT 0 |
174 | #define STA32X_TONE_TTC_SHIFT 4 |
175 | |
176 | /* 0x12 0x13 0x14 0x15 limiter attack/release */ |
177 | #define STA32X_LxA_SHIFT 0 |
178 | #define STA32X_LxR_SHIFT 4 |
179 | |
180 | /* 0x26 CFUD */ |
181 | #define STA32X_CFUD_W1 0x01 |
182 | #define STA32X_CFUD_WA 0x02 |
183 | #define STA32X_CFUD_R1 0x04 |
184 | #define STA32X_CFUD_RA 0x08 |
185 | |
186 | |
187 | /* biquad filter coefficient table offsets */ |
188 | #define STA32X_C1_BQ_BASE 0 |
189 | #define STA32X_C2_BQ_BASE 20 |
190 | #define STA32X_CH_BQ_NUM 4 |
191 | #define STA32X_BQ_NUM_COEF 5 |
192 | #define STA32X_XO_HP_BQ_BASE 40 |
193 | #define STA32X_XO_LP_BQ_BASE 45 |
194 | #define STA32X_C1_PRESCALE 50 |
195 | #define STA32X_C2_PRESCALE 51 |
196 | #define STA32X_C1_POSTSCALE 52 |
197 | #define STA32X_C2_POSTSCALE 53 |
198 | #define STA32X_C3_POSTSCALE 54 |
199 | #define STA32X_TW_POSTSCALE 55 |
200 | #define STA32X_C1_MIX1 56 |
201 | #define STA32X_C1_MIX2 57 |
202 | #define STA32X_C2_MIX1 58 |
203 | #define STA32X_C2_MIX2 59 |
204 | #define STA32X_C3_MIX1 60 |
205 | #define STA32X_C3_MIX2 61 |
206 | |
207 | #endif /* _ASOC_STA_32X_H */ |
208 | |