| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * tas2552.h - ALSA SoC Texas Instruments TAS2552 Mono Audio Amplifier |
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| 4 | * |
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| 5 | * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com |
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| 6 | * |
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| 7 | * Author: Dan Murphy <dmurphy@ti.com> |
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| 8 | */ |
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| 9 | |
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| 10 | #ifndef __TAS2552_H__ |
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| 11 | #define __TAS2552_H__ |
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| 12 | |
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| 13 | /* Register Address Map */ |
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| 14 | #define TAS2552_DEVICE_STATUS 0x00 |
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| 15 | #define TAS2552_CFG_1 0x01 |
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| 16 | #define TAS2552_CFG_2 0x02 |
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| 17 | #define TAS2552_CFG_3 0x03 |
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| 18 | #define TAS2552_DOUT 0x04 |
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| 19 | #define TAS2552_SER_CTRL_1 0x05 |
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| 20 | #define TAS2552_SER_CTRL_2 0x06 |
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| 21 | #define TAS2552_OUTPUT_DATA 0x07 |
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| 22 | #define TAS2552_PLL_CTRL_1 0x08 |
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| 23 | #define TAS2552_PLL_CTRL_2 0x09 |
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| 24 | #define TAS2552_PLL_CTRL_3 0x0a |
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| 25 | #define TAS2552_BTIP 0x0b |
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| 26 | #define TAS2552_BTS_CTRL 0x0c |
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| 27 | #define TAS2552_RESERVED_0D 0x0d |
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| 28 | #define TAS2552_LIMIT_RATE_HYS 0x0e |
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| 29 | #define TAS2552_LIMIT_RELEASE 0x0f |
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| 30 | #define TAS2552_LIMIT_INT_COUNT 0x10 |
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| 31 | #define TAS2552_PDM_CFG 0x11 |
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| 32 | #define TAS2552_PGA_GAIN 0x12 |
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| 33 | #define TAS2552_EDGE_RATE_CTRL 0x13 |
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| 34 | #define TAS2552_BOOST_APT_CTRL 0x14 |
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| 35 | #define TAS2552_VER_NUM 0x16 |
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| 36 | #define TAS2552_VBAT_DATA 0x19 |
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| 37 | #define TAS2552_MAX_REG TAS2552_VBAT_DATA |
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| 38 | |
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| 39 | /* CFG1 Register Masks */ |
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| 40 | #define TAS2552_DEV_RESET (1 << 0) |
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| 41 | #define TAS2552_SWS (1 << 1) |
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| 42 | #define TAS2552_MUTE (1 << 2) |
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| 43 | #define TAS2552_PLL_SRC_MCLK (0x0 << 4) |
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| 44 | #define TAS2552_PLL_SRC_BCLK (0x1 << 4) |
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| 45 | #define TAS2552_PLL_SRC_IVCLKIN (0x2 << 4) |
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| 46 | #define TAS2552_PLL_SRC_1_8_FIXED (0x3 << 4) |
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| 47 | #define TAS2552_PLL_SRC_MASK TAS2552_PLL_SRC_1_8_FIXED |
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| 48 | |
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| 49 | /* CFG2 Register Masks */ |
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| 50 | #define TAS2552_CLASSD_EN (1 << 7) |
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| 51 | #define TAS2552_BOOST_EN (1 << 6) |
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| 52 | #define TAS2552_APT_EN (1 << 5) |
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| 53 | #define TAS2552_PLL_ENABLE (1 << 3) |
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| 54 | #define TAS2552_LIM_EN (1 << 2) |
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| 55 | #define TAS2552_IVSENSE_EN (1 << 1) |
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| 56 | |
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| 57 | /* CFG3 Register Masks */ |
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| 58 | #define TAS2552_WCLK_FREQ_8KHZ (0x0 << 0) |
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| 59 | #define TAS2552_WCLK_FREQ_11_12KHZ (0x1 << 0) |
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| 60 | #define TAS2552_WCLK_FREQ_16KHZ (0x2 << 0) |
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| 61 | #define TAS2552_WCLK_FREQ_22_24KHZ (0x3 << 0) |
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| 62 | #define TAS2552_WCLK_FREQ_32KHZ (0x4 << 0) |
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| 63 | #define TAS2552_WCLK_FREQ_44_48KHZ (0x5 << 0) |
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| 64 | #define TAS2552_WCLK_FREQ_88_96KHZ (0x6 << 0) |
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| 65 | #define TAS2552_WCLK_FREQ_176_192KHZ (0x7 << 0) |
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| 66 | #define TAS2552_WCLK_FREQ_MASK TAS2552_WCLK_FREQ_176_192KHZ |
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| 67 | #define TAS2552_DIN_SRC_SEL_MUTED (0x0 << 3) |
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| 68 | #define TAS2552_DIN_SRC_SEL_LEFT (0x1 << 3) |
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| 69 | #define TAS2552_DIN_SRC_SEL_RIGHT (0x2 << 3) |
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| 70 | #define TAS2552_DIN_SRC_SEL_AVG_L_R (0x3 << 3) |
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| 71 | #define TAS2552_PDM_IN_SEL (1 << 5) |
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| 72 | #define TAS2552_I2S_OUT_SEL (1 << 6) |
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| 73 | #define TAS2552_ANALOG_IN_SEL (1 << 7) |
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| 74 | |
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| 75 | /* DOUT Register Masks */ |
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| 76 | #define TAS2552_SDOUT_TRISTATE (1 << 2) |
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| 77 | |
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| 78 | /* Serial Interface Control Register Masks */ |
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| 79 | #define TAS2552_WORDLENGTH_16BIT (0x0 << 0) |
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| 80 | #define TAS2552_WORDLENGTH_20BIT (0x1 << 0) |
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| 81 | #define TAS2552_WORDLENGTH_24BIT (0x2 << 0) |
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| 82 | #define TAS2552_WORDLENGTH_32BIT (0x3 << 0) |
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| 83 | #define TAS2552_WORDLENGTH_MASK TAS2552_WORDLENGTH_32BIT |
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| 84 | #define TAS2552_DATAFORMAT_I2S (0x0 << 2) |
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| 85 | #define TAS2552_DATAFORMAT_DSP (0x1 << 2) |
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| 86 | #define TAS2552_DATAFORMAT_RIGHT_J (0x2 << 2) |
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| 87 | #define TAS2552_DATAFORMAT_LEFT_J (0x3 << 2) |
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| 88 | #define TAS2552_DATAFORMAT_MASK TAS2552_DATAFORMAT_LEFT_J |
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| 89 | #define TAS2552_CLKSPERFRAME_32 (0x0 << 4) |
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| 90 | #define TAS2552_CLKSPERFRAME_64 (0x1 << 4) |
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| 91 | #define TAS2552_CLKSPERFRAME_128 (0x2 << 4) |
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| 92 | #define TAS2552_CLKSPERFRAME_256 (0x3 << 4) |
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| 93 | #define TAS2552_CLKSPERFRAME_MASK TAS2552_CLKSPERFRAME_256 |
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| 94 | #define TAS2552_BCLKDIR (1 << 6) |
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| 95 | #define TAS2552_WCLKDIR (1 << 7) |
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| 96 | |
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| 97 | /* OUTPUT_DATA register */ |
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| 98 | #define TAS2552_DATA_OUT_I_DATA (0x0) |
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| 99 | #define TAS2552_DATA_OUT_V_DATA (0x1) |
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| 100 | #define TAS2552_DATA_OUT_VBAT_DATA (0x2) |
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| 101 | #define TAS2552_DATA_OUT_VBOOST_DATA (0x3) |
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| 102 | #define TAS2552_DATA_OUT_PGA_GAIN (0x4) |
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| 103 | #define TAS2552_DATA_OUT_IV_DATA (0x5) |
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| 104 | #define TAS2552_DATA_OUT_VBAT_VBOOST_GAIN (0x6) |
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| 105 | #define TAS2552_DATA_OUT_DISABLED (0x7) |
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| 106 | #define TAS2552_L_DATA_OUT(x) ((x) << 0) |
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| 107 | #define TAS2552_R_DATA_OUT(x) ((x) << 3) |
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| 108 | #define TAS2552_PDM_DATA_SEL_I (0x0 << 6) |
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| 109 | #define TAS2552_PDM_DATA_SEL_V (0x1 << 6) |
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| 110 | #define TAS2552_PDM_DATA_SEL_I_V (0x2 << 6) |
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| 111 | #define TAS2552_PDM_DATA_SEL_V_I (0x3 << 6) |
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| 112 | #define TAS2552_PDM_DATA_SEL_MASK TAS2552_PDM_DATA_SEL_V_I |
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| 113 | |
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| 114 | /* PDM CFG Register */ |
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| 115 | #define TAS2552_PDM_CLK_SEL_PLL (0x0 << 0) |
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| 116 | #define TAS2552_PDM_CLK_SEL_IVCLKIN (0x1 << 0) |
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| 117 | #define TAS2552_PDM_CLK_SEL_BCLK (0x2 << 0) |
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| 118 | #define TAS2552_PDM_CLK_SEL_MCLK (0x3 << 0) |
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| 119 | #define TAS2552_PDM_CLK_SEL_MASK TAS2552_PDM_CLK_SEL_MCLK |
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| 120 | #define TAS2552_PDM_DATA_ES (1 << 2) |
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| 121 | |
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| 122 | /* Boost Auto-pass through register */ |
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| 123 | #define TAS2552_APT_DELAY_50 (0x0 << 0) |
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| 124 | #define TAS2552_APT_DELAY_75 (0x1 << 0) |
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| 125 | #define TAS2552_APT_DELAY_125 (0x2 << 0) |
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| 126 | #define TAS2552_APT_DELAY_200 (0x3 << 0) |
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| 127 | #define TAS2552_APT_THRESH_05_02 (0x0 << 2) |
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| 128 | #define TAS2552_APT_THRESH_10_07 (0x1 << 2) |
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| 129 | #define TAS2552_APT_THRESH_14_11 (0x2 << 2) |
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| 130 | #define TAS2552_APT_THRESH_20_17 (0x3 << 2) |
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| 131 | |
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| 132 | /* PLL Control Register */ |
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| 133 | #define TAS2552_PLL_J_MASK 0x7f |
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| 134 | #define TAS2552_PLL_D_UPPER(x) (((x) >> 8) & 0x3f) |
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| 135 | #define TAS2552_PLL_D_LOWER(x) ((x) & 0xff) |
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| 136 | #define TAS2552_PLL_BYPASS (1 << 7) |
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| 137 | |
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| 138 | #endif |
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| 139 | |
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