| 1 | /* SPDX-License-Identifier: GPL-2.0 |
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| 2 | * |
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| 3 | * ALSA SoC TAS2770 codec driver |
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| 4 | * |
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| 5 | * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ |
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| 6 | */ |
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| 7 | #ifndef __TAS2770__ |
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| 8 | #define __TAS2770__ |
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| 9 | |
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| 10 | /* Book Control Register (available in page0 of each book) */ |
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| 11 | #define TAS2770_BOOKCTL_PAGE 0 |
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| 12 | #define TAS2770_BOOKCTL_REG 127 |
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| 13 | #define TAS2770_REG(page, reg) ((page * 128) + reg) |
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| 14 | /* Page */ |
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| 15 | #define TAS2770_PAGE TAS2770_REG(0X0, 0x00) |
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| 16 | #define TAS2770_PAGE_PAGE_MASK 255 |
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| 17 | /* Software Reset */ |
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| 18 | #define TAS2770_SW_RST TAS2770_REG(0X0, 0x01) |
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| 19 | #define TAS2770_RST BIT(0) |
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| 20 | /* Power Control */ |
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| 21 | #define TAS2770_PWR_CTRL TAS2770_REG(0X0, 0x02) |
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| 22 | #define TAS2770_PWR_CTRL_MASK GENMASK(1, 0) |
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| 23 | #define TAS2770_PWR_CTRL_ACTIVE 0x0 |
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| 24 | #define TAS2770_PWR_CTRL_MUTE BIT(0) |
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| 25 | #define TAS2770_PWR_CTRL_SHUTDOWN 0x2 |
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| 26 | /* Playback Configuration Reg0 */ |
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| 27 | #define TAS2770_PLAY_CFG_REG0 TAS2770_REG(0X0, 0x03) |
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| 28 | /* Playback Configuration Reg1 */ |
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| 29 | #define TAS2770_PLAY_CFG_REG1 TAS2770_REG(0X0, 0x04) |
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| 30 | /* Playback Configuration Reg2 */ |
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| 31 | #define TAS2770_PLAY_CFG_REG2 TAS2770_REG(0X0, 0x05) |
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| 32 | #define TAS2770_PLAY_CFG_REG2_VMAX 0xc9 |
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| 33 | /* Misc Configuration Reg0 */ |
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| 34 | #define TAS2770_MSC_CFG_REG0 TAS2770_REG(0X0, 0x07) |
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| 35 | /* TDM Configuration Reg0 */ |
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| 36 | #define TAS2770_TDM_CFG_REG0 TAS2770_REG(0X0, 0x0A) |
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| 37 | #define TAS2770_TDM_CFG_REG0_SMP_MASK BIT(5) |
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| 38 | #define TAS2770_TDM_CFG_REG0_SMP_48KHZ 0x0 |
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| 39 | #define TAS2770_TDM_CFG_REG0_SMP_44_1KHZ BIT(5) |
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| 40 | #define TAS2770_TDM_CFG_REG0_31_MASK GENMASK(3, 1) |
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| 41 | #define TAS2770_TDM_CFG_REG0_31_44_1_48KHZ 0x6 |
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| 42 | #define TAS2770_TDM_CFG_REG0_31_88_2_96KHZ 0x8 |
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| 43 | #define TAS2770_TDM_CFG_REG0_31_176_4_192KHZ 0xa |
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| 44 | #define TAS2770_TDM_CFG_REG0_FPOL_MASK BIT(0) |
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| 45 | #define TAS2770_TDM_CFG_REG0_FPOL_RSING 0 |
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| 46 | #define TAS2770_TDM_CFG_REG0_FPOL_FALING 1 |
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| 47 | /* TDM Configuration Reg1 */ |
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| 48 | #define TAS2770_TDM_CFG_REG1 TAS2770_REG(0X0, 0x0B) |
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| 49 | #define TAS2770_TDM_CFG_REG1_MASK GENMASK(5, 1) |
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| 50 | #define TAS2770_TDM_CFG_REG1_51_SHIFT 1 |
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| 51 | #define TAS2770_TDM_CFG_REG1_RX_MASK BIT(0) |
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| 52 | #define TAS2770_TDM_CFG_REG1_RX_RSING 0x0 |
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| 53 | #define TAS2770_TDM_CFG_REG1_RX_FALING BIT(0) |
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| 54 | /* TDM Configuration Reg2 */ |
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| 55 | #define TAS2770_TDM_CFG_REG2 TAS2770_REG(0X0, 0x0C) |
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| 56 | #define TAS2770_TDM_CFG_REG2_RXW_MASK GENMASK(3, 2) |
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| 57 | #define TAS2770_TDM_CFG_REG2_RXW_16BITS 0x0 |
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| 58 | #define TAS2770_TDM_CFG_REG2_RXW_24BITS 0x8 |
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| 59 | #define TAS2770_TDM_CFG_REG2_RXW_32BITS 0xc |
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| 60 | #define TAS2770_TDM_CFG_REG2_RXS_MASK GENMASK(1, 0) |
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| 61 | #define TAS2770_TDM_CFG_REG2_RXS_16BITS 0x0 |
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| 62 | #define TAS2770_TDM_CFG_REG2_RXS_24BITS BIT(0) |
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| 63 | #define TAS2770_TDM_CFG_REG2_RXS_32BITS 0x2 |
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| 64 | /* TDM Configuration Reg3 */ |
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| 65 | #define TAS2770_TDM_CFG_REG3 TAS2770_REG(0X0, 0x0D) |
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| 66 | #define TAS2770_TDM_CFG_REG3_RXS_MASK GENMASK(7, 4) |
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| 67 | #define TAS2770_TDM_CFG_REG3_RXS_SHIFT 0x4 |
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| 68 | #define TAS2770_TDM_CFG_REG3_30_MASK GENMASK(3, 0) |
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| 69 | #define TAS2770_TDM_CFG_REG3_30_SHIFT 0 |
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| 70 | /* TDM Configuration Reg5 */ |
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| 71 | #define TAS2770_TDM_CFG_REG5 TAS2770_REG(0X0, 0x0F) |
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| 72 | #define TAS2770_TDM_CFG_REG5_VSNS_MASK BIT(6) |
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| 73 | #define TAS2770_TDM_CFG_REG5_VSNS_ENABLE BIT(6) |
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| 74 | #define TAS2770_TDM_CFG_REG5_50_MASK GENMASK(5, 0) |
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| 75 | /* TDM Configuration Reg6 */ |
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| 76 | #define TAS2770_TDM_CFG_REG6 TAS2770_REG(0X0, 0x10) |
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| 77 | #define TAS2770_TDM_CFG_REG6_ISNS_MASK BIT(6) |
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| 78 | #define TAS2770_TDM_CFG_REG6_ISNS_ENABLE BIT(6) |
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| 79 | #define TAS2770_TDM_CFG_REG6_50_MASK GENMASK(5, 0) |
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| 80 | /* Brown Out Prevention Reg0 */ |
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| 81 | #define TAS2770_BO_PRV_REG0 TAS2770_REG(0X0, 0x1B) |
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| 82 | /* Interrupt MASK Reg0 */ |
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| 83 | #define TAS2770_INT_MASK_REG0 TAS2770_REG(0X0, 0x20) |
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| 84 | #define TAS2770_INT_REG0_DEFAULT 0xfc |
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| 85 | #define TAS2770_INT_MASK_REG0_DISABLE 0xff |
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| 86 | /* Interrupt MASK Reg1 */ |
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| 87 | #define TAS2770_INT_MASK_REG1 TAS2770_REG(0X0, 0x21) |
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| 88 | #define TAS2770_INT_REG1_DEFAULT 0xb1 |
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| 89 | #define TAS2770_INT_MASK_REG1_DISABLE 0xff |
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| 90 | /* Live-Interrupt Reg0 */ |
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| 91 | #define TAS2770_LVE_INT_REG0 TAS2770_REG(0X0, 0x22) |
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| 92 | /* Live-Interrupt Reg1 */ |
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| 93 | #define TAS2770_LVE_INT_REG1 TAS2770_REG(0X0, 0x23) |
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| 94 | /* Latched-Interrupt Reg0 */ |
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| 95 | #define TAS2770_LAT_INT_REG0 TAS2770_REG(0X0, 0x24) |
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| 96 | #define TAS2770_LAT_INT_REG0_OCE_FLG BIT(1) |
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| 97 | #define TAS2770_LAT_INT_REG0_OTE_FLG BIT(0) |
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| 98 | /* Latched-Interrupt Reg1 */ |
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| 99 | #define TAS2770_LAT_INT_REG1 TAS2770_REG(0X0, 0x25) |
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| 100 | #define TAS2770_LAT_INT_REG1_VBA_TOV BIT(3) |
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| 101 | #define TAS2770_LAT_INT_REG1_VBA_TUV BIT(2) |
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| 102 | #define TAS2770_LAT_INT_REG1_BOUT_FLG BIT(1) |
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| 103 | /* VBAT MSB */ |
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| 104 | #define TAS2770_VBAT_MSB TAS2770_REG(0X0, 0x27) |
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| 105 | /* VBAT LSB */ |
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| 106 | #define TAS2770_VBAT_LSB TAS2770_REG(0X0, 0x28) |
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| 107 | /* TEMP MSB */ |
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| 108 | #define TAS2770_TEMP_MSB TAS2770_REG(0X0, 0x29) |
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| 109 | /* TEMP LSB */ |
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| 110 | #define TAS2770_TEMP_LSB TAS2770_REG(0X0, 0x2A) |
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| 111 | /* Interrupt Configuration */ |
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| 112 | #define TAS2770_INT_CFG TAS2770_REG(0X0, 0x30) |
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| 113 | /* Misc IRQ */ |
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| 114 | #define TAS2770_MISC_IRQ TAS2770_REG(0X0, 0x32) |
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| 115 | /* Clock Configuration */ |
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| 116 | #define TAS2770_CLK_CGF TAS2770_REG(0X0, 0x3C) |
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| 117 | /* TDM Clock detection monitor */ |
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| 118 | #define TAS2770_TDM_CLK_DETC TAS2770_REG(0X0, 0x77) |
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| 119 | /* Revision and PG ID */ |
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| 120 | #define TAS2770_REV_AND_GPID TAS2770_REG(0X0, 0x7D) |
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| 121 | |
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| 122 | #define TAS2770_POWER_ACTIVE 0 |
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| 123 | #define TAS2770_POWER_MUTE BIT(0) |
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| 124 | #define TAS2770_POWER_SHUTDOWN BIT(1) |
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| 125 | |
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| 126 | #define ERROR_OVER_CURRENT BIT(0) |
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| 127 | #define ERROR_DIE_OVERTEMP BIT(1) |
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| 128 | #define ERROR_OVER_VOLTAGE BIT(2) |
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| 129 | #define ERROR_UNDER_VOLTAGE BIT(3) |
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| 130 | #define ERROR_BROWNOUT BIT(4) |
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| 131 | #define ERROR_CLASSD_PWR BIT(5) |
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| 132 | |
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| 133 | struct tas2770_priv { |
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| 134 | struct snd_soc_component *component; |
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| 135 | struct gpio_desc *reset_gpio; |
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| 136 | struct gpio_desc *sdz_gpio; |
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| 137 | struct regmap *regmap; |
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| 138 | struct device *dev; |
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| 139 | int v_sense_slot; |
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| 140 | int i_sense_slot; |
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| 141 | bool dac_powered; |
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| 142 | bool unmuted; |
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| 143 | }; |
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| 144 | |
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| 145 | #endif /* __TAS2770__ */ |
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| 146 | |
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