| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * tas5720.h - ALSA SoC Texas Instruments TAS5720 Mono Audio Amplifier |
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| 4 | * |
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| 5 | * Copyright (C)2015-2016 Texas Instruments Incorporated - https://www.ti.com |
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| 6 | * |
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| 7 | * Author: Andreas Dannenberg <dannenberg@ti.com> |
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| 8 | */ |
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| 9 | |
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| 10 | #ifndef __TAS5720_H__ |
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| 11 | #define __TAS5720_H__ |
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| 12 | |
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| 13 | /* Register Address Map - first 3 regs are common for all variants */ |
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| 14 | #define TAS5720_DEVICE_ID_REG 0x00 |
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| 15 | #define TAS5720_POWER_CTRL_REG 0x01 |
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| 16 | #define TAS5720_DIGITAL_CTRL1_REG 0x02 |
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| 17 | #define TAS5720_DIGITAL_CTRL2_REG 0x03 |
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| 18 | #define TAS5720_VOLUME_CTRL_REG 0x04 |
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| 19 | #define TAS5720_ANALOG_CTRL_REG 0x06 |
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| 20 | #define TAS5720_FAULT_REG 0x08 |
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| 21 | #define TAS5720_DIGITAL_CLIP2_REG 0x10 |
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| 22 | #define TAS5720_DIGITAL_CLIP1_REG 0x11 |
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| 23 | #define TAS5720_MAX_REG TAS5720_DIGITAL_CLIP1_REG |
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| 24 | |
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| 25 | /* Additional TAS5722-specific Registers */ |
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| 26 | #define TAS5722_DIGITAL_CTRL2_REG 0x13 |
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| 27 | #define TAS5722_ANALOG_CTRL2_REG 0x14 |
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| 28 | #define TAS5722_MAX_REG TAS5722_ANALOG_CTRL2_REG |
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| 29 | |
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| 30 | /* Register Address Map - volume controls for the TAS5720-Q1 variant */ |
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| 31 | #define TAS5720_Q1_VOLUME_CTRL_CFG_REG 0x03 |
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| 32 | #define TAS5720_Q1_VOLUME_CTRL_LEFT_REG 0x04 |
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| 33 | #define TAS5720_Q1_VOLUME_CTRL_RIGHT_REG 0x05 |
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| 34 | |
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| 35 | /* TAS5720_DEVICE_ID_REG */ |
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| 36 | #define TAS5720A_Q1_DEVICE_ID 0x00 |
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| 37 | #define TAS5720_DEVICE_ID 0x01 |
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| 38 | #define TAS5722_DEVICE_ID 0x12 |
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| 39 | |
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| 40 | /* TAS5720_POWER_CTRL_REG */ |
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| 41 | #define TAS5720_DIG_CLIP_MASK GENMASK(7, 2) |
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| 42 | #define TAS5720_SLEEP BIT(1) |
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| 43 | #define TAS5720_SDZ BIT(0) |
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| 44 | |
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| 45 | /* TAS5720_DIGITAL_CTRL1_REG */ |
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| 46 | #define TAS5720_HPF_BYPASS BIT(7) |
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| 47 | #define TAS5720_TDM_CFG_SRC BIT(6) |
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| 48 | #define TAS5720_SSZ_DS BIT(3) |
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| 49 | #define TAS5720_SAIF_RIGHTJ_24BIT (0x0) |
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| 50 | #define TAS5720_SAIF_RIGHTJ_20BIT (0x1) |
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| 51 | #define TAS5720_SAIF_RIGHTJ_18BIT (0x2) |
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| 52 | #define TAS5720_SAIF_RIGHTJ_16BIT (0x3) |
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| 53 | #define TAS5720_SAIF_I2S (0x4) |
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| 54 | #define TAS5720_SAIF_LEFTJ (0x5) |
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| 55 | #define TAS5720_SAIF_FORMAT_MASK GENMASK(2, 0) |
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| 56 | |
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| 57 | /* TAS5720_DIGITAL_CTRL2_REG */ |
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| 58 | #define TAS5722_VOL_RAMP_RATE BIT(6) |
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| 59 | #define TAS5720_MUTE BIT(4) |
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| 60 | #define TAS5720_TDM_SLOT_SEL_MASK GENMASK(2, 0) |
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| 61 | |
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| 62 | /* TAS5720_Q1_VOLUME_CTRL_CFG_REG */ |
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| 63 | #define TAS5720_Q1_FADE BIT(7) |
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| 64 | #define TAS5720_Q1_MUTE GENMASK(1, 0) |
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| 65 | |
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| 66 | /* TAS5720_ANALOG_CTRL_REG */ |
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| 67 | #define TAS5720_PWM_RATE_6_3_FSYNC (0x0 << 4) |
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| 68 | #define TAS5720_PWM_RATE_8_4_FSYNC (0x1 << 4) |
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| 69 | #define TAS5720_PWM_RATE_10_5_FSYNC (0x2 << 4) |
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| 70 | #define TAS5720_PWM_RATE_12_6_FSYNC (0x3 << 4) |
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| 71 | #define TAS5720_PWM_RATE_14_7_FSYNC (0x4 << 4) |
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| 72 | #define TAS5720_PWM_RATE_16_8_FSYNC (0x5 << 4) |
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| 73 | #define TAS5720_PWM_RATE_20_10_FSYNC (0x6 << 4) |
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| 74 | #define TAS5720_PWM_RATE_24_12_FSYNC (0x7 << 4) |
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| 75 | #define TAS5720_PWM_RATE_MASK GENMASK(6, 4) |
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| 76 | #define TAS5720_ANALOG_GAIN_19_2DBV (0x0 << 2) |
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| 77 | #define TAS5720_ANALOG_GAIN_20_7DBV (0x1 << 2) |
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| 78 | #define TAS5720_ANALOG_GAIN_23_5DBV (0x2 << 2) |
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| 79 | #define TAS5720_ANALOG_GAIN_26_3DBV (0x3 << 2) |
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| 80 | #define TAS5720_ANALOG_GAIN_MASK GENMASK(3, 2) |
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| 81 | #define TAS5720_ANALOG_GAIN_SHIFT (0x2) |
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| 82 | |
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| 83 | /* TAS5720_Q1_ANALOG_CTRL_REG */ |
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| 84 | #define TAS5720_Q1_RESERVED7_BIT BIT(7) |
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| 85 | #define TAS5720_Q1_CHAN_SEL BIT(1) |
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| 86 | |
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| 87 | /* TAS5720_FAULT_REG */ |
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| 88 | #define TAS5720_OC_THRESH_100PCT (0x0 << 4) |
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| 89 | #define TAS5720_OC_THRESH_75PCT (0x1 << 4) |
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| 90 | #define TAS5720_OC_THRESH_50PCT (0x2 << 4) |
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| 91 | #define TAS5720_OC_THRESH_25PCT (0x3 << 4) |
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| 92 | #define TAS5720_OC_THRESH_MASK GENMASK(5, 4) |
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| 93 | #define TAS5720_CLKE BIT(3) |
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| 94 | #define TAS5720_OCE BIT(2) |
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| 95 | #define TAS5720_DCE BIT(1) |
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| 96 | #define TAS5720_OTE BIT(0) |
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| 97 | #define TAS5720_FAULT_MASK GENMASK(3, 0) |
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| 98 | |
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| 99 | /* TAS5720_DIGITAL_CLIP1_REG */ |
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| 100 | #define TAS5720_CLIP1_MASK GENMASK(7, 2) |
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| 101 | #define TAS5720_CLIP1_SHIFT (0x2) |
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| 102 | |
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| 103 | /* TAS5722_DIGITAL_CTRL2_REG */ |
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| 104 | #define TAS5722_HPF_3_7HZ (0x0 << 5) |
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| 105 | #define TAS5722_HPF_7_4HZ (0x1 << 5) |
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| 106 | #define TAS5722_HPF_14_9HZ (0x2 << 5) |
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| 107 | #define TAS5722_HPF_29_7HZ (0x3 << 5) |
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| 108 | #define TAS5722_HPF_59_4HZ (0x4 << 5) |
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| 109 | #define TAS5722_HPF_118_4HZ (0x5 << 5) |
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| 110 | #define TAS5722_HPF_235_0HZ (0x6 << 5) |
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| 111 | #define TAS5722_HPF_463_2HZ (0x7 << 5) |
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| 112 | #define TAS5722_HPF_MASK GENMASK(7, 5) |
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| 113 | #define TAS5722_AUTO_SLEEP_OFF (0x0 << 3) |
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| 114 | #define TAS5722_AUTO_SLEEP_1024LR (0x1 << 3) |
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| 115 | #define TAS5722_AUTO_SLEEP_65536LR (0x2 << 3) |
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| 116 | #define TAS5722_AUTO_SLEEP_262144LR (0x3 << 3) |
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| 117 | #define TAS5722_AUTO_SLEEP_MASK GENMASK(4, 3) |
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| 118 | #define TAS5722_TDM_SLOT_16B BIT(2) |
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| 119 | #define TAS5722_MCLK_PIN_CFG BIT(1) |
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| 120 | #define TAS5722_VOL_CONTROL_LSB BIT(0) |
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| 121 | |
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| 122 | /* TAS5722_ANALOG_CTRL2_REG */ |
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| 123 | #define TAS5722_FAULTZ_PU BIT(3) |
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| 124 | #define TAS5722_VREG_LVL BIT(2) |
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| 125 | #define TAS5722_PWR_TUNE BIT(0) |
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| 126 | |
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| 127 | #endif /* __TAS5720_H__ */ |
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| 128 | |
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