| 1 | // SPDX-License-Identifier: GPL-2.0 |
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| 2 | /* |
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| 3 | * ALSA SoC Texas Instruments TAS6424 Quad-Channel Audio Amplifier |
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| 4 | * |
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| 5 | * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ |
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| 6 | * Author: Andreas Dannenberg <dannenberg@ti.com> |
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| 7 | * Andrew F. Davis <afd@ti.com> |
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| 8 | */ |
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| 9 | |
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| 10 | #ifndef __TAS6424_H__ |
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| 11 | #define __TAS6424_H__ |
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| 12 | |
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| 13 | #define TAS6424_RATES (SNDRV_PCM_RATE_44100 | \ |
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| 14 | SNDRV_PCM_RATE_48000 | \ |
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| 15 | SNDRV_PCM_RATE_96000) |
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| 16 | |
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| 17 | #define TAS6424_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ |
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| 18 | SNDRV_PCM_FMTBIT_S24_LE) |
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| 19 | |
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| 20 | /* Register Address Map */ |
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| 21 | #define TAS6424_MODE_CTRL 0x00 |
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| 22 | #define TAS6424_MISC_CTRL1 0x01 |
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| 23 | #define TAS6424_MISC_CTRL2 0x02 |
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| 24 | #define TAS6424_SAP_CTRL 0x03 |
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| 25 | #define TAS6424_CH_STATE_CTRL 0x04 |
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| 26 | #define TAS6424_CH1_VOL_CTRL 0x05 |
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| 27 | #define TAS6424_CH2_VOL_CTRL 0x06 |
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| 28 | #define TAS6424_CH3_VOL_CTRL 0x07 |
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| 29 | #define TAS6424_CH4_VOL_CTRL 0x08 |
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| 30 | #define TAS6424_DC_DIAG_CTRL1 0x09 |
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| 31 | #define TAS6424_DC_DIAG_CTRL2 0x0a |
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| 32 | #define TAS6424_DC_DIAG_CTRL3 0x0b |
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| 33 | #define TAS6424_DC_LOAD_DIAG_REP12 0x0c |
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| 34 | #define TAS6424_DC_LOAD_DIAG_REP34 0x0d |
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| 35 | #define TAS6424_DC_LOAD_DIAG_REPLO 0x0e |
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| 36 | #define TAS6424_CHANNEL_STATE 0x0f |
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| 37 | #define TAS6424_CHANNEL_FAULT 0x10 |
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| 38 | #define TAS6424_GLOB_FAULT1 0x11 |
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| 39 | #define TAS6424_GLOB_FAULT2 0x12 |
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| 40 | #define TAS6424_WARN 0x13 |
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| 41 | #define TAS6424_PIN_CTRL 0x14 |
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| 42 | #define TAS6424_AC_DIAG_CTRL1 0x15 |
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| 43 | #define TAS6424_AC_DIAG_CTRL2 0x16 |
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| 44 | #define TAS6424_AC_LOAD_DIAG_REP1 0x17 |
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| 45 | #define TAS6424_AC_LOAD_DIAG_REP2 0x18 |
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| 46 | #define TAS6424_AC_LOAD_DIAG_REP3 0x19 |
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| 47 | #define TAS6424_AC_LOAD_DIAG_REP4 0x1a |
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| 48 | #define TAS6424_MISC_CTRL3 0x21 |
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| 49 | #define TAS6424_CLIP_CTRL 0x22 |
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| 50 | #define TAS6424_CLIP_WINDOW 0x23 |
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| 51 | #define TAS6424_CLIP_WARN 0x24 |
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| 52 | #define TAS6424_CBC_STAT 0x25 |
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| 53 | #define TAS6424_MISC_CTRL4 0x26 |
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| 54 | #define TAS6424_MAX TAS6424_MISC_CTRL4 |
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| 55 | |
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| 56 | /* TAS6424_MODE_CTRL_REG */ |
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| 57 | #define TAS6424_RESET BIT(7) |
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| 58 | |
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| 59 | /* TAS6424_SAP_CTRL_REG */ |
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| 60 | #define TAS6424_SAP_RATE_MASK GENMASK(7, 6) |
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| 61 | #define TAS6424_SAP_RATE_44100 (0x00 << 6) |
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| 62 | #define TAS6424_SAP_RATE_48000 (0x01 << 6) |
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| 63 | #define TAS6424_SAP_RATE_96000 (0x02 << 6) |
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| 64 | #define TAS6424_SAP_TDM_SLOT_LAST BIT(5) |
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| 65 | #define TAS6424_SAP_TDM_SLOT_SZ_16 BIT(4) |
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| 66 | #define TAS6424_SAP_TDM_SLOT_SWAP BIT(3) |
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| 67 | #define TAS6424_SAP_FMT_MASK GENMASK(2, 0) |
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| 68 | #define TAS6424_SAP_RIGHTJ_24 (0x00 << 0) |
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| 69 | #define TAS6424_SAP_RIGHTJ_20 (0x01 << 0) |
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| 70 | #define TAS6424_SAP_RIGHTJ_18 (0x02 << 0) |
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| 71 | #define TAS6424_SAP_RIGHTJ_16 (0x03 << 0) |
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| 72 | #define TAS6424_SAP_I2S (0x04 << 0) |
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| 73 | #define TAS6424_SAP_LEFTJ (0x05 << 0) |
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| 74 | #define TAS6424_SAP_DSP (0x06 << 0) |
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| 75 | |
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| 76 | /* TAS6424_CH_STATE_CTRL_REG */ |
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| 77 | #define TAS6424_CH1_STATE_MASK GENMASK(7, 6) |
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| 78 | #define TAS6424_CH1_STATE_PLAY (0x00 << 6) |
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| 79 | #define TAS6424_CH1_STATE_HIZ (0x01 << 6) |
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| 80 | #define TAS6424_CH1_STATE_MUTE (0x02 << 6) |
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| 81 | #define TAS6424_CH1_STATE_DIAG (0x03 << 6) |
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| 82 | #define TAS6424_CH2_STATE_MASK GENMASK(5, 4) |
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| 83 | #define TAS6424_CH2_STATE_PLAY (0x00 << 4) |
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| 84 | #define TAS6424_CH2_STATE_HIZ (0x01 << 4) |
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| 85 | #define TAS6424_CH2_STATE_MUTE (0x02 << 4) |
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| 86 | #define TAS6424_CH2_STATE_DIAG (0x03 << 4) |
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| 87 | #define TAS6424_CH3_STATE_MASK GENMASK(3, 2) |
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| 88 | #define TAS6424_CH3_STATE_PLAY (0x00 << 2) |
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| 89 | #define TAS6424_CH3_STATE_HIZ (0x01 << 2) |
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| 90 | #define TAS6424_CH3_STATE_MUTE (0x02 << 2) |
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| 91 | #define TAS6424_CH3_STATE_DIAG (0x03 << 2) |
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| 92 | #define TAS6424_CH4_STATE_MASK GENMASK(1, 0) |
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| 93 | #define TAS6424_CH4_STATE_PLAY (0x00 << 0) |
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| 94 | #define TAS6424_CH4_STATE_HIZ (0x01 << 0) |
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| 95 | #define TAS6424_CH4_STATE_MUTE (0x02 << 0) |
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| 96 | #define TAS6424_CH4_STATE_DIAG (0x03 << 0) |
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| 97 | #define TAS6424_ALL_STATE_PLAY (TAS6424_CH1_STATE_PLAY | \ |
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| 98 | TAS6424_CH2_STATE_PLAY | \ |
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| 99 | TAS6424_CH3_STATE_PLAY | \ |
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| 100 | TAS6424_CH4_STATE_PLAY) |
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| 101 | #define TAS6424_ALL_STATE_HIZ (TAS6424_CH1_STATE_HIZ | \ |
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| 102 | TAS6424_CH2_STATE_HIZ | \ |
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| 103 | TAS6424_CH3_STATE_HIZ | \ |
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| 104 | TAS6424_CH4_STATE_HIZ) |
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| 105 | #define TAS6424_ALL_STATE_MUTE (TAS6424_CH1_STATE_MUTE | \ |
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| 106 | TAS6424_CH2_STATE_MUTE | \ |
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| 107 | TAS6424_CH3_STATE_MUTE | \ |
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| 108 | TAS6424_CH4_STATE_MUTE) |
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| 109 | #define TAS6424_ALL_STATE_DIAG (TAS6424_CH1_STATE_DIAG | \ |
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| 110 | TAS6424_CH2_STATE_DIAG | \ |
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| 111 | TAS6424_CH3_STATE_DIAG | \ |
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| 112 | TAS6424_CH4_STATE_DIAG) |
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| 113 | |
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| 114 | /* TAS6424_DC_DIAG_CTRL1 */ |
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| 115 | #define TAS6424_LDGBYPASS_SHIFT 0 |
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| 116 | #define TAS6424_LDGBYPASS_MASK BIT(TAS6424_LDGBYPASS_SHIFT) |
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| 117 | |
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| 118 | /* TAS6424_GLOB_FAULT1_REG */ |
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| 119 | #define TAS6424_FAULT_OC_CH1 BIT(7) |
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| 120 | #define TAS6424_FAULT_OC_CH2 BIT(6) |
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| 121 | #define TAS6424_FAULT_OC_CH3 BIT(5) |
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| 122 | #define TAS6424_FAULT_OC_CH4 BIT(4) |
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| 123 | #define TAS6424_FAULT_DC_CH1 BIT(3) |
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| 124 | #define TAS6424_FAULT_DC_CH2 BIT(2) |
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| 125 | #define TAS6424_FAULT_DC_CH3 BIT(1) |
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| 126 | #define TAS6424_FAULT_DC_CH4 BIT(0) |
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| 127 | |
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| 128 | /* TAS6424_GLOB_FAULT1_REG */ |
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| 129 | #define TAS6424_FAULT_CLOCK BIT(4) |
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| 130 | #define TAS6424_FAULT_PVDD_OV BIT(3) |
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| 131 | #define TAS6424_FAULT_VBAT_OV BIT(2) |
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| 132 | #define TAS6424_FAULT_PVDD_UV BIT(1) |
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| 133 | #define TAS6424_FAULT_VBAT_UV BIT(0) |
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| 134 | |
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| 135 | /* TAS6424_GLOB_FAULT2_REG */ |
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| 136 | #define TAS6424_FAULT_OTSD BIT(4) |
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| 137 | #define TAS6424_FAULT_OTSD_CH1 BIT(3) |
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| 138 | #define TAS6424_FAULT_OTSD_CH2 BIT(2) |
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| 139 | #define TAS6424_FAULT_OTSD_CH3 BIT(1) |
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| 140 | #define TAS6424_FAULT_OTSD_CH4 BIT(0) |
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| 141 | |
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| 142 | /* TAS6424_WARN_REG */ |
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| 143 | #define TAS6424_WARN_VDD_UV BIT(6) |
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| 144 | #define TAS6424_WARN_VDD_POR BIT(5) |
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| 145 | #define TAS6424_WARN_VDD_OTW BIT(4) |
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| 146 | #define TAS6424_WARN_VDD_OTW_CH1 BIT(3) |
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| 147 | #define TAS6424_WARN_VDD_OTW_CH2 BIT(2) |
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| 148 | #define TAS6424_WARN_VDD_OTW_CH3 BIT(1) |
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| 149 | #define TAS6424_WARN_VDD_OTW_CH4 BIT(0) |
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| 150 | |
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| 151 | /* TAS6424_MISC_CTRL3_REG */ |
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| 152 | #define TAS6424_CLEAR_FAULT BIT(7) |
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| 153 | #define TAS6424_PBTL_CH_SEL BIT(6) |
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| 154 | #define TAS6424_MASK_CBC_WARN BIT(5) |
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| 155 | #define TAS6424_MASK_VDD_UV BIT(4) |
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| 156 | #define TAS6424_OTSD_AUTO_RECOVERY BIT(3) |
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| 157 | |
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| 158 | #endif /* __TAS6424_H__ */ |
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| 159 | |
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