1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * wm8510.h -- WM8510 Soc Audio driver |
4 | */ |
5 | |
6 | #ifndef _WM8510_H |
7 | #define _WM8510_H |
8 | |
9 | /* WM8510 register space */ |
10 | |
11 | #define WM8510_RESET 0x0 |
12 | #define WM8510_POWER1 0x1 |
13 | #define WM8510_POWER2 0x2 |
14 | #define WM8510_POWER3 0x3 |
15 | #define WM8510_IFACE 0x4 |
16 | #define WM8510_COMP 0x5 |
17 | #define WM8510_CLOCK 0x6 |
18 | #define WM8510_ADD 0x7 |
19 | #define WM8510_GPIO 0x8 |
20 | #define WM8510_DAC 0xa |
21 | #define WM8510_DACVOL 0xb |
22 | #define WM8510_ADC 0xe |
23 | #define WM8510_ADCVOL 0xf |
24 | #define WM8510_EQ1 0x12 |
25 | #define WM8510_EQ2 0x13 |
26 | #define WM8510_EQ3 0x14 |
27 | #define WM8510_EQ4 0x15 |
28 | #define WM8510_EQ5 0x16 |
29 | #define WM8510_DACLIM1 0x18 |
30 | #define WM8510_DACLIM2 0x19 |
31 | #define WM8510_NOTCH1 0x1b |
32 | #define WM8510_NOTCH2 0x1c |
33 | #define WM8510_NOTCH3 0x1d |
34 | #define WM8510_NOTCH4 0x1e |
35 | #define WM8510_ALC1 0x20 |
36 | #define WM8510_ALC2 0x21 |
37 | #define WM8510_ALC3 0x22 |
38 | #define WM8510_NGATE 0x23 |
39 | #define WM8510_PLLN 0x24 |
40 | #define WM8510_PLLK1 0x25 |
41 | #define WM8510_PLLK2 0x26 |
42 | #define WM8510_PLLK3 0x27 |
43 | #define WM8510_ATTEN 0x28 |
44 | #define WM8510_INPUT 0x2c |
45 | #define WM8510_INPPGA 0x2d |
46 | #define WM8510_ADCBOOST 0x2f |
47 | #define WM8510_OUTPUT 0x31 |
48 | #define WM8510_SPKMIX 0x32 |
49 | #define WM8510_SPKVOL 0x36 |
50 | #define WM8510_MONOMIX 0x38 |
51 | |
52 | #define WM8510_CACHEREGNUM 57 |
53 | |
54 | /* Clock divider Id's */ |
55 | #define WM8510_OPCLKDIV 0 |
56 | #define WM8510_MCLKDIV 1 |
57 | #define WM8510_ADCCLK 2 |
58 | #define WM8510_DACCLK 3 |
59 | #define WM8510_BCLKDIV 4 |
60 | |
61 | /* DAC clock dividers */ |
62 | #define WM8510_DACCLK_F2 (1 << 3) |
63 | #define WM8510_DACCLK_F4 (0 << 3) |
64 | |
65 | /* ADC clock dividers */ |
66 | #define WM8510_ADCCLK_F2 (1 << 3) |
67 | #define WM8510_ADCCLK_F4 (0 << 3) |
68 | |
69 | /* PLL Out dividers */ |
70 | #define WM8510_OPCLKDIV_1 (0 << 4) |
71 | #define WM8510_OPCLKDIV_2 (1 << 4) |
72 | #define WM8510_OPCLKDIV_3 (2 << 4) |
73 | #define WM8510_OPCLKDIV_4 (3 << 4) |
74 | |
75 | /* BCLK clock dividers */ |
76 | #define WM8510_BCLKDIV_1 (0 << 2) |
77 | #define WM8510_BCLKDIV_2 (1 << 2) |
78 | #define WM8510_BCLKDIV_4 (2 << 2) |
79 | #define WM8510_BCLKDIV_8 (3 << 2) |
80 | #define WM8510_BCLKDIV_16 (4 << 2) |
81 | #define WM8510_BCLKDIV_32 (5 << 2) |
82 | |
83 | /* MCLK clock dividers */ |
84 | #define WM8510_MCLKDIV_1 (0 << 5) |
85 | #define WM8510_MCLKDIV_1_5 (1 << 5) |
86 | #define WM8510_MCLKDIV_2 (2 << 5) |
87 | #define WM8510_MCLKDIV_3 (3 << 5) |
88 | #define WM8510_MCLKDIV_4 (4 << 5) |
89 | #define WM8510_MCLKDIV_6 (5 << 5) |
90 | #define WM8510_MCLKDIV_8 (6 << 5) |
91 | #define WM8510_MCLKDIV_12 (7 << 5) |
92 | |
93 | struct wm8510_setup_data { |
94 | int spi; |
95 | int i2c_bus; |
96 | unsigned short i2c_address; |
97 | }; |
98 | |
99 | #endif |
100 | |